CN101911025B - 带有取回保护的动态地址转换的方法和系统 - Google Patents

带有取回保护的动态地址转换的方法和系统 Download PDF

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Publication number
CN101911025B
CN101911025B CN200980101961.9A CN200980101961A CN101911025B CN 101911025 B CN101911025 B CN 101911025B CN 200980101961 A CN200980101961 A CN 200980101961A CN 101911025 B CN101911025 B CN 101911025B
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district
virtual address
storage
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CN101911025A (zh
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D·格雷纳
C·小盖尼
L·海勒
D·奥西塞克
E·普费弗
T·什莱格尔
C·韦布
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International Business Machines Corp
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0215—Addressing or allocation; Relocation with look ahead addressing means
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1009—Address translation using page tables, e.g. page table structures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1036—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] for multiple virtual address spaces, e.g. segmentation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/145—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being virtual, e.g. for virtual blocks or segments before a translation mechanism
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30047—Prefetch instructions; cache control instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1052—Security improvement
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G06F2212/654—Look-ahead translation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G06F2212/656—Address space sharing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/68—Details of translation look-aside buffer [TLB]

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Computer Security & Cryptography (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Storage Device Security (AREA)
CN200980101961.9A 2008-01-11 2009-01-05 带有取回保护的动态地址转换的方法和系统 Active CN101911025B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/972,688 US8677098B2 (en) 2008-01-11 2008-01-11 Dynamic address translation with fetch protection
US11/972,688 2008-01-11
PCT/EP2009/050050 WO2009087133A1 (en) 2008-01-11 2009-01-05 Dynamic address translation with fetch protection

Publications (2)

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CN101911025A CN101911025A (zh) 2010-12-08
CN101911025B true CN101911025B (zh) 2012-11-07

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US (6) US8677098B2 (enExample)
EP (1) EP2229632B1 (enExample)
JP (1) JP5373817B2 (enExample)
KR (1) KR101175615B1 (enExample)
CN (1) CN101911025B (enExample)
CY (1) CY1114228T1 (enExample)
DK (1) DK2229632T3 (enExample)
ES (1) ES2408189T3 (enExample)
PL (1) PL2229632T3 (enExample)
PT (1) PT2229632E (enExample)
SI (1) SI2229632T1 (enExample)
WO (1) WO2009087133A1 (enExample)

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CN110096457B (zh) * 2018-01-31 2023-05-23 联发科技股份有限公司 硬件控制系统及硬件控制方法
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JP5373817B2 (ja) 2013-12-18
US20160267017A1 (en) 2016-09-15
US20150169437A1 (en) 2015-06-18
JP2011509470A (ja) 2011-03-24
US20180089103A1 (en) 2018-03-29
US20090182971A1 (en) 2009-07-16
US8677098B2 (en) 2014-03-18
US10423539B2 (en) 2019-09-24
US9378128B2 (en) 2016-06-28
US9021225B2 (en) 2015-04-28
EP2229632A1 (en) 2010-09-22
SI2229632T1 (sl) 2013-06-28
US20140115295A1 (en) 2014-04-24
KR101175615B1 (ko) 2012-08-22
DK2229632T3 (da) 2013-06-03
WO2009087133A9 (en) 2009-09-24
CN101911025A (zh) 2010-12-08
US20190303301A1 (en) 2019-10-03
KR20100126269A (ko) 2010-12-01
US10977190B2 (en) 2021-04-13
ES2408189T3 (es) 2013-06-18
US9934159B2 (en) 2018-04-03
CY1114228T1 (el) 2016-08-31
PL2229632T3 (pl) 2013-08-30
PT2229632E (pt) 2013-05-28
WO2009087133A1 (en) 2009-07-16
EP2229632B1 (en) 2013-04-10

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