CN101908357A - Correction circuit and method for restoring data - Google Patents

Correction circuit and method for restoring data Download PDF

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Publication number
CN101908357A
CN101908357A CN2009101413405A CN200910141340A CN101908357A CN 101908357 A CN101908357 A CN 101908357A CN 2009101413405 A CN2009101413405 A CN 2009101413405A CN 200910141340 A CN200910141340 A CN 200910141340A CN 101908357 A CN101908357 A CN 101908357A
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signal
data
amplitude
reference value
cycle
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CN101908357B (en
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吴声宏
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Novatek Microelectronics Corp
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Novatek Microelectronics Corp
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Abstract

The invention relates to a correction circuit and a method for restoring data. The correction circuit comprises an amplitude detection circuit, a periodic detection circuit and a compensation circuit, wherein the amplitude detection circuit can sample a plurality of amplitudes of a data signal according to a zero-crossing dot signal to output an amplitude signal, the periodic detection circuit can sample a clock signal according to the zero-crossing dot signal to output a periodic signal, and the compensation circuit can receive the amplitude signal, the periodic signal and the data signal, regulate the phase of the data signal through calculating the differences of the amplitude signal and the periodic signal with standard signals, and output a corrected data signal. The correction circuit can correct the data signal in time, and increase the identifiable rate.

Description

Correcting circuit and method that data are recovered
Technical field
The present invention relates to correcting circuit and method that a kind of data are recovered, and be particularly related to a kind of correcting circuit and method that is applicable to the data recovery of optical memory system.
Background technology
General optical memory system, for example comprise CD (compact disks, CDs) or digital diversified CD (digital versatile disks, laser CD such as DVDs), the use cd-rom drive (optical disc drive, ODD), the operating period of its storage data of regenerating, the disc drives chance is sent laser light in the laser light panel surface, and reads the signal that is reflected by the laser light panel surface.The signal that the laser light panel surface is read is radio frequency (radio frequency, RF) signal, therefore comprising the non-linear channels, symbol intersymbol interference (the inter-symbol interference that have when defocusing, ISI), electrical delay, a large amount of surperficial scratches of producing back ejection formation aging or recording medium of dyestuff on the pit type on the recording medium, recording medium etc., and cause identification bad, and read out distortion data.
Specifically, will be converted to electric signal from the light that the laser CD is reflected, and the form with binary bit is come regenerate electrical signals via signal Processing.Come regeneration RF signal according to mark that is recorded in all lengths on the laser CD or space, and must accurately detect the phase place of radiofrequency signal and level to obtain reliable binary bit.
In order to recover the numerical data of original storage from distortion data, generally speaking, known PRML (partial response maximum likelihood) technology is a kind of main means.(partial response, PR) method correct level error is to form the numerical data that can carry out data manipulation on it in wherein partial response.By use maximum likelihood (maximum likelihood, ML) Viterbi of method (Viterbi) decoding mechanism is decoded as the numerical data of original storage with formed numerical data, and therefore its on a bit basis through error correction.The method can be in order to increasing the reliability of radiofrequency signal, but the method will increase difficulty in the design and the complexity that realizes this hardware, and the while is more expended many system resources.
Summary of the invention
In view of this, the invention provides the correcting circuit that a kind of data are recovered, by analyzing the amplitude and the cycle of data-signal, and with its comparison amplitude and the reference value in cycle, can revise this data-signal immediately, can increase the recognition rate of data-signal, wherein this data-signal can be a radiofrequency signal through cutter (slicer).
The invention provides the bearing calibration that a kind of data are recovered,, and, can revise this data-signal immediately, can increase the recognition rate of data-signal its comparison amplitude and the reference value in cycle by the amplitude and the cycle of analysis data-signal.
The present invention proposes the correcting circuit that a kind of data are recovered, and comprises amplitude detecting circuit, cycle detection circuit and compensating circuit.Amplitude detecting circuit receives data-signal and zero crossover point (zero-cross) signal, and takes a sample according to a plurality of amplitudes of zero crossover point data signal signal, and the output amplitude signal.The cycle detection circuit receives zero crossover point signal and clock signal, and according to zero crossover point signal clock signal is taken a sample, and the output periodic signal.Compensating circuit receives amplitude signal, periodic signal and data-signal, by calculating the difference of amplitude signal and periodic signal and standard signal, adjusts the phase place of data-signal, and output calibration data signal.
In an example embodiment of the present invention, above-mentioned compensating circuit comprises statistic unit and amending unit.Wherein, statistic unit couples amplitude detecting circuit, and statistic unit is preset a standard signal, this standard signal comprises a plurality of amplitude reference values and a plurality of cycle reference value, in order to from these amplitude reference values, selecting the amplitude reference value the most close, and interleave and export in these cycle reference values and the corresponding cycle reference value of this amplitude signal with amplitude signal.Amending unit couples statistic unit and cycle detection circuit, and receiving cycle signal and cycle reference value use producing first compensating parameter, use first compensating parameter to adjust the phase place of data-signal, and output calibration data signal.
In an example embodiment of the present invention, above-mentioned amending unit comprises computing unit and phasing unit.Wherein, computing unit couples statistic unit and cycle detection circuit, in order to receiving cycle signal and cycle reference value, and the difference value of computation period signal and cycle reference value, difference value be multiply by preset multiple, use producing first compensating parameter.Phasing unit couples computing unit, uses the zero-time and the concluding time of the first compensating parameter adjustment cycle signal, uses the phase place of adjusting data-signal, output calibration data signal.
In an example embodiment of the present invention, above-mentioned compensating circuit comprises statistic unit and amending unit.Wherein, statistic unit couples the cycle detection circuit, and statistic unit is preset a standard signal, this standard signal comprises a plurality of amplitude reference values and a plurality of cycle reference value, in order to from these cycle reference values, selecting the cycle reference value the most close, export in these amplitude reference values and the corresponding amplitude reference value of this periodic signal to interleave with periodic signal.Amending unit couples statistic unit and amplitude detecting circuit, receives amplitude signal and amplitude reference value, uses producing second compensating parameter, uses second compensating parameter to adjust the phase place of data-signal, and output calibration data signal.
In an example embodiment of the present invention, above-mentioned amending unit comprises computing unit and phasing unit.Wherein, computing unit couples statistic unit and amplitude detecting circuit, in order to reception amplitude signal and amplitude reference value, and the difference value of calculating amplitude signal and amplitude reference value, difference value be multiply by preset multiple, use producing second compensating parameter.Phasing unit couples computing unit, uses the zero-time and the concluding time of the second compensating parameter adjustment cycle signal, uses the phase place of adjusting data-signal, output calibration data signal.
In an example embodiment of the present invention, the correcting circuit that above-mentioned data are recovered also comprises clipper circuit and phase-locked loop.Wherein, clipper circuit received RF signal and clipping level, according to clipping level cutting radiofrequency signal, and outputting data signals and zero crossover point signal.The phase-locked loop couples clipper circuit, receives and according to data-signal and clock signal.
In an example embodiment of the present invention, the correcting circuit that above-mentioned data are recovered also comprises the Bit String flow generator.The Bit String flow generator couples compensating circuit, exports after receiving the calibration data signal and converting the bit crossfire to.
The present invention proposes the bearing calibration that a kind of data are recovered.The method is taken a sample according to the amplitude of zero crossover point data signal signal, and obtains amplitude signal.In addition, according to zero crossover point signal-count clock signal, and obtain periodic signal.Then, by calculating the difference of amplitude signal and periodic signal and standard signal, the phase place of adjustment data-signal and obtain the calibration data signal.
In an example embodiment of the present invention, the step of above-mentioned acquisition calibration data signal comprises provides standard signal, standard signal to comprise a plurality of amplitude reference values and a plurality of cycle reference value; From these amplitude reference values, select the amplitude reference value the most close with amplitude signal; Search or interleave out corresponding cycle reference value in these cycle reference values according to selecteed this amplitude reference value.Then, computation period signal and the cycle reference value searching or interleave out to produce first compensating parameter, use first compensating parameter to adjust the phase place of data-signal then, with acquisition calibration data signal.
In an example embodiment of the present invention, the step of above-mentioned generation first compensating parameter comprises the difference value of computation period signal and the cycle reference value searching or interleave out, and difference value be multiply by preset multiple to produce first compensating parameter.In an example embodiment of the present invention, above-mentioned use first compensating parameter is adjusted the phase place of data-signal and the step that obtains the calibration data signal comprises: the zero-time and the concluding time of using the first compensating parameter adjustment cycle signal, use the phase place of adjusting data-signal, obtain the calibration data signal.
In an example embodiment of the present invention, the step of above-mentioned acquisition calibration data signal comprises provides standard signal, standard signal to comprise a plurality of amplitude reference values and a plurality of cycle reference value; From these cycle reference values, select the cycle reference value the most close with periodic signal; Should the cycle reference value search or interleave out corresponding amplitude reference value in these amplitude reference values according to selecteed.Then, calculate amplitude signal and the amplitude reference value searching or interleave out, to produce second compensating parameter; And use second compensating parameter to adjust the phase place of data-signal, to obtain the calibration data signal.
In an example embodiment of the present invention, the step of above-mentioned generation second compensating parameter comprises the difference value of calculating amplitude signal and the amplitude reference value searching or interleave out; And difference value be multiply by preset multiple, to produce second compensating parameter.In an example embodiment of the present invention, the phase place that above-mentioned use second compensating parameter is adjusted data-signal comprises with the step that obtains the calibration data signal: the zero-time and the concluding time of using the second compensating parameter adjustment cycle signal, use the phase place of adjusting data-signal, obtain the calibration data signal.
In an example embodiment of the present invention, the bearing calibration that above-mentioned data are recovered also comprises according to clipping level cutting radiofrequency signal, to obtain data-signal and zero crossover point signal.Then, according to the phase place of data-signal and clocking.
In an example embodiment of the present invention, the bearing calibration that above-mentioned data are recovered also comprises converting the calibration data-signal to the bit crossfire.
Based on above-mentioned, the present invention can be in order to increasing the reliability of radiofrequency signal, and increase the recognition rate of radiofrequency signal, in addition, also can reduce the influence that produces the distorted signal of phase place and amplitude etc. because of noise by the instant radiofrequency signal of revising.
For above-mentioned feature and advantage of the present invention can be become apparent, embodiment cited below particularly, and conjunction with figs. is described in detail below.
Description of drawings
Fig. 1 is the calcspar according to the correcting circuit of a kind of data recovery of first example embodiment of the present invention.
Fig. 2 is the process flow diagram of the bearing calibration that recovers according to a kind of data that first example embodiment of the present invention is provided.
Fig. 3 is the calcspar according to the correcting circuit of a kind of data recovery of second example embodiment of the present invention.
Fig. 4 is the process flow diagram of the bearing calibration that recovers according to a kind of data that second example embodiment of the present invention is provided.
Fig. 5 is the oscillogram of the bearing calibration that recovers according to a kind of data that second example embodiment of the present invention is provided.
Fig. 6 is the calcspar according to the correcting circuit of a kind of data recovery of the 3rd example embodiment of the present invention.
Fig. 7 is the process flow diagram that a kind of bearing calibration of data recovery is provided according to the 3rd example embodiment of the present invention.
Fig. 8 is the oscillogram of the bearing calibration that recovers according to a kind of data that second example embodiment of the present invention is provided.
Fig. 9 is the calcspar according to the correcting circuit of a kind of data recovery of the 4th example embodiment of the present invention.
Figure 10 is the oscillogram of the bearing calibration that recovers according to a kind of data that the 4th example embodiment of the present invention is provided.
[main element symbol description]
100,300,600,900: the correcting circuit that data are recovered
110: amplitude detecting circuit
120: the cycle detection circuit
130: compensating circuit
330,630: compensating circuit
340,640: statistic unit
350,650: amending unit
351,651: computing unit
352,652: phasing unit
960: clipper circuit
970: the phase-locked loop
980: the Bit String flow generator
S21~S23, S41~S46, S71~S76: the step of the bearing calibration that data are recovered
A k, A K+1: maximum-amplitude signal
A k', A K+1': the amplitude reference value
W k, W K+1: periodic signal
W k', W K+1': the cycle reference value
Z K-2, Z K-1, Z k, Z K+1, Z K+2: zero crossover point
D1: data-signal
Δ 1, Δ 2, Δ 3, Δ 4: phase error
Embodiment
In known optical memory system, the radiofrequency signal of using the calibration of PRML technology to be reflected by the laser light panel surface.Yet this practice also needs to adopt more mnemon, and area of chip is increased, and increases the cost of chip manufacturing.In addition, use the PRML technology will increase difficulty in the design and the complexity that realizes this hardware.
In view of this, in an embodiment of the present invention, when receiving data-signal, with reference to zero crossover point signal and clock signal, available amplitude detecting circuit and cycle detection circuit are obtained a plurality of amplitudes and a plurality of cycle of data-signal, wherein, data-signal, zero crossover point signal and clock signal can be by radiofrequency signal through obtaining after partitioning circuitry and the phase-locked loop.Then can by comparison amplitude and cycle, adjust the phase place of above-mentioned data-signal between adjacent zero crossover point, calibrate above-mentioned data-signal according to this by compensating circuit.Because the data-signal after the calibration can reduce the phenomenon of distortion, and can increase the reliability of radiofrequency signal through the compensation of phase place, and the design of hardware can be too not complicated yet.Elaborate embodiments of the invention below with reference to the accompanying drawings, accompanying drawing is for example understood example embodiment of the present invention.In the following description, for presenting consistency, so in different embodiment, if having function and the same or analogous element of structure to use components identical symbol and title to explanation of the present invention.
[first example embodiment]
Fig. 1 is the calcspar according to the correcting circuit of a kind of data recovery of first example embodiment of the present invention.With reference to Fig. 1, among this example embodiment, the correcting circuit 100 that data are recovered comprises amplitude detecting circuit 110, cycle detection circuit 120 and compensating circuit 130.Wherein, compensating circuit 130 couples amplitude detecting circuit 110 and cycle detection circuit 120.Below will introduce the detailed functions of above-mentioned each element.
Amplitude detecting circuit 110 is in order to receive zero crossover point signal Z and data-signal D1, and wherein zero crossover point signal Z is a plurality of zero crossover point Z K-2, Z K-1, Z k, Z K+1, Z K+2... crossfire, amplitude detecting circuit 110 can be divided into the m section with data-signal D1 according to this zero crossover point signal Z, m is a positive integer, and amplitude detecting circuit 110 is taken a sample to this data-signal D1.For instance, amplitude detecting circuit 110 can be measured the peak swing of each section, can obtain the amplitude of each section in the radiofrequency signal of this m section, output amplitude signal A, and wherein amplitude signal A is peak swing A K-2, A K-1, A k, A K+1, A K+2... crossfire.
Cycle detection circuit 120 is in order to receive zero crossover point signal Z and clock signal PCLK, wherein clock signal PCLK is the crossfire of a plurality of clock intervals, cycle detection circuit 120 can be according to the clock interval between the adjacent zero crossover point of clock signal PCLK calculating, can obtain the cycle of each section in the radiofrequency signal of this m section, output periodic signal W, wherein periodic signal W is each section cycle W K-2, W K-1, W k, W K+1, W K+2... crossfire.For instance, cycle detection circuit 120 can be counted this clock signal PCLK according to this zero crossover point signal Z, therefore can obtain the clock number of times between the adjacent zero crossover point, with this count results as periodic signal W.
Accept above-mentionedly, compensating circuit 130 receives amplitude signal and periodic signals, by the amplitude A of the k section in the m section amplitude signal kAnd the cycle W of the k section in the periodic signal k, calculate the amplitude A of above-mentioned k section kWith cycle W kThe difference of the two and standard signal is adjusted the phase place of data-signal D1 and output calibration data signal.Below cooperate process flow diagram to be described in more detail.
Please be simultaneously with reference to Fig. 1 and Fig. 2, Fig. 2 is the process flow diagram of the bearing calibration that recovers according to a kind of data that first example embodiment of the present invention is provided.At first, in step S21, amplitude detecting circuit 110 receives data-signal D1 and zero crossover point signal Z, and according to zero crossover point signal Z the amplitude of data-signal D1 is taken a sample, and the output amplitude signal.In step S22, cycle detection circuit 120 receives zero crossover point signal Z and clock signal PCLK, and according to zero crossover point signal Z clock signal PCLK is taken a sample, and the output periodic signal.In step S23, compensating circuit 130 receives amplitude signal, periodic signal and data-signal D1, by calculating the difference of amplitude signal and periodic signal and standard signal, adjusts the phase place of data-signal D1, and output calibration data signal.
In sum, this example embodiment can be in order to increasing the reliability of data-signal, and increase the recognition rate of data-signal, in addition, also can reduce the influence that produces the distorted signal of phase place and amplitude etc. because of noise by the instant data-signal of revising.
[second example embodiment]
Fig. 3 is the calcspar according to the correcting circuit of a kind of data recovery of second example embodiment of the present invention.Please refer to Fig. 1 and Fig. 3, the key distinction of second example embodiment and first example embodiment is compensating circuit 330.
Specifically, in this example embodiment, the correcting circuit 300 that data are recovered comprises amplitude detecting circuit 110, cycle detection circuit 120 and compensating circuit 330.Wherein, compensating circuit 330 comprises statistic unit 340 and amending unit 350, and further, amending unit 350 comprises computing unit 351 and phasing unit 352.
At this, statistic unit 340 couples amplitude detecting circuit 110, and computing unit 351 couples statistic unit 340 and cycle detection circuit 120, and phasing unit 352 couples computing unit 351.Below will introduce the detailed functions of above-mentioned each element.
Statistic unit 340 can be by standard signal of input in advance (or setting), this standard signal is in order to the corresponding relation of indication amplitude reference value and cycle reference value, can find out corresponding cycle reference value by the amplitude reference value, otherwise, also can find out corresponding amplitude reference value by the reference cycle reference value.In certain embodiments, the corresponding relation of aforementioned amplitude reference value and cycle reference value can be made into " look-up table " (look-up table), and in advance look-up table is left in the statistic unit 340.
In the present embodiment, statistic unit 340 receives the amplitude signal A that amplitude detecting circuit 110 is exported k, in order to from these amplitude reference values of standard signal, to select or to interleave out one and amplitude signal A kCorresponding cycle reference value W k'.Amending unit 350 receives above-mentioned cycle reference value W k', in more detail, the computing unit 351 in the amending unit 350 receives above-mentioned cycle reference value W k', and the periodic signal W of receiving cycle testing circuit 120 outputs k, computation period signal W kWith cycle reference value W k' difference value, i.e. W k-W k'.Difference value be multiply by preset multiple K, i.e. K (W k-W k'), use producing first compensating parameter.Zero-time and concluding time that phasing unit 352 uses the first compensating parameter adjustment cycle signal, use the phase place of adjusting data-signal D1, output calibration data signal.Below cooperate process flow diagram to be described in more detail.
Please be simultaneously with reference to Fig. 3 and Fig. 4, Fig. 4 is the process flow diagram of the bearing calibration that recovers according to a kind of data that second example embodiment of the present invention is provided.At first, in step S41, amplitude detecting circuit 110 receives data-signal D1 and zero crossover point signal Z, and according to zero crossover point signal Z the amplitude of data-signal D1 is taken a sample, and output amplitude signal A kIn step S42, cycle detection circuit 120 receives zero crossover point signal Z and clock signal PCLK, and according to zero crossover point signal Z clock signal PCLK is taken a sample, and output periodic signal W kIn step S43, statistic unit 340 preset standard signals, standard signal comprise a plurality of amplitude reference values and a plurality of cycle reference value.In step S44, statistic unit 340 is selected or is interleave out and amplitude signal A kCorresponding cycle reference value W k', export corresponding cycle reference value W k'.In step S45, computing unit 351 receiving cycle signal W kWith cycle reference value W k', computation period signal W kWith cycle reference value W k' difference value, difference value be multiply by preset multiple, use producing first compensating parameter.In step S46, zero-time and concluding time that phasing unit 352 uses the first compensating parameter adjustment cycle signal, use the phase place of adjusting data-signal D1, output calibration data signal.
For instance, Fig. 5 is the oscillogram of the bearing calibration that recovers according to a kind of data that second example embodiment of the present invention is provided.With reference to Fig. 3 and Fig. 5, amplitude detecting circuit 110 receives data-signal D1 and zero crossover point signal Z, and wherein, zero crossover point signal Z is a plurality of zero crossover point Z K-2, Z K-1, Z k, Z K+1And Z K+2Crossfire.Amplitude detecting circuit 110 is according to zero crossover point signal Z can take a sample data-signal D1, wherein zero crossover point Z kTo Z K+1Between data-signal D1 be expressed as the data-signal D1 of k section, and can take a sample peak swing A in the data-signal D1 of k section of amplitude detecting circuit 110 kExport statistic unit 340 to.And statistic unit 340 is with reference to wherein default standard signal, in order to select or to interleave out and amplitude signal A kCorresponding cycle reference value W k', statistic unit 340 is exported corresponding cycle reference value W then k' to computing unit 351.
Accept above-mentioned, the cycle detection circuit 120 cycle W in the data-signal D1 of k section that can take a sample k Export computing unit 351 to.And computing unit 351 receiving cycle signal W kAnd cycle reference value W k', computation period signal W kWith cycle reference value W k' error, use formula (1) to produce the first compensating parameter C1, wherein, formula (1) is expressed as follows:
C1=K 1*(W k-W k’) (1)
At this, K 1It is a weight parameter.Then, phasing unit 352 uses the first compensating parameter C1 to adjust phase place among the data-signal D1 of k section.Simple principle is that with same-amplitude, if the cycle that the cycle reference value is measured is long, i.e. the cycle that expression is measured is shorter, can be transferred length by way of compensation.For instance, shorter when the cycle of measuring, with the zero-time of the data-signal D1 of k section in advance, wherein the first compensating parameter C1 can reduce phase error Δ 1 as the foundation of adjusting zero-time, and the concluding time of the data-signal D1 of k section is delayed, wherein the first compensating parameter C1 can be as the foundation of adjusting the concluding time, reduce phase error Δ 2, that is to say, adjust the periodic signal W of the data-signal D1 of k section k, make periodic signal W kMore near cycle reference value W k', reduce the phase error of the data-signal D1 of k section.In like manner can get, this example embodiment also can be adjusted the data-signal D1 of k+1 section, by peak swing A K+1Contrast obtains cycle reference value W K+1', computation period signal W K+1With cycle reference value W K+1' error, reduce phase error Δ 3 and phase error Δ 4, can reduce the error of the data-signal D1 of k+1 section.
Thus, by adjusting the periodic signal of each section among the data-signal D1, can increase the reliability of data-signal D1.
[the 3rd example embodiment]
Fig. 6 is the calcspar according to the correcting circuit of a kind of data recovery of the 3rd example embodiment of the present invention.Please refer to Fig. 3 and Fig. 6, the key distinction of second example embodiment and the 3rd example embodiment is compensating circuit 630.
Specifically, in this example embodiment, the difference of second example embodiment and the 3rd example embodiment is that cycle detection circuit 120 couples statistic unit 640, and amplitude detecting circuit 110 couples amending unit 650.
Specifically, statistic unit 640 is with reference to wherein default standard signal, in order to select or to interleave out and periodic signal W kCorresponding amplitude reference value A k', export corresponding amplitude reference value A k' to computing unit 651.Computing unit 651 receives above-mentioned amplitude reference value A k', and receive the amplitude signal A that amplitude detecting circuit 120 is exported k, calculate amplitude signal A kWith amplitude reference value A k' difference value, difference value be multiply by preset multiple, use producing the second compensating parameter C2, export the second compensating parameter C2 to phasing unit 652.Then, phasing unit 652 uses the second compensating parameter C2 adjustment cycle signal W kZero-time and concluding time, use the phase place of adjusting data-signal D1, output calibration data signal.Below cooperate process flow diagram to be described in more detail.
Fig. 7 is the process flow diagram of the bearing calibration that recovers according to a kind of data that the 3rd example embodiment of the present invention is provided.At first, in step S71, amplitude detecting circuit 110 receives data-signal D1 and zero crossover point signal Z, and according to zero crossover point signal Z the amplitude of data-signal D1 is taken a sample, and output amplitude signal A kIn step S72, cycle detection circuit 120 receives zero crossover point signal Z and clock signal PCLK, and according to zero crossover point signal Z clock signal PCLK is taken a sample, and output periodic signal W kIn step S73, statistic unit 640 preset standard signals, standard signal comprise a plurality of amplitude reference values and a plurality of cycle reference value.In step S74, statistic unit 640 is selected or is interleave out and periodic signal W kCorresponding amplitude reference value A k', so statistic unit 640 can be exported corresponding amplitude reference value A k' to computing unit 651.In step S75, computing unit 651 receives amplitude signal A kWith amplitude reference value A k', calculate amplitude signal A kWith amplitude reference value A k' difference value, difference value be multiply by preset multiple, use producing the second compensating parameter C2.In step S76, phasing unit 652 uses the second compensating parameter C2 adjustment cycle signal W kZero-time and concluding time, use the phase place of adjusting data-signal D1, output calibration data signal.
Its simple principle is that with same period, if the amplitude that the amplitude reference value is measured is big, i.e. the amplitude that expression is measured is less, can be transferred weak point by way of compensation.For instance, Fig. 8 is the oscillogram of the bearing calibration that recovers according to a kind of data that the 3rd example embodiment of the present invention is provided.With reference to Fig. 6 and Fig. 8, the cycle detection circuit 120 cycle W in the data-signal D1 of k section that can take a sample kExport statistic unit 640 to, and statistic unit 640 is with reference to wherein default standard signal, in order to select or to interleave out and periodic signal W kCorresponding amplitude reference value A k', export corresponding amplitude reference value A k' to computing unit 651.Amplitude detecting circuit 110 receives data-signal D1 and zero crossover point signal Z, the peak swing A of sampling in the data-signal D1 of k section kExport computing unit 651 to.
Accept above-mentionedly, computing unit 651 receives the peak swing A among the data-signal D1 of k sections kAnd amplitude reference value A k', calculate amplitude signal A kWith amplitude reference value A k' error, use formula (2) to produce the second compensating parameter C2, wherein, formula (2) is expressed as follows:
C2=K 2*(A k-A k’) (1)
At this, K 2It is a weight parameter.Then, use the second compensating parameter C2 to adjust phase place among the data-signal D1 of k section, thus,, can increase the reliability of data-signal by adjusting the periodic signal of each section in the data-signal.
[the 4th example embodiment]
Fig. 9 is the calcspar according to the correcting circuit of a kind of data recovery of the 4th example embodiment of the present invention.Please refer to Fig. 3 and Fig. 9, the key distinction of the 4th example embodiment and second example embodiment is clipper circuit 960, phase-locked loop 970 and Bit String flow generator 980.
Specifically, in this example embodiment, please refer to Fig. 9, the correcting circuit 900 that data are recovered is except that the included circuit of above-mentioned Fig. 3, also can comprise clipper circuit (slicer) 960, phase-locked loop (phase-locked loop, PLL) 970 and Bit String flow generator (bit stream generator) 980.Wherein, clipper circuit 960 couples phase-locked loop 970, amplitude detecting circuit 110 and compensating circuit 330.Phase-locked loop 970 is coupled between clipper circuit 960 and the cycle detection circuit 120.Bit String flow generator 980 couples compensating circuit 330.
Specifically, but clipper circuit 960 received RF signal RF and clipping levels, and according to clipping level cutting radiofrequency signal RF, outputting data signals D1 to the phase-locked loop 970, amplitude detecting circuit 110 and compensating circuit 330, and output zero crossover point signal Z gives amplitude detecting circuit 110 and cycle detection circuit 120.Aforementioned radiofrequency signal RF is for example read by the read head of optical memory system and is provided.Phase-locked loop 970 can receive and according to the phase place of data-signal D1 and clock signal PCLK to cycle detection circuit 120.Bit String flow generator 980 is exported after can receiving the calibration data signal of compensating circuit 330 and converting the bit crossfire to.
For instance, Figure 10 is the oscillogram of the bearing calibration that recovers according to a kind of data that the 4th example embodiment of the present invention is provided.But clipper circuit 960 received RF signal RF and clipping levels, and use clipping level cutting radiofrequency signal RF, at this, the radiofrequency signal of cutting is above-mentioned data-signal D1.Phase-locked loop 970 can receive the phase place of above-mentioned data-signal D1, and clock signal PCLK is to cycle detection circuit 120.In Figure 10, the two phase difference of the clock signal PCLK of phase-locked loop 970 output and the zero crossover point of radiofrequency signal RF is then with φ eExpression.Work as φ eFor on the occasion of the time represent the leading clock signal PCLK of zero crossover point of radiofrequency signal RF, and work as φ eThe zero crossover point of representing radiofrequency signal RF during for negative value falls behind clock signal PCLK.Wherein, φ eBe for example and without limitation to zero crossover point of selecting radiofrequency signal RF and the smaller in adjacent two clock signal PCLK phase error absolute values, this phase error absolute value less the time while at hour also be the snap point in bit signal cycle.CLK represents system clock, LVL is illustrated in the prechiasmal radio frequency level of null value (expression radiofrequency signal RF is high level or low level), TCLK represents a null value crossbar signal, periodic signal W is illustrated in null value and (represents that its Cycle Length is several T prechiasmal rf period, for example 3T or 2T), and amplitude signal A is illustrated in the prechiasmal radio frequency amplitude of null value.
In addition, amplitude detecting circuit 110 sampling is at data-signal D1 one section peak swing A wherein k, output amplitude signal A kTo statistic unit 340, produce the cycle reference value W of a correspondence k' export computing unit 351 to.And cycle detection circuit 120 sampling is at data-signal D1 one section cycle W wherein k, output periodic signal W kTo computing unit 351.Computing unit 351 receiving cycle signal W kWith cycle reference value W k', computation period signal W kDifference value W with the cycle reference value k', difference value be multiply by preset multiple, use producing the first compensating parameter C1.Phasing unit 352 uses the first compensating parameter C1 adjustment cycle signal W kZero-time and concluding time, use the phase place of adjusting data-signal D1, output calibration data signal.Export after can converting the calibration data-signal to the bit crossfire by Bit String flow generator 980 at last.This bit crossfire can be as the usefulness of follow-up data processing, and only when follow-up data processing can be used the data layout of calibration data signal, 980 of this Bit String flow generator can be omitted.
In sum, the present invention adjusts the phase place of above-mentioned data-signal between adjacent zero crossover point immediately by the amplitude and the cycle of comparison amplitude and cycle and standard signal, calibrates above-mentioned data-signal according to this.Because the data-signal after the calibration is through the compensation of phase place, reduce the phenomenon of distortion, therefore can be in order to increase the reliability of data-signal, and the recognition rate of increase data-signal, in addition, also can reduce the influence that produces the distorted signal of phase place and amplitude etc. because of noise by the instant data-signal of revising.
Though the present invention with embodiment openly as above; right its is not in order to qualification the present invention, those skilled in the art, without departing from the spirit and scope of the present invention; when doing a little change and retouching, so protection scope of the present invention is as the criterion when looking the appended claims person of defining.

Claims (16)

1. the correcting circuit that recovers of data comprises:
One amplitude detecting circuit receives a data-signal and one zero crossover point signals, according to this zero crossover point signal a plurality of amplitudes of this data-signal is taken a sample, and exports an amplitude signal;
One-period testing circuit, receiving should zero a crossover point signal and a clock signal, according to this zero this clock signal of crossover point signal-count, and exports the one-period signal; And
One compensating circuit, couple this amplitude detecting circuit and this cycle detection circuit, receive this amplitude signal, this periodic signal and this data-signal, by calculating the difference of this amplitude signal and this periodic signal and a standard signal, adjust the phase place of this data-signal, and export a calibration data signal.
2. the correcting circuit that data as claimed in claim 1 are recovered, wherein this compensating circuit comprises:
One statistics unit, couple this amplitude detecting circuit, wherein this statistic unit is preset this standard signal, and this standard signal comprises a plurality of amplitude reference values and a plurality of cycle reference value, in order to from these amplitude reference values, interleave in these cycle reference values of output with this amplitude signal is corresponding should the cycle reference value; And
One amending unit couples this statistic unit and this cycle detection circuit, receives this periodic signal and this cycle reference value, uses to produce one first compensating parameter, uses this first compensating parameter to adjust the phase place of this data-signal, and exports this calibration data signal.
3. the correcting circuit that data as claimed in claim 2 are recovered, wherein this amending unit comprises:
One computing unit couples this statistic unit and this cycle detection circuit, receives this periodic signal and this cycle reference value, calculates a difference value of this periodic signal and this cycle reference value, and this difference value be multiply by a preset multiple, uses to produce this first compensating parameter; And
One phasing unit couples this computing unit, uses this first compensating parameter to adjust the initial time and a concluding time of this periodic signal, uses the phase place of adjusting this data-signal, exports this calibration data signal.
4. the correcting circuit that data as claimed in claim 1 are recovered, wherein this compensating circuit comprises:
One statistics unit, couple this cycle detection circuit, default this standard signal of this statistic unit wherein, this standard signal comprises a plurality of amplitude reference values and a plurality of cycle reference value, exports in these amplitude reference values and corresponding this amplitude reference value of this periodic signal in order to interleave; And
One amending unit couples this statistic unit and this amplitude detecting circuit, receives this amplitude signal and this amplitude reference value, uses to produce one second compensating parameter, uses this second compensating parameter to adjust the phase place of this data-signal, and exports this calibration data signal.
5. the correcting circuit that data as claimed in claim 4 are recovered, wherein this amending unit comprises:
One computing unit couples this statistic unit and this amplitude detecting circuit, receives this amplitude signal and this amplitude reference value, calculates a difference value of this amplitude signal and this amplitude reference value, and this difference value be multiply by a preset multiple, uses to produce this second compensating parameter; And
One phasing unit couples this computing unit, uses this second compensating parameter to adjust the initial time and a concluding time of this periodic signal, uses the phase place of adjusting this data-signal, exports this calibration data signal.
6. the correcting circuit that data as claimed in claim 1 are recovered also comprises:
One cutting circuit receives a radiofrequency signal and a cutting level, cuts this radiofrequency signal according to this clipping level, and exports this data-signal and be somebody's turn to do zero crossover point signal; And
One phase-locked loop couples this clipper circuit, receives and exports this clock signal according to this data-signal.
7. the correcting circuit that data as claimed in claim 1 are recovered also comprises a Bit String flow generator, couples this compensating circuit, exports after receiving this calibration data signal and converting a bit crossfire to.
8. bearing calibration that data are recovered comprises:
A. according to one zero crossover point signals the amplitude of one data-signal is taken a sample, and obtain an amplitude signal;
B. basis is somebody's turn to do zero crossover point signal-count one clock signal, and obtains the one-period signal; And
C. by calculating the difference of this amplitude signal and this periodic signal and a standard signal, adjust the phase place of this data-signal and obtain a calibration data signal.
9. the bearing calibration that data as claimed in claim 8 are recovered, wherein step c comprises:
D., this standard signal is provided, and this standard signal comprises a plurality of amplitude reference values and a plurality of cycle reference value;
E. from these amplitude reference values, search or interleave out corresponding in these cycle reference values should the cycle reference value;
F. calculate this periodic signal and this cycle reference value of searching or interleaving out, to produce one first compensating parameter; And
G. use this first compensating parameter to adjust the phase place of this data-signal, to obtain this calibration data signal.
10. the bearing calibration that data as claimed in claim 9 are recovered, wherein step g comprises:
Calculate a difference value of this periodic signal and this cycle reference value of searching or interleaving out; And
This difference value be multiply by a preset multiple, to produce this first compensating parameter.
11. the bearing calibration that data as claimed in claim 9 are recovered, wherein step h uses this first compensating parameter to adjust the initial time and a concluding time of this periodic signal, uses the phase place of adjusting this data-signal, obtains this calibration data signal.
12. the bearing calibration that data as claimed in claim 8 are recovered, wherein step c comprises:
I., this standard signal is provided, and this standard signal comprises a plurality of amplitude reference values and a plurality of cycle reference value;
J. from these cycle reference values, search or interleave out corresponding this amplitude reference value in these amplitude reference values;
K. calculate this amplitude signal and this amplitude reference value of searching or interleaving out, to produce one second compensating parameter; And
L. use this second compensating parameter to adjust the phase place of this data-signal, to obtain this calibration data signal.
13. the bearing calibration that data as claimed in claim 12 are recovered, wherein step I comprises:
Calculate a difference value of this amplitude signal and this amplitude reference value of searching or interleaving out; And
This difference value be multiply by a preset multiple, to produce this second compensating parameter.
14. the bearing calibration that data as claimed in claim 12 are recovered, wherein step m uses this second compensating parameter to adjust the initial time and a concluding time of this periodic signal, uses the phase place of adjusting this data-signal, obtains this calibration data signal.
15. the bearing calibration that data as claimed in claim 8 are recovered also comprises:
Cut a radiofrequency signal according to a cutting level, to obtain this data-signal and to be somebody's turn to do zero crossover point signal; And
Phase place according to this data-signal produces this clock signal.
16. the bearing calibration that data as claimed in claim 8 are recovered also comprises this calibration data conversion of signals is become a bit crossfire.
CN2009101413405A 2009-06-02 2009-06-02 Correction circuit and method for restoring data Expired - Fee Related CN101908357B (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108809072A (en) * 2017-04-26 2018-11-13 泰达电子股份有限公司 Phase compensating method suitable for circuit of power factor correction
CN112532239A (en) * 2020-11-24 2021-03-19 珠海泰芯半导体有限公司 USB data recovery system

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4641815B2 (en) * 2005-02-04 2011-03-02 パナソニック株式会社 Optical disk playback device
WO2006129683A1 (en) * 2005-06-01 2006-12-07 Matsushita Electric Industrial Co., Ltd. Phase error detecting apparatus

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108809072A (en) * 2017-04-26 2018-11-13 泰达电子股份有限公司 Phase compensating method suitable for circuit of power factor correction
CN108809072B (en) * 2017-04-26 2020-10-30 泰达电子股份有限公司 Phase compensation method suitable for power factor correction circuit
CN112532239A (en) * 2020-11-24 2021-03-19 珠海泰芯半导体有限公司 USB data recovery system

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