CN101901161A - Energy consumption related software/hardware partition-oriented hierarchical control and data flow graph modeling method - Google Patents
Energy consumption related software/hardware partition-oriented hierarchical control and data flow graph modeling method Download PDFInfo
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Abstract
The invention discloses an energy consumption related software/hardware partition-oriented hierarchical control and data flow graph modeling method based on the research on conventional control and data flow graphs, and aims to provide support for the energy consumption optimization research and development of embedded software. For a C programming language, energy consumption related software/hardware partition modeling is performed by adopting a software/hardware partition-oriented hierarchical control and data flow graph method; and experimental results show that: compared with normal task graphs, a directed acyclic graph established through the energy consumption related software/hardware partition-oriented hierarchical control and data flow graph can perform certain granularity transformation as required and reasonably process a cycle structure for the C programming language, so the directed acyclic graph is favorable for obtaining an optimal partitioning result by a partitioning algorithm.
Description
Affiliated technical field
The present invention relates to embedded software power consumption optimisation technique field, especially relate to a kind of the division and propose a kind of new modeling method at the relevant software/hardware of energy consumption---towards the hierarchical control and data flow graph of dividing (PO-HCDFG:Partition-Oriented Hierarchical Control and Data Flow Graph).
Background technology
Advocate under the background of " energy-saving and emission-reduction " in country at present, the energy consumption of embedded system is a hot issue that causes that day by day people pay close attention to, and has been subjected to government agencies at all levels and software/hardware developer's great attention in the industry.
In Embedded Software Design,, an existing embedded software can be reclassified as software and hardware two parts and realize in order to satisfy practical application to demands such as time, cost, energy consumptions.So far in the research that software/hardware is divided, it is partitioning algorithm that people pay close attention to more.But less to the research of dividing modeling method, mainly adopt task image (Task Graph) modeling.In fact, a kind of effective division model can provide partitioning algorithm required accurate information, can carry out the required granularity conversion of partitioning algorithm simultaneously, thereby guarantees to divide result's rationality better, therefore, the research to software/hardware division modeling method is very necessary.
A kind of effective software/hardware is divided modeling method should possess three features: all useful informations 1) can reservation function when functional description is converted to software/hardware and divides model describing; 2) can carry out the granularity conversion; 3) can carry out the setting of expense parameter.Further, to clear and definite two problems of research needs of modeling method, the one, the describing mode of systemic-function, the 2nd, constraint condition and optimization aim that software/hardware is divided.To problem one, because the C linguistic function is abundant, flexible and convenient to use, have the advantage of higher level lanquage and low-level language concurrently, in Embedded Software Design, be widely used, therefore, can adopt C language description systemic-function; To problem two, the research of relevant software low power design has at present become a focus, therefore, is that constraint condition, software energy consumption be that the software/hardware of target divides are a kind of important optimization methods with time and cost.
The present invention is from the embedded software functional mode of C language description, on the basis of the existing control and data flow graph of research, divide a kind of new modeling method of proposition at the relevant software/hardware of energy consumption---towards the hierarchical control and data flow graph of dividing (PO-HCDFG:Partition-Oriented Hierarchical Control and Data Flow Graph).
Summary of the invention
The object of the present invention is to provide a kind of hierarchical control and data flow graph modeling method of dividing towards energy consumption related software/hardware.
The step that the present invention solves the technical scheme that its technical barrier adopts is as follows:
1) at the embedded software functional mode of C language description, analyze the grammer logical organization of C programmer, be converted into the stratification control flow graph of dividing towards software/hardware;
In PO-HCFG, arbitrary stratification node is corresponding with a system call, can be as required and engineering experience in the past, directly being appointed as software or hardware realizes, thereby not participating in follow-up partitioning algorithm handles, because in the C programmer, be limited to the system call type of embedded OS, so the IP of middle-levelization of PO-HCFG node and OP can obtain according to its parameter and rreturn value analysis; Dummy node is only done auxiliary usefulness, and the code with any reality is not corresponding, and its IP and OP are empty set; Control Node is corresponding one by one with the control statement of C language, needed variables set when its IP is control statement operation execution, the variables set of OP for changing in control statement; And the fundamental block node is corresponding with fundamental block, has carried the main Accounting Legend Code of program, because the fundamental block node only comprises the basic operation in the number of C language, therefore can set up its IP and OP by scan code.
Control structure has reflected internodal control relation, and the control structure of C language is divided into two kinds of branched structure and loop structures, and branched structure comprises two kinds of switch and if, its abstract representation respectively as among Fig. 2 a) and b) shown in; Loop structure comprises two kinds of for and while, because the while loop structure can be converted into for loop structure, its abstract representation is as c among Fig. 2) shown in.Control structure has reflected internodal control relation, and the control structure of C language is divided into two kinds of branched structure and loop structures, and branched structure comprises two kinds of switch and if, its abstract representation respectively as among Fig. 2 a) and b) shown in; Loop structure comprises two kinds of for and while, because the while loop structure can be converted into for loop structure, its abstract representation is as c among Fig. 2) shown in.
After extract on node and control limit, also need node is provided with hierachy number.The hierachy number of node can reflect the nested situation of loop structure, divides object for follow-up foundation and submits necessary information.For a PO-HCFG, define its start node v
StartHierachy number L (v
Start)=1 is because from v
StartArbitrary node in PO-HCFG can reach along control stream, and therefore, arbitrary non-dummy node has and only have a common forerunner, and dummy node then has a plurality of common forerunners, only needs to consider that a common forerunner gets final product in the process of hierachy number is set.Might as well remember v
jBe v
iCommon forerunner, then the hierachy number of each node can be provided with as follows:
L(v
i)＝L(v
j)+α+β，
Wherein, work as v
iWhen being the tail node on a winding limit, α=-1, otherwise, α=0; Work as v
jWhen being the head node on a winding limit, β=-1, otherwise, β=0.As seen, for a PO-HCFG, L (v
Start)=1, and the hierachy number of respective inner node adds 1 when control flows to into a loop structure, and the hierachy number of corresponding subsequent node subtracts 1 when withdrawing from a loop structure.
2) stratification control flow graph is carried out the data dependency analysis, set up initial hierarchical control and data flow graph towards the software/hardware division;
On the basis of PO-HCFG,, can effectively set up initial p O-HCDFG by analyzing its data dependence relation.There is a data limit de (v among the PO-HCDFG
i, v
j) necessary condition be VS (de (v
i, v
j))=OP (v
i) ∩ IP (v
j).Before setting up the data limit, need first analysis and Control flow path collection.
Arbitrary PO-HCDFG has a control flow path collection, and arbitrary element is a control flow path in the set, corresponding with a kind of possible execution route of program (only considering that for loop structure it carries out for the first time).Article one, the control flow path can be represented by the ordered sequence of all non-dummy nodes on this execution route, is designated as cpath={v
1, v
2..., v
n.The foundation of control flow path can realize by chained list and stack, and every control flow path is adopted following algorithm, can set up each data between nodes limit among the PO-HCFG:
for(i＝n；i＞1；i--)
{
S1＝IP(v
i)；
j＝i-1；
{
S2＝S1∩OP(v
j)；
Set up data limit de (v
j, v
i), make VS (de (v
j, v
i))=S2;
Put S1=S1-S2;
Put j=j-1;
}
}
The core of this algorithm is the comparison of I/O variables set, and time complexity is O (n
2), the auxiliary space that algorithm needs in carrying out is variables set S1, is limited to a constant on its variable quantity, therefore, the space complexity of algorithm is O (1).
3) according to different division object granularity requirements, current hierarchical control and data flow graph is carried out the granularity conversion, set up more excellent hierarchical control and data flow graph model towards the software/hardware division;
In software/hardware was divided, granularity of division was big more, and division speed is fast more, may be not high but divide quality; On the contrary, granularity of division is more little, can produce the division result of better quality, but division speed is also slow more and may produce bigger interface communication cost.
Node is directly converted according to C programmer in PO-CDFG, it is not the suitable division object of granularity, therefore, in PO-HCDFG, a kind of rational granularity system of selection is: adopt certain union operation to carry out coarsegrain earlier and divide, if can not obtain suitable division result, progressively adopt fractured operation to carry out granularity refinement again.
Division is divided corresponding fundamental block node of object or stratification node for one to liking the elementary cell of dividing among the PO-HCDFG.As research object, main cause comprises with loop structure for our emphasis:
1. in the research of existing partitioning algorithm, people generally represent systemic-function to be assumed to a directed acyclic graph (DAG).
For the merging of the acyclic structure method comparatively ripe with splitting existence, and the existence of loop structure causes may existing between its internal node the ring-type dependence, therefore trend towards a circulation integral body is merged into a stratification node when setting up the division object, this method may cause excessive granularity of division;
2. in a lot of typical embedded application programs, the round-robin execution time occupies larger proportion (being generally 80%～90%) in total execution time, and circulation is easy to realize on certain hardware usually.Simultaneously, by pipelining the circuit in circulating is carried out rational pipelining-stage division and can effectively improve executing efficiency.
Divide the foundation of object and follow granularity principle from big to small, therefore, before carrying out partitioning algorithm according to the hierachy number of node with initial p O-HCDFG in all nodes in each outermost loop structure merge into corresponding stratification node.A corresponding sub-PO-HCDFG of circulation might as well be expressed as G
1=(V
1, E
1), it begins/and end node is v
Start1/ V
End1, input/output end port is IP
1/ OP
1, and the stratification node table after will merging is shown v
k, L (v is then arranged
k)=L (v
Start)-1.Union operation comprises control stream and the two-part operation of data stream, being operating as on the control stream: if having node v among the G
x, satisfy v
x=NOR_PRE (v
Start1), then set up control limit ce (v
x, v
k), deletion control limit ce (v
x, v
Start1); If have v among the G
y=NOR_SUC (v
End1), set up control limit ce (v
k, v
y), deletion control limit ce (v
End1, v
y).And the operation on the data stream is as follows:
Put v
iBe V
1In arbitrary node;
{
If have data limit de (v among the G
x, v
i), satisfy
Then
Put VS (de (v
x, IP
1)) ∪=VS (de (v
x, v
i)), VS (de (IP
1, v
i)) ∪=VS (de (v
x, v
i)); If have data limit de (v among the G
i, v
y), satisfy
Then
Put VS (de (v
i, OP
1)) ∪=VS (de (v
i, v
y)), VS (de (OP
1, v
y)) ∪=VS (de (v
i, v
y));
Put V
1=V
1-v
i
Put v
iBe V
1In arbitrary node;
}
In said process, travel through V
1In node, and the data limit of each node judged, if the head node or the tail node on data limit do not belong to V
1, then this data limit is changed.If V
1In the node number be n, need carry out data converted edge strip number is m, then the time complexity of said process is O (n+m).And the interim storage V that needs in the algorithm implementation
1In node, so space complexity is O (n).
In the PO-HCDFG that carries out the generation of node union operation by initial p O-HCDFG, the corresponding outer circulation of stratification node, therefore, if division can not obtain the fractured operation that suitable result then need carry out further granularity refinement.With threshold value
For the stratification node that need carry out refinement is chosen in reference.Threshold value
Be a number percent, for the stratification node v that chooses
k, the ratio that the execution time of representing the loop structure that it is corresponding accounts for total execution time greater than
Therefore can basis
Control granularity of division flexibly.With v
kIt is identical to be split as two functions, and cycle index can be by the circulation v of the personnel of division appointment
K1And v
K2With v
K1And v
K2Input/output end port be expressed as IP respectively
K1/ OP
K1And IP
K2/ OP
K2Fractured operation comprises control stream and the two-part operation of data stream, being operating as on the control stream: if having node v among the G
x, satisfy v
x=NOR_PRE (v
k), then with control limit ce (v
x, v
K1) replacement ce (v
x, v
k); If have v among the G
y=NOR_SUC (v
k), then with control limit ce (v
K2, v
y) replacement ce (v
k, v
y); Set up control limit ce (v
K1, v
K2), and the operation on the data stream is as follows:
Put S=OP
K1∩ IP
K2, if
Then
Set up data limit de (v
K1, v
K2) make VS (de (v
K1, v
K2))=S;
Right
Put S
1=VS (de (v
x, v
k)) ∩ IP
K1, S
2=VS (de (v
x, v
k)) ∩ IP
K2, then
If
Then set up data limit de (v
x, v
K1), make VS (de (v
x, v
K1))=S
1
If
Then set up data limit de (v
x, v
K2), make VS (de (v
x, v
K2))=S
2
Deleted data limit de (v
x, v
k);
Right
Put S
1=VS (de (v
k, v
y)) ∩ OP
K1, S
2=VS (de (v
k, v
y)) ∩ OP
K2, then
If
Then set up data limit de (v
K1, v
y), make VS (de (v
K1, v
y))=S
1
If
Then set up data limit de (v
K2, v
y), make VS (de (v
K2, v
y))=S
2
Deleted data limit de (v
k, v
y);
The time complexity of above-mentioned algorithm is O (m
k), the space complexity under the worst case is O (d
k), m wherein
kFor among the G with node v
kThe bar number on the data limit that links to each other, d
kBe v
kThe number of built-in function variable.
4) the expense parameter of dividing object is set, comprises execution time, area and energy consumption parameter that software/hardware is realized, for the assessment of dividing the result lays the foundation;
In order to obtain more excellent splitting scheme, need assess comparison to multiple splitting scheme, to the assessment of dividing the result to divide the expense parameter of object.In Embedded System Design, the main expense parameter of considering comprises execution time, cost and energy consumption.Wherein, cost generally can be by the software/hardware cartographic represenation of area that takies.Therefore, in modeling process, need to be provided with software/hardware execution time, area and the energy consumption parameter of respectively dividing object, for the design partitioning algorithm lays the foundation.
Estimate the fundamental block method of working time on reconfigurable hardware when the estimation of hardware parameter has compiling at present, in addition, also can obtain by the hardware synthesis developing instrument.And the estimation of software parameter generally must be carried out on the target machine level, for this reason, we have developed instruction set simulator of energy consumption a---HMSim at ARM7TDMI, this simulator can count time and the energy consumption that one section code is carried out more exactly, and the software area of division object can be by the assembly instruction bar number after the compiling and every byte number acquisition that instruction takies.
5) design energy consumption related software/hardware partitioning algorithm;
Adopt the discrete hopfield algorithm can obtain feasible solution quickly, use tabu search algorithm " taboo " current separating and transfer to other minimal points of objective function, thereby can jump out locally optimal solution and be tending towards globally optimal solution fast as main algorithm.Emulation experiment shows, compares with similar algorithm, and this algorithm not only has the advantage on the search speed, and it is higher to try to achieve the probability of globally optimal solution.
6) assess dividing the result, determine whether the result meets the demands.If meet the demands, then divide and finish; Otherwise generate granularity according to assessment result and select information, to instruct the division of next round.
Description of drawings
Fig. 1 divides process flow diagram based on the software/hardware of PO-HCDFG;
The abstract representation of Fig. 2 control structure (D1 is a dummy node);
PO-HCDFG example of Fig. 3;
PO-HCDFG after the map function of Fig. 4 granularity.
Embodiment
At at a typical C language program, adopt the PO-HCDFG method to carry out energy consumption related software/hardware and divide modeling below, left figure is depicted as c program among Fig. 3, and right figure is depicted as corresponding initial p O-HCDFG.For the purpose of clear, only marked the control limit among the figure, the data limit among the initial p O-CDFG comprises e
C2, B4(j), e
B3, B4(p, r), e
B2, B4(t), e
C2, C3(j), e
C2, B3(j), e
B2, B3(s), e
C1, B2(i), e
B1, B2(s, t), e
B3, B5(p, r), e
C2, B5(j), e
IP, B3(x, y), e
B4, OP(x, y) and e
B5, OP(x).
After initial p O-HCDFG sets up, the stratification node is merged in all outer circulations and divided, merge PO-HCDFG that the back produces shown in left figure among Fig. 4, wherein dotted line and solid line represent to control limit and data limit respectively.Execution time of node and account for the ratio of total execution time and see Table 1 among the figure.If divide and to obtain suitable division result, then according to the personnel of division specified threshold value
Select the stratification node to carry out refinement, might as well establish here
Be 50%, then the H2 node need carry out refinement in the table 1.H2 can be split as H3 and H4 according to the method described in the step 3), the PO-HCDFG after the fractionation is shown in right figure among Fig. 4.
Table 1 node implementation schedule
After dividing object and establishing, the parameters when dividing object and being realized by software/hardware respectively need be set also before dividing, it is as shown in table 2 that each divides image parameter.
Table 2 is divided the image parameter table
The result is as can be seen by experiment:
1) for the embedded system of C language description, at first set up initial p O-HCDFG, divide object according to certain Rule Extraction, and corresponding software/hardware parameter is set to dividing object, thereby set up a mathematical DAG who forms by node, control limit and data limit, wherein node represents to realize the module of certain function, internodal steering logic relation is represented on the control limit, and internodal data dependence relation is represented on the data limit, effectively realize energy consumption related software/hardware division modeling, thus the feasibility of explanation PO-HCDFG method.
2) task image is divided in the Modeling Research about software/hardware at present and is widely used.Compare with general task image, at C programmer, the DAG that sets up by PO-HCDFG can carry out the certain particle conversion as required, rationally the cycle of treatment structure, help partitioning algorithm and try to achieve more excellent division result, thus the superiority of explanation PO-HCDFG method.
Claims (1)
1. hierarchical control and data flow graph modeling method of dividing towards energy consumption related software/hardware is characterized in that the step of this method is as follows:
1) at the embedded software functional mode of C language description, analyze the grammer logical organization of C programmer, be converted into the stratification control flow graph of dividing towards software/hardware;
2) stratification control flow graph is carried out the data dependency analysis, set up initial hierarchical control and data flow graph towards the software/hardware division;
3) according to different division object granularity requirements, current hierarchical control and data flow graph is carried out the granularity conversion, set up more excellent hierarchical control and data flow graph model towards the software/hardware division;
4) the expense parameter of dividing object is set, comprises execution time, area and energy consumption parameter that software/hardware is realized, for the assessment of dividing the result lays the foundation;
5) design energy consumption related software/hardware partitioning algorithm;
6) assess dividing the result, determine whether the result meets the demands.If meet the demands, then divide and finish; Otherwise generate granularity according to assessment result and select information, to instruct the division of next round.
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| CN104360906B (en) * | 2014-10-31 | 2017-10-13 | 中山大学 | A kind of High Level Synthesis dispatching method based on difference constrained system Yu iteration mould |
| CN107516040A (en) * | 2017-07-25 | 2017-12-26 | 中国人民解放军63928部队 | A kind of Vulnerability Characteristics analysis and acquisition methods based on data controlling stream graph |
| CN109800072A (en) * | 2019-01-22 | 2019-05-24 | 深圳市简智联信息科技有限公司 | Task schedule optimization method and device based on edge calculations |
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