CN101901041B - 用于控制功率损耗的方法和设备 - Google Patents
用于控制功率损耗的方法和设备 Download PDFInfo
- Publication number
- CN101901041B CN101901041B CN201010186885.0A CN201010186885A CN101901041B CN 101901041 B CN101901041 B CN 101901041B CN 201010186885 A CN201010186885 A CN 201010186885A CN 101901041 B CN101901041 B CN 101901041B
- Authority
- CN
- China
- Prior art keywords
- memory devices
- consistency operation
- volatile memory
- power
- safely
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/30—Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/143—Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels ; Switching between alternative supplies
- G11C5/144—Detection of predetermined disconnection or reduction of power supply, e.g. power down or power standby
Abstract
Description
Claims (19)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/472,153 | 2009-05-26 | ||
US12/472,153 US8504759B2 (en) | 2009-05-26 | 2009-05-26 | Method and devices for controlling power loss |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101901041A CN101901041A (zh) | 2010-12-01 |
CN101901041B true CN101901041B (zh) | 2016-01-06 |
Family
ID=43123141
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201010186885.0A Active CN101901041B (zh) | 2009-05-26 | 2010-05-26 | 用于控制功率损耗的方法和设备 |
Country Status (6)
Country | Link |
---|---|
US (1) | US8504759B2 (zh) |
JP (1) | JP6066392B2 (zh) |
KR (1) | KR101550469B1 (zh) |
CN (1) | CN101901041B (zh) |
DE (1) | DE102010019487B8 (zh) |
SG (1) | SG166735A1 (zh) |
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CN104106057B (zh) | 2011-12-13 | 2018-03-30 | 英特尔公司 | 用非易失性随机存取存储器提供对休眠状态转变的即时响应的方法和系统 |
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DE112011106032B4 (de) | 2011-12-22 | 2022-06-15 | Intel Corporation | Energieeinsparung durch Speicherkanal-Abschaltung |
WO2013097105A1 (en) | 2011-12-28 | 2013-07-04 | Intel Corporation | Efficient dynamic randomizing address remapping for pcm caching to improve endurance and anti-attack |
US9152428B2 (en) | 2012-09-28 | 2015-10-06 | Intel Corporation | Alternative boot path support for utilizing non-volatile memory devices |
US9329990B2 (en) | 2013-01-11 | 2016-05-03 | Micron Technology, Inc. | Host controlled enablement of automatic background operations in a memory device |
US9753487B2 (en) | 2013-03-14 | 2017-09-05 | Micron Technology, Inc. | Serial peripheral interface and methods of operating same |
US9195406B2 (en) | 2013-06-28 | 2015-11-24 | Micron Technology, Inc. | Operation management in a memory device |
US9459676B2 (en) * | 2013-10-28 | 2016-10-04 | International Business Machines Corporation | Data storage device control with power hazard mode |
US9343116B2 (en) | 2014-05-28 | 2016-05-17 | Micron Technology, Inc. | Providing power availability information to memory |
US10204047B2 (en) | 2015-03-27 | 2019-02-12 | Intel Corporation | Memory controller for multi-level system memory with coherency unit |
US10387259B2 (en) | 2015-06-26 | 2019-08-20 | Intel Corporation | Instant restart in non volatile system memory computing systems with embedded programmable data checking |
US10073659B2 (en) | 2015-06-26 | 2018-09-11 | Intel Corporation | Power management circuit with per activity weighting and multiple throttle down thresholds |
US10108549B2 (en) | 2015-09-23 | 2018-10-23 | Intel Corporation | Method and apparatus for pre-fetching data in a system having a multi-level system memory |
US10261901B2 (en) | 2015-09-25 | 2019-04-16 | Intel Corporation | Method and apparatus for unneeded block prediction in a computing system having a last level cache and a multi-level system memory |
US10185501B2 (en) | 2015-09-25 | 2019-01-22 | Intel Corporation | Method and apparatus for pinning memory pages in a multi-level system memory |
US9792224B2 (en) | 2015-10-23 | 2017-10-17 | Intel Corporation | Reducing latency by persisting data relationships in relation to corresponding data in persistent memory |
US10033411B2 (en) | 2015-11-20 | 2018-07-24 | Intel Corporation | Adjustable error protection for stored data |
US10095618B2 (en) | 2015-11-25 | 2018-10-09 | Intel Corporation | Memory card with volatile and non volatile memory space having multiple usage model configurations |
US9747041B2 (en) | 2015-12-23 | 2017-08-29 | Intel Corporation | Apparatus and method for a non-power-of-2 size cache in a first level memory device to cache data present in a second level memory device |
US10007606B2 (en) | 2016-03-30 | 2018-06-26 | Intel Corporation | Implementation of reserved cache slots in computing system having inclusive/non inclusive tracking and two level system memory |
US10185619B2 (en) | 2016-03-31 | 2019-01-22 | Intel Corporation | Handling of error prone cache line slots of memory side cache of multi-level system memory |
US10120806B2 (en) | 2016-06-27 | 2018-11-06 | Intel Corporation | Multi-level system memory with near memory scrubbing based on predicted far memory idle time |
US10915453B2 (en) | 2016-12-29 | 2021-02-09 | Intel Corporation | Multi level system memory having different caching structures and memory controller that supports concurrent look-up into the different caching structures |
US10445261B2 (en) | 2016-12-30 | 2019-10-15 | Intel Corporation | System memory having point-to-point link that transports compressed traffic |
US20180261281A1 (en) * | 2017-03-10 | 2018-09-13 | Micron Technology, Inc. | Methods for mitigating power loss events during operation of memory devices and memory devices employing the same |
US10884656B2 (en) * | 2017-06-16 | 2021-01-05 | Microsoft Technology Licensing, Llc | Performing background functions using logic integrated with a memory |
US10304814B2 (en) | 2017-06-30 | 2019-05-28 | Intel Corporation | I/O layout footprint for multiple 1LM/2LM configurations |
KR102244921B1 (ko) * | 2017-09-07 | 2021-04-27 | 삼성전자주식회사 | 저장 장치 및 그 리프레쉬 방법 |
US11188467B2 (en) | 2017-09-28 | 2021-11-30 | Intel Corporation | Multi-level system memory with near memory capable of storing compressed cache lines |
US10860244B2 (en) | 2017-12-26 | 2020-12-08 | Intel Corporation | Method and apparatus for multi-level memory early page demotion |
US11099995B2 (en) | 2018-03-28 | 2021-08-24 | Intel Corporation | Techniques for prefetching data to a first level of memory of a hierarchical arrangement of memory |
US11112997B2 (en) * | 2018-08-21 | 2021-09-07 | Samsung Electronics Co., Ltd. | Storage device and operating method thereof |
CN110908491B (zh) * | 2018-08-28 | 2023-08-08 | 上海忆芯实业有限公司 | 功耗控制方法、控制部件及其电子系统 |
US11055228B2 (en) | 2019-01-31 | 2021-07-06 | Intel Corporation | Caching bypass mechanism for a multi-level memory |
Citations (2)
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CN1414443A (zh) * | 2001-10-25 | 2003-04-30 | 富士施乐株式会社 | 设备控制系统 |
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JP2010267341A (ja) * | 2009-05-15 | 2010-11-25 | Renesas Electronics Corp | 半導体装置 |
-
2009
- 2009-05-26 US US12/472,153 patent/US8504759B2/en active Active
-
2010
- 2010-04-28 SG SG201002982-5A patent/SG166735A1/en unknown
- 2010-05-05 DE DE102010019487.5A patent/DE102010019487B8/de active Active
- 2010-05-25 KR KR1020100048722A patent/KR101550469B1/ko active IP Right Grant
- 2010-05-26 CN CN201010186885.0A patent/CN101901041B/zh active Active
- 2010-05-26 JP JP2010134480A patent/JP6066392B2/ja active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1414443A (zh) * | 2001-10-25 | 2003-04-30 | 富士施乐株式会社 | 设备控制系统 |
CN101147119A (zh) * | 2005-02-16 | 2008-03-19 | 桑迪士克股份有限公司 | 快闪存储器中的直接数据文件存储实施技术 |
Also Published As
Publication number | Publication date |
---|---|
DE102010019487A1 (de) | 2010-12-23 |
KR20100127719A (ko) | 2010-12-06 |
CN101901041A (zh) | 2010-12-01 |
DE102010019487B4 (de) | 2022-12-29 |
SG166735A1 (en) | 2010-12-29 |
JP2010277685A (ja) | 2010-12-09 |
KR101550469B1 (ko) | 2015-09-04 |
DE102010019487B8 (de) | 2023-02-23 |
US20100306446A1 (en) | 2010-12-02 |
US8504759B2 (en) | 2013-08-06 |
JP6066392B2 (ja) | 2017-01-25 |
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ASS | Succession or assignment of patent right |
Free format text: FORMER OWNER: DANIELE BALLUCHI GRAZIANO MIRICHIGNI Effective date: 20150428 Owner name: MICRON TECHNOLOGY, INC. Free format text: FORMER OWNER: HENGYI COMPANY Effective date: 20150428 Owner name: HENGYI COMPANY Free format text: FORMER OWNER: CORRADO VILLA Effective date: 20150428 |
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Effective date of registration: 20150428 Address after: Idaho Applicant after: Micron Technology, Inc. Address before: Swiss Rolle Applicant before: NUMONYX B.V. Effective date of registration: 20150428 Address after: Swiss Rolle Applicant after: NUMONYX B.V. Address before: Milan Italy Applicant before: C. Villa Applicant before: D. Barucci Applicant before: G. Miligini |
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