CN101894814A - Solder bump ubm structure - Google Patents

Solder bump ubm structure Download PDF

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Publication number
CN101894814A
CN101894814A CN2010101365480A CN201010136548A CN101894814A CN 101894814 A CN101894814 A CN 101894814A CN 2010101365480 A CN2010101365480 A CN 2010101365480A CN 201010136548 A CN201010136548 A CN 201010136548A CN 101894814 A CN101894814 A CN 101894814A
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CN
China
Prior art keywords
layer
metal
metal alloy
ubm structure
joint sheet
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Granted
Application number
CN2010101365480A
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Chinese (zh)
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CN101894814B (en
Inventor
刘颂初
程子玶
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Younison (Malaysia) Co., Ltd.
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Unisem Advanced Technologies Sdn Bhd
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    • H01L2924/351—Thermal stress

Abstract

The present invention relates to solder bump ubm structure.A kind of under-bump metallization structure that is formed on a plurality of metal or metal alloy layers on the chip joint pad that comprises is disclosed.Because the thickness based on the layer of copper is lowered between about 0.3 micron and 10 microns, preferably between about 0.3 micron and 2 microns, therefore disclosed UBM structure has the stress on the semiconductor device is improved.The existence of pure stannum layer has prevented oxidation and the pollution based on the layer of nickel.But also formed good face of weld for subsequently technology.Semiconductor device with disclosed UBM structure and the method for making this semiconductor device are also disclosed.

Description

Solder bump ubm structure
Technical field
The disclosure is usually directed to semiconductor device and forming method thereof, more specifically, relate to reliable under-bump metallization with a plurality of metal or metal alloy layers (under bump metallization, UBM).
Background technology
Intercommunicated between the integrated circuit of based semiconductor (being commonly referred to " chip ") and the package lead crossed wire-bonded, solder projection or carrier band and engaged (TAB) automatically and realize.Wherein, wire-bonded technology the most normal use because it is low-cost.Yet when the size of chip-package interconnect reduced in proportion, because wire-bonded requires all I/O (I/O) connection all is routed to the edge of chip, so the Performance And Reliability of wire-bonded may be affected.
Solder bump methods is to utilize the solder ball that can reflux to come contact and the corresponding contact that encapsulates on the joint chip.Effectively substituting of relative conventional wire joining technique is provided.Usually go up the deposit solder projection at the joint sheet (bond pad) of the substrate top surface that is positioned at carries chips.Yet, between solder projection and chip, typically have the UBM structure.In U.S. Patent No. 6,878, a kind of such UBM is disclosed in 465.
This UBM structure is as the electric and mechanical interface between joint sheet and the solder projection.It provides necessary bonding and also as between the two diffusion barrier between solder projection and joint sheet.
Most of UBM structures comprise a plurality of metal or metal alloy layers.In this UBM structure, copper is normally used metal.But but it has increased the zygosity and the wettability of scolder.
Known: by during refluxing or the heat that produces between the operating period of chip, the copper reaction in tin in the solder projection and the UBM structure forms intermetallic compound.Because the intermetallic compound that forms is frangible, if therefore copper directly contacts with solder projection, with the bond strength that jeopardizes greatly between solder projection and the joint sheet.In addition, for putting out certainly of the copper that prevents to cause, use very thick copper layer usually, according to U.S. Patent Publication 2004/0217482, in the micron-sized magnitude of 4-8 by this reaction.Because copper has high thermal coefficient of expansion (CTE), therefore when using more copper, will cause more thermal stress.
Nickel is compared copper and the reaction speed of Yan Yuxi is slow, and has been introduced into and protects the copper layer in the UBM structure.Yet, the UBM structure that comprises nickel dam run into the Weldability difference of nickel and nickel dam in the intrinsic relevant problem of residual stress.
U.S. Patent No. 6,716,738 disclose another copper of formation or gold layer between solder projection and nickel dam, but but wettability and zygosity to increase this UBM structure.Yet gold is not that cost is effective, and when using copper, because copper will directly contact with solder projection, therefore will form intermetallic material.
Also need to have thin copper layer for the UBM structure, but but need to have good wettability and zygosity simultaneously.
Summary of the invention
The disclosure provides a kind of under-bump metallization structure, it comprises the layer based on titanium that is arranged on chip joint pad top, be arranged on layer based on copper based on the layer top of titanium, be arranged on based on the layer top of copper based on the layer of nickel and be arranged on pure stannum layer or ashbury metal layer (for example tin silver (tin-silver)) based on the layer top of nickel.
Because the thickness based on the layer of copper is lowered between about 0.3 micron and 10 microns, preferably between about 0.3 micron and 2 microns, therefore the stress that has semiconductor device of disclosed UBM structure improves.The existence of pure tin or ashbury metal layer has prevented oxidation and the pollution based on the layer of nickel.But also formed good face of weld for subsequently technology.
The disclosure also provides a kind of semiconductor device and manufacture method thereof with disclosed UBM structure.
Description of drawings
Fig. 1 shows the cross-sectional view according to the semiconductor device isolated part of an embodiment of the disclosure.
Fig. 2 shows the cross-sectional view of the semiconductor device isolated part of the joint sheet with redistribution.
Embodiment
Fig. 1 is the cross-sectional view that is formed on the semiconductor structure isolated part on the substrate 1 according to an embodiment of the present disclosure.As shown in Figure 1, on the surface 2 of substrate 1, joint sheet 3 is arranged.Joint sheet 3 can form via any conventional means.It is made by electric conducting material.That normal use is Al or Cu.
Have at least a passivation layer 4 to be formed on substrate 1 and joint sheet 3 tops.Passivation layer 4 among Fig. 1 is normally formed by insulating material, for example silica and silicon nitride.Electric insulation is the major function of passivation layer 4.It also is used for dust and moisture are foreclosed, and not damaged by corrosion and other with the protection chip.Dielectric layer 5 on the passivation layer 4 is made by organic material, preferred polyimides.Dielectric layer 5 is submissive (compliant), and can be used as stress-buffer layer.
In dielectric layer, form porose, to expose a part of joint sheet 3 at least.This hole can be Any shape and size.When using a plurality of passivation layer, also expose the part of each passivation layer at least.
This UBM structure is made up of a plurality of metal levels that are formed on the joint sheet 3, does not wherein have two adjacent layers to be formed by same metal or metal alloy.Be arranged on the first metal or metal alloy layer 6 on joint sheet 3 and part passivation layer 4 and 5 preferably based on titanium." based on " meaning be that at least 50% of this alloy is the metal of appointment, in this case, be titanium.It provides the excellent bonds between the joint sheet 3 and the second metal or metal alloy layer 7, and has about thickness of 500 to 3000A.
The layer 7 that is arranged on layer 6 top is preferably based on copper.This layer provides the good electrical between solder projection 10 and the joint sheet 3 to connect.It has about 0.3 to 10 micron thickness, is preferably 0.3 to 2 micron.Compare with conventional UBM structure, approach according to copper layer of the present disclosure.Because copper has high CTE and stress level is the function of CTE difference and thickness, greatly reduce thermal stress so have the UBM of thin copper layer, improved the reliability that solder projection is connected with joint sheet thus.
The 3rd metal or metal alloy layer, promptly layer 8 is arranged on layer 7 top.It is preferably by making based on nickel, and has about 1.0 microns to 5.0 microns thickness.Layer 8 is as the good barrier thing that forms for intermetallic compound between layer 7 and solder projection 10.Even extremely thin according to copper layer of the present disclosure, but because the existence of the nickel dam of disclosed thickness, it will can not put out certainly.
Be arranged on the layer 9 of layer on 8 and make by pure tin or ashbury metal, and have about 2 microns to about 10 microns thickness.But but this layer is used for increasing the wettability and the zygosity of UBM structure, and prevents the pollution of layer 8.This tin layer also helps the manufacturing process of back.
Each layer of this UBM structure can utilize conventional manufacturing technology to form, for example, and sputter, evaporation and plating technic.
By utilizing screen printing technique or scolder globule (solder sphere drop) technology that solder projection 10 is arranged on layer 9 top.
As shown in Figure 2, can this UBM structure and chip joint pad 3 be departed from by redistribution layer 11.Redistribution layer 11 covers joint sheet 3, and comprises that at least one is electrically connected to the metal level of joint sheet 3.For example, this redistribution layer can comprise titanium layer and copper layer, and wherein titanium layer covers on the joint sheet 3, and copper is deposited upon the titanium layer top.This redistribution layer is covered by one or more passivation layer usually.Passivation layer is formed with and is used for the hole of expose portion redistribution layer 11.Be formed on joint sheet 3 tops as disclosed UBM structure among first embodiment in the mode that covers the joint sheet 3 that exposes fully.

Claims (19)

1. under-bump metallization UBM structure comprises:
Be arranged on the first metal or metal alloy layer of the joint sheet top of semiconductor substrate;
Be arranged on the second metal or metal alloy layer of described ground floor top;
Be arranged on the 3rd metal or metal alloy layer of described second layer top;
Be arranged on the 4th metal or metal alloy layer of described the 3rd layer of top, described the 4th layer comprises pure tin or ashbury metal and contacts with solder projection;
Wherein there are not two adjacent layers to form by identical metal or metal alloy.
2. UBM structure as claimed in claim 1, wherein said ground floor are based on titanium.
3. UBM structure as claimed in claim 2, the wherein said second layer are based on copper.
4. UBM structure as claimed in claim 3, wherein said the 3rd layer is based on nickel.
5. UBM structure as claimed in claim 4, wherein said ground floor has the thickness of about 500-3000A; The described second layer has the thickness of about 0.3-10 micron; Described the 3rd layer of thickness with about 1.0-5.0 micron; With described the 4th layer of thickness with about 2.0-10.0 micron.
6. UBM structure as claimed in claim 5, from described joint sheet skew, described redistribution layer comprises at least one metal level that is electrically connected to described joint sheet to wherein said UBM via the redistribution layer.
7. UBM structure as claimed in claim 1, wherein said ground floor has the thickness of about 500-3000A.
8. UBM structure as claimed in claim 7, the wherein said second layer has the thickness of about 0.3-10 micron.
9. UBM structure as claimed in claim 8, wherein said the 3rd layer of thickness with about 1.0-5.0 micron.
10. UBM structure as claimed in claim 9, wherein said the 4th layer of thickness with about 2.0-10.0 micron.
11. as the UBM structure of claim 10, wherein said ground floor is based on titanium; The described second layer is based on copper; With described the 3rd layer be based on nickel.
12. UBM structure as claimed in claim 1, wherein said UBM is offset from described joint sheet via the redistribution layer; Described redistribution layer comprises at least one metal level that is electrically connected to described joint sheet.
13. as the UBM structure of claim 12, wherein said redistribution layer comprises titanium layer and copper layer, described titanium layer covers on described joint sheet and at least a portion passivation layer, and described copper is deposited upon described titanium layer top.
14. as the UBM structure of claim 13, wherein said ground floor comprises titanium; The described second layer comprises copper; And described the 4th layer comprises nickel.
15. as the UBM structure of claim 14, wherein said ground floor has the thickness of about 500-3000A; The described second layer has the thickness of about 0.3-10 micron; Described the 3rd layer of thickness with about 1.0-5.0 micron; With described the 4th layer of thickness with about 2.0-10.0 micron.
16. one kind forms the method that scolder connects, comprising on semiconductor structure:
Substrate is provided, the passivation layer that described substrate has at least one joint sheet and forms on described joint sheet, wherein said passivation layer comprises the hole of at least a portion that exposes each described joint sheet;
Form under-bump metallization UBM structure above described hole and the described passivation layer of part, described UBM structure comprises:
Be arranged on the first metal or metal alloy layer of the described passivation layer of described hole and part top,
Be arranged on the second metal or metal alloy layer of described ground floor top,
Be arranged on the 3rd metal or metal alloy layer of described second layer top,
Be arranged on the 4th metal or metal alloy layer of described the 3rd layer of top, described the 4th layer comprises pure
Tin or ashbury metal wherein do not have two adjacent layers to be formed by identical metal or metal alloy;
Form solder projection at described UBM superstructure.
17. one kind forms the method that scolder connects, comprising on semiconductor structure:
Substrate is provided, and described substrate comprises at least one joint sheet and first passivation layer that is formed on this joint sheet, and wherein said first passivation layer has the hole of at least a portion that exposes each described joint sheet;
Deposition redistribution layer above described substrate, described redistribution layer is electrically connected to each described joint sheet;
Above described redistribution layer, form second passivation layer;
Remove described second passivation layer of part to expose the described redistribution layer of at least a portion;
Form under-bump metallization UBM structure above the redistribution layer of described exposure and described second passivation layer of part, described UBM structure comprises:
Be arranged on the redistribution layer of described exposure and first gold medal of described second passivation layer of part top
Belong to or metal alloy layer,
Be arranged on the second metal or metal alloy layer of described ground floor top,
Be arranged on the 3rd metal or metal alloy layer of described second layer top,
Be arranged on the 4th metal or metal alloy layer of described the 3rd layer of top, described the 4th layer comprises pure
Tin or ashbury metal wherein do not have two adjacent layers to be formed by identical metal or metal alloy;
Form solder projection at described UBM superstructure.
18. a chip architecture comprises:
Substrate with at least one joint sheet and passivation layer, described passivation layer comprises the hole of at least a portion that exposes each described joint sheet;
Be formed on the UBM structure on the described passivation layer of described hole and part, wherein said UBM structure comprises:
Be arranged on the first metal or metal alloy layer of the described passivation layer of described hole and part top,
Be arranged on the second metal or metal alloy layer of described ground floor top,
Be arranged on the 3rd metal or metal alloy layer of described second layer top,
Be arranged on the 4th metal or metal alloy layer of described the 3rd layer of top, described the 4th layer comprises pure
Tin or ashbury metal wherein do not have two adjacent layers to be formed by identical metal or metal alloy;
Be formed on the structural solder projection of described UBM.
19. a chip architecture comprises:
Substrate with at least one joint sheet and first passivation layer, wherein said first passivation layer have first group of hole of at least a portion that exposes each described joint sheet;
Be arranged on the redistribution structure on the described substrate, described redistribution structure is electrically connected to each described joint sheet;
Be formed on structural second passivation layer of described redistribution, described second passivation layer has the second group of hole that exposes the described redistribution structure of at least a portion;
Be arranged on the UBM structure on described second group of hole and described second passivation layer of part, wherein said UBM structure comprises:
Be arranged on the first metal or metal alloy layer on through hole and part second passivation layer,
Be arranged on the second metal or metal alloy layer on the described ground floor,
Be arranged on the 3rd metal or metal alloy layer on the described second layer,
Be arranged on the 4th metal or metal alloy layer on described the 3rd layer, described the 4th layer comprises pure tin
Or ashbury metal, wherein there are not two adjacent layers to form by identical metal and metal alloy;
Be formed on the structural solder projection of described UBM.
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