CN101886286B - Ultrathin film wet preparation method for TSV insulating layer - Google Patents
Ultrathin film wet preparation method for TSV insulating layer Download PDFInfo
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- CN101886286B CN101886286B CN2010102366692A CN201010236669A CN101886286B CN 101886286 B CN101886286 B CN 101886286B CN 2010102366692 A CN2010102366692 A CN 2010102366692A CN 201010236669 A CN201010236669 A CN 201010236669A CN 101886286 B CN101886286 B CN 101886286B
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Abstract
The invention relates to an ultrathin film wet preparation method for a TSV insulating layer in the technical field of microelectronic materials, which comprises the following steps of: (1) connecting a silicon chip subjected to DRIE etching with a conductive device into an anode or cathode system serving as an anode or a cathode of the conductive device to connect an electrophoresis apparatus so as to form a circuit; (2) putting the silicon chip connected with the conductive device into electrophoretic coating solution; (3) switching on a power supply and starting to carry out electrophoretic coating; (4) after growth is completed, switching off the power supply, taking the silicon chip out of the electrophoretic coating solution and carrying out ultrasonic cleaning on a silicon through hole by using deionized water to wash off a suspended coating; and (5) carrying out primary drying and secondary drying treatment on the clean electrophoretic coated silicon chip. The ultrathin insulating film is prepared by the ultrathin film wet preparation method of the invention. The thickness of the ultrathin insulating film is between 1 and 3mu m. The ultrathin insulating film has excellent bonding force. A test result shows that the breakdown voltage of the insulating film can reach over 2MV/cm. The process flow can be operated at a low temperature. The growth speed of the coating is high. The process cost is low.
Description
Technical field
That the present invention relates to is a kind of preparation method of technical field of microelectronic material, particularly a kind of ultrathin film wet preparation method that is used for TSV (ThroughSilicon Vias, silicon through hole) insulation layer.
Background technology
The development trend of microelectronics industry is the raising performance, reduces cost.Traditional two-dimensional miniaturized strategy has reached the limit of performance, functional diversity and manufacturing cost, is replaced by the 3 D semiconductor integrated technology gradually.In various 3D integrated technologies, with its short range interconnection and superintegrated gordian technique advantage, lead 3D encapsulation technology Development Trend based on the stacked package mode of TSV perpendicular interconnection.The TSV encapsulation comprises series of key techniques, the moulding of silicon deep hole etching, and the formation of hole inner insulating layer, blocking layer and Seed Layer, and the filling of silicon the electroplates in hole etc.The existence of insulating film can prevent to form conductive channel between interconnection material copper and the silicon base, thereby improves the electricity reliability and stability of chip.Up to now, the most dry process that adopt of the insulation layer in the TSV interconnection structure, blocking layer and Seed Layer prepare, and up to the present, insulation layer, blocking layer and the Seed Layer that is used for industrialization TSV interconnection technique nearly all is to adopt dry technique.
The subject matter that dry technique exists is that integrated cost is too high, and the speed of growth is slow, difficult and subsequent technique is compatible; In addition, pertinent literature points out, when the depth-to-width ratio of through hole is big; The step coverage of traditional P VD (physical vapor deposition, physical vapour deposition) method is relatively poor, thereby is difficult to obtain uniform insulation layer, blocking layer and Seed Layer in through hole inside; Cause the conducting film quality of filling orifice to descend; Though adopt ionization PVD system that the bigger silicon pupil covering performance of depth-to-width ratio is made moderate progress, price is very expensive, has also increased the complicacy of technical process simultaneously.
Wet technique (comprising plating, electroless plating, electrophoretic painting) is just receiving increasing concern because its technology is simple, cost is low and fabulous step coverage property.
Electrodeposition coated film is a kind of wet method passivation technique for filming, utilizes extra electric field to make and is suspended in the charged corpuscle directional migration in the electrophoresis liquid and is deposited on negative electrode or the anode substrate surface.This technology has the blocking-up conductive channel; Form the ability of complete insulating film, and thickness of insulating layer can be controlled through regulating processing parameter (voltage, electric current, temperature); Therefore, prepare with the electrodeposition coated film method that insulating film has reasonableness and feasibility in the silicon through hole.Basically all more than 5p m, but blocked up insulation layer directly influences the growth of follow-up blocking layer and Seed Layer to the coat-thickness that present general electrodeposition coated film technology obtains, and existing electrodeposition coated film technology that hence one can see that is difficult to use in preparation TSV insulation layer.
Summary of the invention
The objective of the invention is to overcome the shortcoming of conventional sputter method in silicon through-hole surfaces growth insulation layer cost height, complex process, step coverage difference; And general electrodeposition coated film technology is difficult in deep hole to obtain all deficiencies of ultra-thin insulation layer, and a kind of ultrathin film wet preparation method of the TSV of being used for insulation layer is provided.Simple, with low cost, the second best in quality silicon through hole of technology of the present invention method for fabricating insulating layer; Through the electrodeposition coated film technology; Under the condition that adds sonic oscillation and rotating electrode,, improved the homogeneity and the insulativity of silicon through-hole surfaces insulation layer greatly at the ultra-thin insulating film of silicon face growth differing materials; Technology is simple, and cost is low.
The present invention realizes through following technical scheme:
The present invention includes following steps:
The silicon chip and the electric installation that < 1>will pass through DRIE (deep reaction ion etching, deep reaction ion etching) etching are connected to anode or cathod system, connect the anodal or negative pole of electrophoresis apparatus as electric installation, constitute the loop.
Described silicon chip, process DRIE etches the silicon chip of through hole, and the technical parameter of silicon chip, the etching parameters of DRIE are along with the technical indicator of TSV changes and changes; Described electric installation has good electrical conductivity, in the electrodeposition coated film process, does not react with electrodeposition coated film solution, and can guarantee that the silicon chip surface electric field distribution is even.
< 2>will put into electrodeposition coated film solution with the silicon chip that electric installation connects.
Described electrodeposition coated film solution, the concentration of the electrophoretic paint that uses is mass percent: 10%-30%.
Described electrophoretic paint is one or both of polyurethane modified epoxy resin, acrylic resin modified, modified acrylic polyurethane resin, acrylic modified epoxy resin.
Described electrodeposition coated film, the non-metallic material of stable material, inert material or process surface treatment conduction that positive plate that uses in the ability cathode electrophoresis plated film or the negative plate that in the anodic electrophoresis plated film, uses react as surfaces such as stainless steel, carbon plate, titanium spare discord electrodeposition coated film liquid etc.
< 3>opening power begins electrodeposition coated film.
Wherein said electrophoretic voltage is 30V-60V; Electrophoresis time is: 10S-60S; 25 ℃-32 ℃ of temperature
Wherein said electrodeposition coated film process adopts sonic oscillation, and the rotation stirring technique, to guarantee the homogeneity of electrodeposition coated film solution, improves the mass transfer ability of coating liquid, obtains ultra-thin, uniform electrodeposition coated film.
< 4>after growth finished, powered-down took out silicon chip from electrodeposition coated film solution, with deionized water ultrasonic cleaning silicon through hole, flush away suspension coating.
The frequency of described ultrasonic cleaning is: 25KHZ-68KHZ, the rotating speed of rotating electrode is: 50rmp-300rpm.
< 5 >, dry for the first time, secondary drying handles with the electrodeposition coated film silicon chip that cleans up.
Wherein said first bake out temperature is: 80 ℃-100 ℃; Drying time is: 10min-20min.
Described secondary drying temperature is: 150 ℃-200 ℃, drying time is: 20min-30min.
The present invention utilizes electrodeposition coated film technology grow ultra-thin insulation layer in the silicon through hole, compares the present invention with existing film preparing technology and has the following advantages:
(1) insulator film thickness of present method preparation is 1 μ m-3 μ m, and thickness is suitable, satisfies the demand of follow-up manufacturing blocking layer and Seed Layer, is adapted at using in the TSV technology.
(2) insulation layer of present method preparation combines well with silicon base.Test shows; The insulating layer material that grows and the bonding force of silicon base are greater than 2.5MPa; The bonding force of polymkeric substance such as negativity SU-8 photoresist material that adopts mechanical spin coating is greater than 0.3MPa, and the bonding force of polymkeric substance such as Parylene film that adopts the moulding of CVD technology is greater than 0.7MPa.Can find out that electrodeposition coated film is bigger 8 times than spin coating polymkeric substance SU-8 photoresist material with the bonding force of silicon base, and is bigger more than 3 times than CVD polymer P arylene.
(3) the super model insulation layer technology that is applied to TSV of the present invention's preparation, cost is low, and technical process is simple, reduce power consumption, pollution-free, has the very strong market competitiveness.
Description of drawings
Fig. 1 is the silicon through hole diagrammatic cross-section that deep reaction ion etching goes out.
Fig. 2 is the silicon through hole diagrammatic cross-section that grows insulation layer.
Embodiment
Elaborate in the face of embodiments of the invention down: present embodiment provided detailed embodiment and concrete operating process, but protection scope of the present invention is not limited to following embodiment being to implement under the prerequisite with technical scheme of the present invention.
Embodiment 1
The preparation of the ultra-thin insulating film of polyurethane modified epoxy resin
Present embodiment adopts the ability cathode electrophoresis coating process, uses the polyurethane modified epoxy resin electrophoretic paint, specifically may further comprise the steps:
(1) pending silicon chip is linked to each other with electric installation, electric installation connects the negative pole of power supply, and the electrophoresis apparatus anode connects positive source as anode system.
(2) silicon chip is put into the electrodeposition coated film liquid that contains 10% polyurethane modified epoxy resin, under 25 ℃ condition, impressed frequency is the sonic oscillation of 25KHZ, and the rotating electrode rotating speed is 50rmp, and electrophoretic voltage is set at 30V, ability cathode electrophoresis 10S.
(3) after on request time accomplishes electrodeposition coated film, take out silicon chip, with deionized water ultrasonic cleaning silicon through hole, flush away suspension coating.
The silicon chip that (4) will clean carries out drying treatment, the first step preliminary drying: temperature is 80 ℃, and the time is 20min; The back baking of second step: temperature is 150 ℃, and the time is 30min.
Insulator film thickness through method for preparing is 1.1 μ m, and insulativity is good, and recording its voltage breakdown is 1.98MV/cm.
Embodiment 2
The preparation of the ultra-thin insulating film of modified acrylic polyurethane resin
Present embodiment adopts the ability cathode electrophoresis coating process, uses the modified acrylic polyurethane cold coating, specifically may further comprise the steps:
(1) pending silicon chip is linked to each other with electric installation, electric installation connects the negative pole of power supply, and the electrophoresis apparatus anode connects positive source as anode system.
(2) silicon chip is put into the electrodeposition coated film liquid that contains 20% modified acrylic polyurethane resin, under 25 ℃ condition, impressed frequency is the sonic oscillation of 50KHZ, and the rotating electrode rotating speed is 200rmp, and electrophoretic voltage is set at 45V, ability cathode electrophoresis 30S.
(3) after on request time accomplishes electrodeposition coated film, take out silicon chip, with deionized water ultrasonic cleaning silicon through hole, flush away is floating to be coated with lacquer.
The silicon chip that (4) will clean carries out drying treatment, the first step preliminary drying: temperature is 90 ℃, and the time is 15min; The back baking of second step: temperature is 180 ℃, and the time is 25min.
Insulator film thickness through method for preparing is 2.0 μ m, and insulativity is good, and recording its voltage breakdown is 2.01MV/cm.
Embodiment 3
The preparation of the ultra-thin insulating film of acrylic modified epoxy resin
Present embodiment adopts the anodic electrophoresis coating process, uses the acrylic modified epoxy resin electrophoretic paint, specifically may further comprise the steps:
(1) pending silicon chip is linked to each other with electric installation, electric installation connects the positive pole of power supply, and the electrophoresis apparatus negative electrode connects power cathode as cathod system.
(2) silicon chip is put into the electrodeposition coated film liquid that contains 30% acrylic modified epoxy resin, under 30 ℃ condition, impressed frequency is the sonic oscillation of 68KHZ, and the rotating electrode rotating speed is 300rmp, and electrophoretic voltage is set at 60V, anodic electrophoresis 60S.
(3) after on request time accomplishes electrodeposition coated film, take out silicon chip, with deionized water ultrasonic cleaning silicon through hole, flush away is floating to be coated with lacquer.
The silicon chip that (4) will clean carries out drying treatment, the first step preliminary drying: temperature is 100 ℃, and the time is 20min; The back baking of second step: temperature is 200 ℃, and the time is 30min.
Insulator film thickness through method for preparing is 2.9 μ m, and insulativity is good, and recording its voltage breakdown is 2.25MV/cm.
Claims (8)
1. a ultrathin film wet preparation method that is used for the TSV insulation layer is characterized in that, may further comprise the steps:
The silicon chip and the electric installation that < 1>will pass through the DRIE etching are connected to anode or cathod system, and electric installation connects the anodal or negative pole of electrophoresis apparatus, constitutes the loop;
< 2>will put into electrodeposition coated film solution with the silicon chip that electric installation connects;
< 3>opening power begins the electrodeposition coated film of electrophoretic painting process;
< 4>after growth finished, powered-down took out silicon chip from electrodeposition coated film solution, with deionized water ultrasonic cleaning silicon through hole;
< 5 >, dry for the first time, secondary drying handles with the electrodeposition coated film silicon chip that cleans up;
The thickness of described ultrathin membrane is 1～3 μ m;
The concentration of the electrophoretic paint that described electrodeposition coated film solution uses is mass percent: 10%-30%;
Described electrophoretic paint is one or both of polyurethane modified epoxy resin, acrylic resin modified, modified acrylic polyurethane resin, acrylic modified epoxy resin.
2. the ultrathin film wet preparation method that is used for the TSV insulation layer according to claim 1; It is characterized in that; Described silicon chip, process DRIE etches the silicon chip of through hole, and the technical parameter of its silicon chip and the etching parameters of DRIE are along with the technical indicator of TSV changes and changes.
3. the ultrathin film wet preparation method that is used for the TSV insulation layer according to claim 1 is characterized in that, described electrodeposition coated film, the positive plate that uses in the ability cathode electrophoresis plated film or the non-metallic material of negative plate for conducting electricity of in the anodic electrophoresis plated film, using.
4. the ultrathin film wet preparation method that is used for the TSV insulation layer according to claim 1 is characterized in that, described electrophoretic voltage is 30V-60V; Electrophoresis time is: 10S-60S; 25 ℃-32 ℃ of temperature.
5. according to the ultrathin film wet preparation method that is used for the TSV insulation layer described in the claim 1, it is characterized in that described electrodeposition coated film adopts sonic oscillation, and the rotation stirring technique.
6. according to the ultrathin film wet preparation method that is used for the TSV insulation layer described in the claim 1, it is characterized in that the frequency of described ultrasonic cleaning is: 25KHz-68KHz.
7. according to the ultrathin film wet preparation method that is used for the TSV insulation layer described in the claim 1, it is characterized in that described first bake out temperature is: 80 ℃-100 ℃; Drying time is: 10min-20min.
8. according to the ultrathin film wet preparation method that is used for the TSV insulation layer described in the claim 1, it is characterized in that described secondary drying temperature is: 150 ℃-200 ℃, drying time is: 20min-30min.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2010102366692A CN101886286B (en) | 2010-07-27 | 2010-07-27 | Ultrathin film wet preparation method for TSV insulating layer |
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| CN2010102366692A CN101886286B (en) | 2010-07-27 | 2010-07-27 | Ultrathin film wet preparation method for TSV insulating layer |
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| CN101886286B true CN101886286B (en) | 2012-02-29 |
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| CN102409385A (en) * | 2011-11-28 | 2012-04-11 | 上海交通大学 | Side wall insulting method for microelectrode array |
| CN103879951B (en) * | 2012-12-19 | 2016-01-06 | 中国科学院上海微系统与信息技术研究所 | The preparation method of silicon through hole |
| CN107785132A (en) * | 2016-08-24 | 2018-03-09 | 泰科电子(上海)有限公司 | Heat-shrink tube and the method for making heat-shrink tube |
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| US4714646A (en) * | 1986-03-24 | 1987-12-22 | International Business Machines Corporation | Electrophoretic insulation of metal circuit board core |
| JP4098673B2 (en) * | 2003-06-19 | 2008-06-11 | 新光電気工業株式会社 | Manufacturing method of semiconductor package |
| CN101452907B (en) * | 2008-12-30 | 2011-04-20 | 北京大学 | Vertical interconnecting through-hole for three-dimensional systematic encapsulation, and preparation thereof |
| CN101540295B (en) * | 2009-04-21 | 2011-01-26 | 北京大学 | Preparation method of insulation layer of TSV through hole |
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