CN101883126B - DP-NET data link control mechanism with strict time certainty - Google Patents

Abstract

The invention provides a DP-NET data link control method with strict time certainty, comprising a time certainty bus polling engine (TCPE) mechanism, a link data additional transmission (LDAT) mechanism and a time definiteness link data memory control (LDMC) mechanism; particularly, a time certainty polling period control table (TCPPCT) is provided to realize strict time certainty polling to each slave station under a given period; the LDAT mechanism is provided to realize the instantaneity of bus management operation on the premise that the strict time certainty polling requirement of each slave station is realized under the given period; the time definiteness link data memory control method is provided to realize the priority level and the certainty of the bus data on the transmission time. Currently, the DP-NET bus with the strict time certainty data link control method can be applied in multiple projects of multiple state-owned big power stations. The practice proves that the DP-NET data link control method with the strict time certainty provided by the invention realizes strict time certainty data access of a main controller to each slave station under the given period, thus achieving the purpose of the invention.

Description

There is the deterministic DP-NET data link of strict time controlling mechanism

Technical field

The present invention relates to a kind of about DP-NET (Rigid Time Decentralized Peripheral Access Net, abbreviation DP-NET) the time determinability data link of bus is controlled (Time Certainty Data Link Control, be called for short TCDLC) mechanism, more particularly, relate to a kind of for solving master controller to being distributed in the on-the-spot process control data from control appliance, realize the data link control protocol that the transmission of strict time certainty is controlled, belong to fieldbus (Fieldbus) field.

Technical background

Fieldbus is since being born, and oneself is widely used in industrial automatic control field, for industrial automatic control transfer of data provides more outstanding approach.By fieldbus, be distributed in on-the-spot intelligent measurement and control unit and automation control system and form interconnected communication network, realize the Digital Transmission of field intelligent device process signal amount in control system.It has improved control signal transmission performance, be scene, the networking of industrial automation control system, and higher automation provides solid foundation.

Fieldbus is nearly hundred kinds at present, has much become international standard, for example FF, Profibus-DP, CAN-BUS, WorldFIP, InterBus etc.For DCS (Distributed Control System the is called for short DCS) system that realizes industrial automatic control, the strict time certainty of field control data acquisition and control signal transmission is a kind of domestic demand.But at present in this field, the fieldbus of much having applied is slightly inadequate in this problem when running into big data quantity.Typical example, DCS system is in electricity generation system at present, and for electric parameters, protection is controlled and is supported it is inadequate, and when its problem is just fieldbus transmission big data quantity, protection is controlled and is difficult to accomplish strict time certainty.For this problem, what have starts with and solves from raising data transfer bandwidth, and what also have starts with and solve from system applies appropriate design.And as one of this problem-solving approach, DP-NET bus is started with from data link controlling mechanism, the transmission of implementation procedure data strict time certainty is controlled.

Fieldbus DP-NET adopts polling mechanism on data link control subject, and the poll time is strictly definite, and this Profibus-DP very wide with application is consistent substantially.But the outstanding feature of DP-NET polling mechanism is: (1), by providing bus management data and slave station process data to add polling mechanism, when realizing the strict time certainty transmission of slave station process data, guarantees the real-time Transmission of bus management data; (2), by slave station strict time certainty polling cycle control table mechanism is provided, realize the strict certainty access under the different polling cycles of different slave stations.By these two means, optimized principal and subordinate's polling mechanism; effectively utilized the high bandwidth of DP-NET physical link; realized DP-NET main station controller under large process data amount the strict time certainty transmission of field data has been controlled, for DCS system participation power plant system electric parameters protection control provides, provided powerful support for.

Summary of the invention

The object of the invention is: research and develop a kind of independent intellectual property right that has, the outstanding DP-NET data link controlling mechanism that solves strict this problem of certainty of time of DCS systematic procedure transfer of data.

1, the invention provides a kind of bus data link controlling mechanism TCDLC with time determinability, it comprises:

(1) time determinability bus polling engine (Time Certainty Polling Engine is called for short TCPE) mechanism;

(2) link data additional transmitted (Link Data Appending Transmission is called for short LDAT) mechanism;

(3) time determinability link data Memory control (Link Data Memory Control is called for short LDMC) mechanism.

Preferably, described DP-NET main website data link control protocol employing application-specific integrated circuit (ASIC) (ApplicationSpecific Integrated Circuit is called for short ASIC) chip DPMaster realizes, or adopts software sDPMaster software to realize.

2, the principal and subordinate's polling engine mechanism RTPE that the invention provides a kind of time determinability, it comprises:

(1) time determinability polling system (Time Certainty Control for Polling is called for short TCCP) mechanism;

(2) data link management is controlled (Data Link Management Control is called for short DLMC) mechanism;

(3) poll is replied control (Polling and Response Control is called for short PRC) mechanism.

3, the invention provides a kind of time determinability cycle polling controlling mechanism, comprising:

(1) cycle polling system (Equal Period Polling Control the is called for short EPPC) mechanism such as;

(2) adjustable cycle polling is controlled (Adjustable Polling Period Control is called for short APPC) mechanism.

4, the invention provides a kind of time determinability polling cycle control table (Time Certainty Polling PeriodControl Table is called for short TCPPCT).

5, the invention provides a kind of time determinability link data additional transmitted mechanism LDAT, this mechanism comprises:

(1) to three of bus data kinds of classification: logic control data, emergency data and bus management data;

(2) the certainty transmission to three class data: logic control data are done cycle certainty transmission, emergency data is done preferential certainty transmission, and bus management data are done uncertainty additional transmitted;

(3) the additional generting machanism of link data;

(4) the additional mechanism for resolving of link data.

6, the invention provides a kind of certainty link data memory mechanism, comprising:

(1) provide three to send buffer memory: logic control data send buffer memory, emergency data sends buffer memory and bus management data send buffer memory;

(2) provide three to receive buffer memory: logic control data receiver buffer memory, emergency data receive buffer memory and bus management data receiver buffer memory;

(3) slave station separate, stored district group (Slave Independent Memery Area Group is called for short SIMAG) type buffer memory;

(4) slave station stored in association piece group (Slave United Memery Block Group is called for short SUMBG) type buffer memory.

Compared with the prior art, advantage of the present invention comprises the following aspects:

(1) this time determinability data link controlling mechanism has realized the strict time deterministic data transmission control of DP-NET bus, controls to provide to provide powerful support for for the protection of DCS system participation power plant system electric parameters.

(2) this time determinability data link controlling mechanism provides principal and subordinate's polling cycle capable of regulating mechanism, polling cycle for the different slave stations that arrange, realize the certainty transmission of the different polling cycles of many slave stations and controlled, thereby reduced bus load, improved bus bandwidth utilance.

(3) this time determinability data link controlling mechanism has realized the Dynamic Maintenance function of efficient DP-NET bus links, by data link additional transmitted mechanism, realizes the real time polling of bus management data.Guaranteeing, under the strict time certainty prerequisite of specified data transmission, to have met the dynamic fault error correction of bus node, the basic function demands such as dynamical system upgrading.

Accompanying drawing explanation

Fig. 1 represents the deterministic principal and subordinate's polling engine mechanism of strict time according to the present invention;

Fig. 2 represents according to additional data generting machanism of the present invention;

Fig. 3 represents according to additional data mechanism for resolving of the present invention;

Fig. 4 represents according to bus master certainty link data caching mechanism of the present invention;

Fig. 5 represents according to bus master polling cycle control table mechanism of the present invention.

Embodiment

Bus master data link controlling mechanism TCDLC of the present invention is comprised of following part:

1) strict time certainty bus polling engine mechanism TCPE;

2) link data additional transmitted controlling mechanism LDAT;

3) time determinability link data Memory control mechanism LDMC.

One, please refer to Fig. 1, the deterministic principal and subordinate's polling engine mechanism of strict time of the present invention TCPE is comprised of following part:

1) be responsible for the TCCP of time determinability polling system: it is by timer (being shown in figure with P1), time determinability polling cycle control table TCPPCT (being shown in figure with P8), and poll pattern change over switch MUX (being shown in figure with P11) forms;

2) be responsible for poll and reply the PRC of control: it is by polling system (being shown in figure with P4) and reply control (being shown in figure with P5) formation;

3) be responsible for the DLMC that bus links management is controlled: it is by orderly movable slave station chain (Orderly List of ActiveSalve, be called for short OLAS) (with P2, being shown in figure), unordered inactive slave station chain (Disorderly List of InactiveSalve, be called for short DLIS) (with P3, being shown in figure), and data link is controlled DLC (being shown in figure with P6) formation.

There is the following course of work in each several part:

The 1.TCPE course of work comprises following two:

The establishment process of next the poll slave station under the cycle such as a, realization polling system EPPC pattern:

$\left\{\begin{array}{cc}P2:C7\→(C3,D1)& ---\left(1\right)\\ P11:(C3,\mathrm{MUX}=\mathrm{EPPC})\→C4& ---\left(2\right)\end{array}\right.$

Subprocess (1), the moving slave station chain OLAS that lives determines the process of the slave station that the next one will be polled in order.Receive that data link controls after the control signal C7 that DLC link P6 sends, orderly movable slave station chain P2 determines after the next slave station that will be polled of output, when sending this poll node poll acknowledgement control signal C3, prepare out this slave station information D 1, start-up time certainty polling system TCCP the course of work.

Subprocess (2), realization waits the process of cycle polling system EPPC model selection.It is APPC pattern that selector switch MUX is set, and this poll node poll acknowledgement control signal C3, through link P11, directly as next node poll acknowledgement control signal C4 output, is started to the course of work of inquiry controlling unit P4.

B, realize the establishment process that capable of regulating cycle polling is controlled next the poll slave station under APPC pattern:

$\left\{\begin{array}{cc}P2:C7\&RightArrow;(C3,D1)& ---\left(1\right)\\ P11:(C3,\mathrm{MUX}=\mathrm{APPC})\&RightArrow;C3& ---\left(2\right)\\ P8:(\mathrm{<figure-callout\; id="2"\; label="C"\; filenames="HA20170019200910083651001E00031.png,HA20170019200910083651001E00041.png"\; state="\{\{state\}\}">C</figure-callout>}2,C3,D1)\&RightArrow;C4& ---\left(3\right)\end{array}\right.$

Subprocess (1), the moving slave station chain of living is determined the process of the slave station that the next one will be polled in order.Receive that data link controls after the control signal C7 that DLC link P6 sends, orderly movable slave station chain P2 determines that exporting the next one wants polled slave station, when sending this poll node poll acknowledgement control signal C3, prepare out this slave station information D 1, start-up time certainty polling system TCCP the course of work.

Subprocess (2), realizes capable of regulating cycle polling and controls APPC model selection process.It is APPC pattern that selector switch MUX is set, and link P11 sends this poll node poll acknowledgement control signal C3, starts the poll periodic Control table P8 course of work.

Subprocess (3), the polling cycle control table course of work.Receive after poll node poll acknowledgement control signal C3, polling cycle table P8 reads this slave station information D 1, this slave station is done to the judgement whether polling cycle arrives, the finally output using the result of confirming as next node poll acknowledgement control signal C4, the course of work of startup inquiry controlling unit P4.

2. poll is replied and is controlled the PRC course of work and comprise following two:

A, strict certainty inquiry of deadline control procedure:

$\left\{\begin{array}{cc}P4:(C4,D0)\&RightArrow;C8& ---\left(1\right)\\ P4:(C4,D1)\&RightArrow;(\mathrm{<figure-callout\; id="10"\; label="C"\; filenames="HA20170019200910083651001E00041.png"\; state="\{\{state\}\}">C</figure-callout>}10,D5)& ---\left(2\right)\\ P4:(C5,D2)\&RightArrow;(C11,D5)& ---\left(3\right)\\ P4:(C8,D3)\&RightArrow;(C11,D5)& ---\left(4\right)\end{array}\right.$

Subprocess (1), realizes the process that polling operation is confirmed.Receive after the next node poll acknowledgement control signal C4 that TCCP sends, inquiry controlling unit P4 reads confirmation D0 and processes, if D0 indication does not exist while needing next of poll slave station, P4 feedback redefines the control request signal C8 of next polling message, and log-on data link is controlled the course of work of DLC link P6.

Subprocess (2), the process that the process data inquiry of slave station is controlled is determined in realization.Receive after the next node poll acknowledgement control signal C4 that TCCP sends, inquiry controlling unit P4 also processes after reading confirmation D0, if D0 indication need to confirm next slave station poll time, read this slave station information D 1, when being ready to this poll slave station information D 5, the output procedure data C10 that transmits control signal, start-up time the certainty Memory control LDMC course of work.

Subprocess (3), realizes the process that the inquiry of unknown slave station is controlled.Receive after the definite inactive slave station polling request control signal C5 of DLC link, inquiry controlling unit P4 reads this inactive slave station information D 2 and processes, when preparing out this poll slave station information D 5, output link data are added control signal C11, start the additional course of work that sends controlling unit.

Subprocess (4), realizes the process that bus links management inquiry is controlled.Receive after the definite bus management message polling control request signal C8 of DLC link, inquiry controlling unit P4 reads management inquiry information D 3 and processes, when preparing out this management polling message D5, output link data are added control signal C11, start the additional course of work that sends controlling unit.

The process that b, deadline definite response are controlled:

P5：(C14，D7)→(C9，D6)

By the additional reception controlling unit P8 of link data additional transmitted LDAT, the link acknowledgement data receiver control request signal C14 sending, triggering is replied controlling unit P5 and is read link acknowledgement data D7, completes and replys control procedure.Finally the link acknowledgement data D6 processing is done to output and prepare, the control request signal of output link management simultaneously C9, log-on data link is controlled the course of work of DLC.

3. data link management control DLMC comprises the following course of work:

$\left\{\begin{array}{cc}P6:\mathrm{<figure-callout\; id="1"\; label="C"\; filenames="HA20170019200910083651001E00011.png,HA20170019200910083651001E00031.png"\; state="\{\{state\}\}">C</figure-callout>}1\&RightArrow;C7& ---\left(1\right)\\ P6:C8\&RightArrow;C6& ---\left(2\right)\\ P6:C8\&RightArrow;(C8,D3)& ---\left(3\right)\\ P6:(C9,D6)\&RightArrow;(C6,C7,D3)& ---\left(4\right)\\ P2:(C7,D3)& ---\left(5\right)\\ P3:(C6,D3)& ---\left(6\right)\end{array}\right.$

Subprocess (1), realization starts the process of definite work of the movable slave station of next poll.After receiving the automatic regular polling control signal C1 that timer P1 sends, data link is controlled DLC link P6 when the movable slave station of next poll of output is determined request msg D3, the C7 that transmits control signal, startup activity slave station chain P2 carries out definite course of work of next movable slave station that needs poll.

Subprocess (2), realization starts the process of definite work of the inactive slave station of next poll.Receiving the redefining after polling message control signal C8 of inquiry controlling unit P4 feedback, when not existing bus links to control poll demand, data link is controlled DLC link P6 when the movable slave station of next poll of output is determined request msg D3, output control signal C6, starts unordered non-slave station chain P3 alive and carries out definite course of work that next needs initialized inactive slave station.

Subprocess (3), realizes the process that bus links is controlled definite work of polling message that starts.Receiving the redefining after polling message signal C8 of polling system P4 feedback, when there is bus management demand, data link is controlled the management data D3 that inquiry is wanted in the preferential output of DLC link P6, send bus management data polling request signal C8 simultaneously, start the poll course of work that inquiry controlling unit P4 carries out bus links management information.

Subprocess (4), realizes the process that data link is safeguarded.After receiving the link acknowledgement processing control request signal C9 that replys controlling unit P5 transmission, data link is controlled DLC link P6 and is read the link acknowledgement data D6 that P5 prepares.Link management data according to link acknowledgement data D6 and corresponding subprocess (3) institute inquiry, complete following data link management subprocess:

1) realize data link management control procedure.The data link management of doing according to subprocess (3) is controlled inquiry, with link acknowledgement information, carry out the management control work such as status poll, configuration verification, failure diagnosis, statistic record, link redundancy arbitration, its result is exported with data D3, and send control signal C7, start the slave station maintenance process of orderly movable slave station chain P2.

2) realize the deterministic process of bus to the operation of slave station dynamic appending, also realize the deterministic process that bus slave station " heat is inserted " is controlled.The inactive slave station inquiry of bus links and the link acknowledgement situation according to subprocess (3), done, making slave station does after the judgement of " heat is inserted " operation, when sending slave station from inactive chain removal request data D3, the C6 that transmits control signal starts the course of work of unordered dynamic inactive chain P3.When then sending slave station and add activity chain request msg D3, the C7 that transmits control signal, starts the course of work of orderly movable slave station chain P2.

3) realize the deterministic process of bus to the dynamic deletion action of slave station, also realize the deterministic process that bus slave station " hot drawing " is controlled.According to bus links condition managing process and bus links Redundancy Management process, to make after slave station off-line judgement, output slave station from activity chain removal request information D 3 time, sends the course of work that control signal C7 starts orderly movable slave station chain P2.Then when output slave station adds inactive slave station chain information D3, send the course of work that control signal C6 starts unordered inactive chain P3.

Subprocess (5), realizes the maintenance process of orderly movable slave station chain.Receive that, after the movable slave station supervisory signal C7 that bus links management link sends, orderly movable slave station chain link P2 reads the slave station information D 3 that bus links management link sends.According to the data of D3, the maintenance process of orderly movable slave station chain comprises following subprocess:

1) realize the process that slave station adds main website activity chain.If D3 represents slave station, do " heat is inserted " and operate, P2 does movable slave station chain node according to slave station polling cycle size and adds in order operation, realizes the process that slave station adds main website activity chain.

2) realize the process that slave station is deleted from main website activity chain.If D3 represents slave station, do " hot drawing " and operate, P2 does the orderly deletion action of orderly movable slave station chain node, the process that realization activity slave station is deleted.

3) realization activity slave station managing control information maintenance process.If D3 represents slave station managing control information, upgrade, P2 does the slave station information of safeguarding upgrading, realization activity slave station managing control information maintenance process.

Subprocess (6), completes the maintenance process of inactive slave station chain.Receive that, after the inactive slave station supervisory signal C6 that bus links management link sends, inactive slave station chain link P3 reads the slave station information D 3 that bus links management link sends.According to the data of D3, the maintenance process of inactive slave station chain comprises following subprocess:

1) realize the process that slave station adds the inactive chain of main website.If D3 represents slave station, do " hot drawing " and operate, P2 does chain node by this slave station and adds operation, realizes the process that slave station adds the inactive chain of main website.

2) realize the process that slave station is deleted from the inactive chain of main website.If D3 represents slave station, do " heat is inserted " and operate, P2 does the orderly deletion action of inactive slave station chain node, realizes the process that slave station is deleted from the inactive chain of main website.

Two, please refer to Fig. 1, certainty link data additional transmitted mechanism LDAT of the present invention is comprised of following part again:

1) the additional controlling unit (being shown in figure with P7) that sends of link data

2) the additional controlling unit (being shown in figure with P8) that receives of link data

There is the following course of work in each several part:

1, the additional transmission of link data is controlled and is comprised following process:

$\left\{\begin{array}{cc}P7:(C13,D8,D9,D10)\&RightArrow;(C22,D14)& ---\left(1\right)\\ P7:(C11,D5)\&RightArrow;(C22,D14)& ---\left(2\right)\\ P7:(C11,C13,D5,D8,D9,D10)\&RightArrow;(C22,D14)& ---\left(3\right)\end{array}\right.$

Subprocess (1), the additional process sending of implementation procedure data.At LDMC, send the additional of preferential controlling unit P18 output and send request under signal C13 triggering, additional sending link P7 reads the highest priority data D8 that P18 controls output, and D9, or D10 process according to the envelope frame of additional data generting machanism implementation procedure data.The isl frame D14 that output has added exports the signal C22 that transmits control signal simultaneously, starts the course of work of serial data transmitting element SDSTC.

Subprocess (2), realizes the additional process of sending of link management polling data.Additional the sending request under the triggering of signal C11 of link management control data, additional sending link P7 reads link management polling data D5, the envelope frame that completes management polling data by additional data generting machanism is processed, the isl frame D14 that output has added, export the signal C22 that transmits control signal simultaneously, start the course of work of serial data transmitting element SDSTC.

Subprocess (3), realizes the additional process of sending of link management data and application data.At LDMC, send the additional of preferential controlling unit P18 output and send request after signal C13 triggering, additional sending link reads the highest priority data D8 that P18 controls output, D9, or D10.If now receive the additional signal C11 that sends request of link management data, from data link, control DLC link P6 simultaneously and read link management polling data D5, by additional data generting machanism, append to process data.The isl frame D14 that finally output has added exports the signal C22 that transmits control signal simultaneously, starts the course of work of serial data transmitting element SDSTC.

2, the additional reception of link data is controlled and is comprised following process:

$\left\{\begin{array}{cc}P7:(C23,D15)\&RightArrow;(C14,D7)& ---\left(1\right)\\ P7:(C23,D15)\&RightArrow;(C23,D11,D12,D13)& ---\left(2\right)\end{array}\right.$

Subprocess (1), realizes the additional receiving course of reply data link control and management information.Additional, receive after the character stream data reception signal C23 that controlling unit P8 receives that SDSTC sends, by data D15, receive after complete link data frame, the parsing that completes reply data link control and management information receives.Finally output is replied and is received signal C14, and prepares output reply data link control and management information D 7.

Subprocess (2), realizes the additional parsing receiving course of answering data.Additional, receive after the character stream data reception signal C23 that controlling unit P8 receives that SDSTC sends, by data D15, receive after complete link data frame, complete the parsing that receives answering data in data and receive.Finally output is replied and is received signal C14, and prepares output answering data D11, D12, or D13.

Three, please refer to Fig. 1, certainty link data memory mechanism TCMC of the present invention is comprised of following part again:

1) send priority controlling unit (being shown in figure with P18);

2) receive priority controlling unit (being shown in figure with P19);

3) emergency data sends buffer memory (being shown in figure with P12);

4) logic control data send buffer memory (being shown in figure with P13);

5) bus management data send buffer memory (being shown in figure with P14);

6) emergency data receives buffer memory (being shown in figure with P15);

7) logic control data receiver buffer memory (being shown in figure with P16);

8) bus data receives buffer memory (being shown in figure with P17);

There is the following course of work in each several part:

1, send priority control and comprise following process

$\left\{\begin{array}{cc}P18:\mathrm{<figure-callout\; id="10"\; label="C"\; filenames="HA20170019200910083651001E00041.png"\; state="\{\{state\}\}">C</figure-callout>}10\&RightArrow;(C13,\mathrm{<figure-callout\; id="16"\; label="C"\; filenames="HA20170019200910083651001E00041.png"\; state="\{\{state\}\}">C</figure-callout>}16,D8)& ---\left(1\right)\\ P18:\mathrm{<figure-callout\; id="10"\; label="C"\; filenames="HA20170019200910083651001E00041.png"\; state="\{\{state\}\}">C</figure-callout>}10\&RightArrow;(C13,C17,D9)& ---\left(2\right)\\ P18:\mathrm{<figure-callout\; id="10"\; label="C"\; filenames="HA20170019200910083651001E00041.png"\; state="\{\{state\}\}">C</figure-callout>}10\&RightArrow;(C13,C18,D10)& ---\left(3\right)\\ P18:\mathrm{<figure-callout\; id="10"\; label="C"\; filenames="HA20170019200910083651001E00041.png"\; state="\{\{state\}\}">C</figure-callout>}10\&RightArrow;(C13,C17,C18,D9,D10)& ---\left(4\right)\end{array}\right.$

Subprocess (1), realizes the preferential transmission of emergency data and controls.The emergency data of receiving at priority transmission controlling unit P18 sends request after signal C10, output emergency data sends buffer memory P12 and sends enabling signal C16, the additional C13 that transmits control signal of output simultaneously, the additional sending link P7 of triggering reads emergency data D8 and adds transmission.

Subprocess (2), realizes the transmission of logic control data and controls.After the non-emergent data sending request signal C10 receiving at priority transmission controlling unit P18, output logic is controlled data and is sent buffer memory P13 transmission enabling signal C17, the additional C13 that transmits control signal of output simultaneously, the additional sending link P7 of triggering reads logic control data D9 and adds transmission.

Subprocess (3), realizes the transmission of bus management data and controls.After the non-emergent data sending request signal C10 receiving at priority transmission controlling unit P18, if there is no logic control data and while existing bus management data to send, output bus management data sends buffer memory P14 and sends enabling signal C18, the additional C13 that transmits control signal of output simultaneously, the additional sending link P7 of triggering reads bus management data D10 and adds transmission.

Subprocess (4), realizes the additional transmission of logic control and bus management data and controls.After the non-emergent data sending request signal C10 receiving at priority transmission controlling unit P18, when if subsistence logic is controlled data and the transmission of bus management data, output logic is controlled data and is sent buffer memory P13 transmission enabling signal C17 and bus management data transmission buffer memory P14 transmission enabling signal C18, the additional C13 that transmits control signal of output simultaneously, the additional sending link P7 of triggering reads logic control data D9 and bus management data D10 adds transmission.

2, receive priority control and comprise following process

$\left\{\begin{array}{cc}P19:C15\&RightArrow;(C19,D11)& ---\left(1\right)\\ P19:C15\&RightArrow;(C20,D12)& ---\left(2\right)\\ P19:C15\&RightArrow;(C21,D13)& ---\left(3\right)\end{array}\right.$

Subprocess (1), realizes the reception of emergency data and controls.The emergency data of receiving at priority transmission controlling unit P19 receives after request signal C15, and output emergency data receives buffer memory P15 and sends enabling signal C19, and triggering emergency data receives buffer memory P15 and reads emergency data D11.

Subprocess (2), realizes the reception of logic control data and controls.After the logic control data receiver request signal C15 receiving at priority transmission controlling unit P19, output logic is controlled data receiver buffer memory P16 and is sent enabling signal C20, triggers logic control data receiver buffer memory P16 and reads logic control data D12.

Subprocess (3), realizes the reception of bus management data and controls.After the bus management data receiver request signal C15 receiving at priority transmission controlling unit P19, output bus management data receives buffer memory P17 and sends enabling signal C21, and Trigger Bus management data receives buffer memory P17 and reads bus management data D13.

Four, please refer to Fig. 2, link additional data message generting machanism of the present invention comprises following part:

1) additional data generates FIFO (being shown in figure with P4); This FIFO is by additional data frames head part, routine data part, and additional data partly forms.

2) the additional generation of link data controlled (with P1, being shown in figure);

Additional data message generates the following process that exists:

$\left\{\begin{array}{cc}P1:(\mathrm{<figure-callout\; id="1"\; label="C"\; filenames="HA20170019200910083651001E00011.png,HA20170019200910083651001E00031.png"\; state="\{\{state\}\}">C</figure-callout>}1,\mathrm{<figure-callout\; id="2"\; label="C"\; filenames="HA20170019200910083651001E00031.png,HA20170019200910083651001E00041.png"\; state="\{\{state\}\}">C</figure-callout>}2,D5)\&RightArrow;D8& ---\left(1\right)\\ P1:(\mathrm{<figure-callout\; id="1"\; label="C"\; filenames="HA20170019200910083651001E00011.png,HA20170019200910083651001E00031.png"\; state="\{\{state\}\}">C</figure-callout>}1,\mathrm{<figure-callout\; id="2"\; label="C"\; filenames="HA20170019200910083651001E00031.png,HA20170019200910083651001E00041.png"\; state="\{\{state\}\}">C</figure-callout>}2,D5)\&RightArrow;(C3,C4)& ---\left(2\right)\\ P2:(C3,D6)\&RightArrow;D9& ---\left(3\right)\\ P3:(C3,D7)\&RightArrow;D10& ---\left(4\right)\\ P1:C5& ---\left(5\right)\end{array}\right.$

Subprocess (1), realizes the process of link generation data frame head.According to started polling data, the additional control P1 that sends of link data reads necessary poll train circuit-switched data information D 5, generates corresponding data frame head D8, and writes the additional data frames head part that additional data generates FIFO.

Subprocess (2), the process of decision polling data send mode.The additional control P1 that sends of link data sends request under the triggering of control signal C2 in the process data of log-on data link control data transmitted signal C1 and TCMC output, sends respectively routine data copy enabling signal C3 or additional data copy enabling signal C4.

Subprocess (3), expression generates the process of conventional link data.Under the routine data copy enabling signal C3 sending at the additional transmission control of link data P1 triggers, according to logic control data, do cycle certainty transmission, emergency data is done preferential certainty transmission, bus management data and data link management are controlled the principle that data are done uncertainty additional transmitted, and deterministic data is done routine data transmission, uncertainty is done the additional principle that sends, reading will be as the data message D6 of routine data poll, as corresponding routine data D9, write the routine data part that additional data generates FIFO.

Subprocess (4), expression generates the process of conventional link data.Under the additional data copy enabling signal C4 sending at the additional transmission control of link data P1 triggers, according to logic control data, do cycle certainty transmission, emergency data is done preferential certainty transmission, bus management data and data link management are controlled the principle that data are done uncertainty additional transmitted, and deterministic data is done routine data transmission, uncertainty is done the additional principle that sends, reading will be as the data message D7 of additional poll, as corresponding additional data D10, write the additional data part that additional data generates FIFO.

Subprocess (5), the transmission that starts additional data is controlled.Link data is additional to be sent and controls the P1 C5 that transmits control signal, and starts and controls the process of transmitting that additional data generates data fifo.

Five, please refer to Fig. 3, link additional data packet parsing mechanism of the present invention comprises following part:

1) additional data is resolved FIFO (being shown in figure with P4); This FIFO is by additional data frames head part, routine data part, and additional data partly forms.

2) the additional parsing of link data controlled (with P1, being shown in figure).

There is process in additional data packet parsing:

$\left\{\begin{array}{cc}P1:(\mathrm{<figure-callout\; id="1"\; label="C"\; filenames="HA20170019200910083651001E00011.png,HA20170019200910083651001E00031.png"\; state="\{\{state\}\}">C</figure-callout>}1,D8)\&RightArrow;(\mathrm{<figure-callout\; id="2"\; label="C"\; filenames="HA20170019200910083651001E00031.png,HA20170019200910083651001E00041.png"\; state="\{\{state\}\}">C</figure-callout>}2,C3)& ---\left(1\right)\\ P1:(\mathrm{<figure-callout\; id="1"\; label="C"\; filenames="HA20170019200910083651001E00011.png,HA20170019200910083651001E00031.png"\; state="\{\{state\}\}">C</figure-callout>}1,D8)\&RightArrow;(C4,D5)& ---\left(2\right)\\ P2:(\mathrm{<figure-callout\; id="2"\; label="C"\; filenames="HA20170019200910083651001E00031.png,HA20170019200910083651001E00041.png"\; state="\{\{state\}\}">C</figure-callout>}2,D9)\&RightArrow;D6& ---\left(3\right)\\ P3:(C3,D10)\&RightArrow;D7& ---\left(4\right)\\ P1:C5& ---\left(5\right)\end{array}\right.$

Subprocess (1), additional data analytical strategy process.Link data receives additional parsing of signal C1 trigger link data and controls P1, and the reception that completes link additional data D8 is resolved.According to the parsing of D8, produce routine data copy control signal C2 or additional data copy control signal C3.

Subprocess (2), data link management is controlled Data Analysis process.The additional parsing of link data reception signal C1 trigger link data controlled P1, and the reception that completes link additional data D8 is resolved, and when parsing link management control data D5, sends and replys enabling signal C4 to replying controlling unit.

Subprocess (3), routine data resolving.Routine data is resolved copy link P2, under the triggering of routine data copy control signal C2, completes the resolving of routine data, and to TCMC link output routine data D6.

Subprocess (4), additional data resolving.Additional data is resolved copy link P3, under the triggering of additional data copy control signal C3, completes the resolving of additional data, and to TCMC link output additional data D7.

Subprocess (5), the receiving course of startup resolution data.The additional parsing of link data controlled P1, after completing Data Analysis control, sends resolution data receive signal C5 to SSMS.

Six, please refer to Fig. 4, slave station separate, stored of the present invention district group SIMAG type buffer memory is achieved as follows:

1) SIMAG type buffer memory consists of the separate, stored district group corresponding to slave station;

2) each group separate, stored district, corresponding to the queue of a slave station data linear list;

3) each linear list unit in the linear list queue of each group unit, the link data message of a corresponding slave station;

4) the group number of SIMAG type buffer memory, linear list queue length, and linear list length is configurable;

5) logical data sends buffer memory and the realization of bus management data transmission buffer memory employing SIMAG type buffer memory.

Seven, please refer to Fig. 4, slave station stored in association piece group SUMBG type buffer memory of the present invention is achieved as follows again:

1) SUMBG type buffer memory consists of multistage slave station stored in association piece group;

2) each slave station stored in association piece is that unit forms by the linear list corresponding to each slave station;

3) the linear list unit of each slave station stored in association piece, corresponding to the link data message of a slave station;

4) the piece number of SUMBG type buffer memory, linear list length are configurable;

5), for data cached the reading of SUMBG, provide all the time the memory block data that have up-to-date link data;

6) for data cached the writing of SUMBG, provide all the time empty memory block.

7) logic control data acquisition is realized with SUMBG type buffer memory.

Eight, please refer to Fig. 5, time determinability polling cycle control table TCPPCT of the present invention is achieved as follows:

1) time determinability polling cycle control table TCPPCT be one about the bivariate table of slave station cycle and tributary address;

2) the every a line in table is corresponding to a value in the orderly periodic linear table of the cycle formation of whole slave stations;

3) in table, each unit comprises tributary address and two information of slave station poll permission flag;

4) each slave station is corresponding to a unit in bivariate table;

5) in table, with the slave station in a line, there is identical poll priority;

6) in table, polling cycle is less, and the poll priority having is higher.

The operation of polling cycle control table TCPPCT comprises following part:

1) slave station poll permission flag refresh process in periodic Control table;

Under the timing signal that sends at timer drives, according to calculating time of passing by whether in wait list after the periodic quantity of certain a line, by the poll permission flag set of all slave stations of slave station corresponding to this row.

2) periodic Control table slave station poll permission flag access process;

By slave station polling cycle and address, find corresponding unit, the value of read access sign, indicates zero clearing after reading.

3) periodic Control table unit adding procedure;

According to the access cycle of slave station, find the position that should add in table, do bivariate table unit and add operation.

4) periodic Control table unit delete procedure;

According to the address of slave station, find the position of answering in table, do the operation of bivariate table element deletion.

Nine, of the present invention provide etc. cycle polling system EPPC pattern realization principle as follows:

1) each polling time slot equates;

2) the next slave station in the movable slave station chain of each time slot poll;

3) in movable slave station chain, retain an empty slave node;

4) poll emergency data when empty node poll;

5) support activities slave station dynamic appending and deletion.

Ten, of the present invention provide etc. cycle polling system APPC pattern realization principle as follows:

1) each polling time slot equates;

2) each movable slave station can be set to arbitrarily the polling cycle of polling time slot integral multiple;

3) all slave stations that polling cycle are not set are endowed, and divide equally deduction and fall by all the total time slot of remaining poll after the polling time slot that polling cycle slave station occupied has been set, and be scaled the polling cycle value after polling cycle;

4) each time slot carries out poll to limit priority slave station in polling cycle control table TCPPCT;

5) retaining intrinsic polling time slot sends and uses as emergency data;

6) support activities slave station dynamic appending and while deleting, to the polling cycle value of polling cycle slave station is not set, on principle 3) automatically adjust;

7) when support activities slave station dynamic appending is with deletion, the renewal to polling cycle table TCPPCT.

11, the strict time realizing by above mechanism is determined distributed peripheral access fieldbus, and the typical technology index of realization is done as follows:

1) adopting bus baud rate typical rate is 5Mbps, maximum polling data frame length 200B, and minimum-poll is spaced apart 500us, and effective procedure data transfer bandwidth maximum can reach 4Mbps, minimum control cycle Da Keda 1ms;

2) if adopting slave station maximum node number is 127, maximum control cycle is no more than 64ms;

3) there is this relation in slave station polling cycle and slave station number: all slave station access frequency sums meet following relation:

1/T ₁* N ₁+ 1/T ₂* N ₂+ ... 1/T _k* N _k≤ 2x10 ³-C. (C is bus management constant, is less than 100) meets this condition, will realize the strict time certainty access of main website to slave station.

Claims (1)

1. a time determinability bus polling engine TCPE method, is characterized in that:

The TCPE course of work comprises following two:

The establishment process of next the poll slave station under the cycle such as a, realization polling system EPPC pattern:

Subprocess (1), orderly movable slave station chain is determined the process of the slave station that the next one will be polled, receive after the control signal that data link controlling unit sends, orderly movable slave station chain determines that exporting the next one wants polled slave station, when sending poll node poll acknowledgement control signal, prepare this slave station information, start-up time certainty polling system TCCP the course of work;

Subprocess (2), realization waits the process of cycle polling system EPPC model selection, it is EPPC pattern that selector switch is set, the output using poll node poll acknowledgement control signal as next node poll acknowledgement control signal, the course of work of startup inquiry controlling unit;

B, realize the establishment process that capable of regulating cycle polling is controlled next the poll slave station under APPC pattern:

Subprocess (1), orderly movable slave station chain is determined the process of the slave station that the next one will be polled, receive after the control signal that data link controlling unit sends, orderly movable slave station chain determines that exporting the next one wants polled slave station, when sending poll node poll acknowledgement control signal, prepare out this slave station information, start-up time certainty polling system TCCP the course of work; Subprocess (2), realizes capable of regulating cycle polling and controls APPC model selection process, and it is APPC pattern that selector switch MUX is set, and sends this poll node poll acknowledgement control signal, starts the poll periodic Control table course of work;

Subprocess (3), the polling cycle control table course of work, receive after poll node poll acknowledgement control signal, polling cycle table reads this slave station information, this slave station is done to the judgement whether polling cycle arrives, the finally output using the result of confirming as next node poll acknowledgement control signal, the course of work of startup inquiry controlling unit;

Wherein, the described cycle polling system EPPC pattern realization principle that waits is as follows:

1) each polling time slot equates;

2) the next slave station in the movable slave station chain of each time slot poll;

3) in movable slave station chain, retain an empty slave node;

4) poll emergency data when empty node poll;

5) support activities slave station dynamic appending and deletion;

It is as follows that described capable of regulating cycle polling is controlled APPC pattern realization principle:

1) each polling time slot equates;

2) polling cycle of each movable slave station is set to arbitrarily polling time slot integral multiple;

3) all slave stations that polling cycle are not set are endowed, divide equally deduction fall by all oneself the total time slot of remaining poll after the polling time slot that polling cycle slave station occupied is set, and be scaled the polling cycle value after polling cycle;

4) each time slot carries out poll to limit priority slave station in polling cycle control table TCPPCT;

5) retaining intrinsic polling time slot sends and uses as emergency data;

6) support activities slave station dynamic appending and while deleting, to the polling cycle value of polling cycle slave station is not set, on principle 3) automatically adjust;

7) when support activities slave station dynamic appending is with deletion, the renewal to polling cycle table TCPPCT.

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