CN101882548A - Method for manufacturing insulating layer of field emission device with positive grid structure - Google Patents
Method for manufacturing insulating layer of field emission device with positive grid structure Download PDFInfo
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- CN101882548A CN101882548A CN 201010229148 CN201010229148A CN101882548A CN 101882548 A CN101882548 A CN 101882548A CN 201010229148 CN201010229148 CN 201010229148 CN 201010229148 A CN201010229148 A CN 201010229148A CN 101882548 A CN101882548 A CN 101882548A
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Abstract
The invention discloses a method for manufacturing an insulating layer of a field emission device with a positive grid structure, relates to the fields of flat field emission vacuum photoelectronic devices, and solves the problem that the conventional technology for manufacturing the insulating layer is complex, the insulating property is poor, and the finished product rate is low. The method comprises the following steps of: making photoresist occupied points on a cathode electrode strip by using the photoetching technology; performing spin coating of low melting point glass paste, and making the low melting point glass paste and the photoresist have the same thickness by drying, shaping and sintering at proper temperature and performing surface polishing on the low melting point glass paste; and finally, obtaining holes for the emission of a field emitters by removing the photoresist occupied points, and manufacturing a sound field-emission grid insulating layer with the positive grid structure by combining ultrasonic vibration.
Description
Technical field
The present invention relates to flat field emission vacuum field of optoelectronic devices, be specifically related to the preparation method of the insulating barrier of positive grid structure flat field emission device.
Background technology
At present in existing technology, the version that making has the flat field emission electron tube of grid structure has three kinds: positive grid structure, side grid structure and back grid structure, wherein flat field emission electron tube effect in the process of using of producing of positive grid structure is best.Comprising several aspects: the emitting performance of emission source is stable, and the controllability of grid is stable, and the electron scattering that emission source sends is little, and the luminous point of display is neat, and the electron tube long service life of this structure.But the device of this positive grid structure also is a more complicated in the process of making, factor indefinite in the process of making is also a lot, and the feds of other two kinds of structures (side grid structure and back grid structure) in the process of making just relative much more simply, but performance differs greatly.Therefore, a kind of simple and easy method for preparing positive grid structure of invention is significant.This patent is by a kind of field emission electron tube of simple and stable process processing and fabricating positive grid structure.The critical process of the field emission electron tube of positive grid structure is the preparation of the insulating barrier between emission source and the grid, and the method for this insulating barrier of making of bibliographical information has following several at present:
1, electron beam evaporation insulating barrier, the later stage forms emission cavity by methods such as photoetching, corrosion again.
2, magnetron sputtering insulating barrier, the later stage is made emission by methods such as photoetching, corrosion again.
3, PECVD growth insulating barrier, the later stage is made emission cavity by methods such as photoetching, corrosion again.
4, silk screen printing insulating barrier, its emission cavity directly prints.
Four kinds of methods in the background technology, first three methods are the manufacturing dielectric film equipment that requirement has specialty, complex process, and for the just very difficult processing of large scale insulating barrier.The 4th kind of method, though method of operation is simple, also out of question to machining large-sized insulating barrier, the cavity in the insulating barrier that this method processes is difficult to control, rate of finished products is low.
Summary of the invention
The present invention is for solving existing complex process of making insulating barrier, poor insulativity, and the problem that rate of finished products is low provides the manufacture method of insulating barrier in a kind of feds of positive grid structure.
The manufacture method of insulating barrier in the feds of positive grid structure, this method is realized by following steps:
Step 3, at the surperficial spin coating photoresist of the described cathode electrode bar of step 2, adopt suitable temperature to carry out carrying out twice development after preceding baking, the exposure to described photoresist then; The using plasma dry etching machine carries out plasma oxidation to the photoresist of spin coating, obtains to have the glass substrate of photoresist mass point;
Spin coating low melting point glass insulation slurry on the glass substrate of step 4, photoresist mass point that step 3 is obtained, then described glass substrate is put into baking oven and carry out sintering twice, adopt diamond dust to remove the glass powder with low melting point that is higher than on the photoresist mass point by optics grinding method; Obtain the ito glass substrate of the glass powder with low melting point identical with photoresist mass point height;
Step 5, the described ito glass substrate of step 4 is continued sintering, remove the mass point of photoresist, obtain the cavity of ballistic device;
Step 6, the cavity that step 5 is obtained ballistic device adopt ultrasonic vibration, obtain the insulating barrier of feds in the positive grid structure.
Beneficial effect of the present invention: insulating barrier preparation method of the present invention is simple, the insulating barrier performance is good, the complete rule of insulating barrier, and repeatability is strong, the cavity that emission source is used can be diversified, adopts method of the present invention can prepare the cathode substrate with good emitting performance high-resolution.
Description of drawings
Fig. 1 is the schematic diagram of ito glass substrate of the present invention;
Fig. 2 is the schematic diagram of preparation cathode electrode bar on the ito glass substrate of the present invention;
Fig. 3 is a structural representation of making the photoresist mass point on the basis of Fig. 2;
Fig. 4 is the schematic diagram that the spin coating eutectic is narrowed glass dust on the basis of Fig. 3;
Fig. 5 is to the schematic diagram after Fig. 4 processed;
Fig. 6 is the schematic diagram of insulating barrier in the feds of the positive grid structure of employing the inventive method acquisition.
Among the figure: 1, ito glass, 2, the chromium metal, 3, exposed plate 4, glass powder with low melting point.
Embodiment
Embodiment one, present embodiment is described in conjunction with Fig. 1 to Fig. 6, the manufacture method of insulating barrier in the feds of positive grid structure, this method is realized by following steps:
Step 3, at the surperficial spin coating photoresist of the described cathode electrode bar of step 2, adopt suitable temperature to carry out carrying out twice development after preceding baking, the exposure to described photoresist then; The using plasma dry etching machine carries out plasma oxidation to the photoresist of spin coating, obtains to have the glass substrate of photoresist mass point;
Spin coating glass powder with low melting point insulation paste on the glass substrate of step 4, photoresist mass point that step 3 is obtained, then described glass substrate is put into baking oven and carry out sintering twice, adopt diamond dust to remove the glass powder with low melting point that is higher than on the photoresist mass point by optics grinding method; Obtain the ito glass substrate of the glass powder with low melting point identical with photoresist mass point height;
Step 5, the described ito glass substrate of step 4 is continued sintering, remove the mass point of photoresist, obtain the cavity of ballistic device;
Step 6, the cavity that step 5 is obtained ballistic device adopt ultrasonic vibration, obtain the insulating barrier of feds in the positive grid structure.
The described employing photoetching of step 2 in the present embodiment, corroding method at the concrete grammar that the described chromium metallic surface of step 1 prepares the cathode electrode bar are: select for use eurymeric photoresist RZJ-306 14mpa.s to spare glue, preceding baking, exposure, development and back baking at the chromium metallic surface, obtain mask pattern; Adopt the corrosive liquid of chromium corrosion of metal liquid and ITO respectively chromium metal and ITO to be carried out etching then; Obtain the cathode electrode bar.
The model of the described photoresist of step 3 is SU8-50 in the present embodiment, and the viscosity of described photoresist is 100mpa.s, the rotating speed decision of the sol evenning machine of the thickness of photoresist during by spin coating, and the rotating speed of described sol evenning machine generally selects 800 rev/mins.
The time of described twice development of step 3 is respectively in the present embodiment: the time of developing is 15 minutes for the first time, and the time of second development is 1 minute.
Adopt suitable temperature to carry out carrying out twice development after preceding baking, the exposure to described photoresist in the step 3 in the present embodiment; Described suitable temperature is 85 ℃, and the time of preceding baking is 40 minutes.
The described glass powder with low melting point of step 4 is to adopt magnetic stirrer three hours before spin coating in the present embodiment.
The temperature of described twice sintering of step 4 is 430 ℃ in the present embodiment, and the time is 10 minutes.
The described sintering temperature of step 5 is 470 ℃ in the present embodiment, and the time is 10 minutes.
Method of the present invention is being made by two electrodes, the emitter assembling, the glass powder with low melting point of negative electrode, anode is packaged into box, vacuumize the processing of the multiple working procedures such as burin-in process of degasification, getter activation harmonizing yinyang electrode integral device, finish the making of positive grid structure field emission electrovacuum device.The key of described emission electron tube emitting performance is the making of emission gate insulator in midfield of the present invention, the quality of its quality is the efficient of an influence emission electron tube emitting electrons directly, so the preparation of intact positive grid structure field emission gate insulator is a key of emission electron tube success.Method of the present invention is used in State Scientific and Technological Commission's 973 projects " carbon nano-tube field emission display spare physics and the research of efficient device ".
Claims (9)
1. the manufacture method of insulating barrier in the feds of positive grid structure is characterized in that this method is realized by following steps:
Step 1, employing vacuum coating technology are at ito glass surface evaporation chromium metal;
Step 2, employing photoetching, corroding method prepare the cathode electrode bar at the described chromium metallic surface of step 1; Acquisition has the field-transmitting cathode substrate of electrode;
Step 3, at the surperficial spin coating photoresist of the described cathode electrode bar of step 2, adopt suitable temperature to carry out carrying out twice development after preceding baking, the exposure to described photoresist then; The using plasma dry etching machine carries out plasma oxidation to the photoresist of spin coating, obtains to have the glass substrate of photoresist mass point;
Spin coating glass powder with low melting point insulation paste on the glass substrate of step 4, photoresist mass point that step 3 is obtained, then described glass substrate is put into baking oven and carry out sintering twice, adopt diamond dust to remove the glass powder with low melting point that is higher than on the photoresist mass point by optics grinding method; Obtain the ito glass substrate of the glass powder with low melting point identical with photoresist mass point height;
Step 5, the described ito glass substrate of step 4 is continued sintering, remove the mass point of photoresist, obtain the cavity of ballistic device;
Step 6, the cavity that step 5 is obtained ballistic device adopt ultrasonic vibration, obtain the insulating barrier of feds in the positive grid structure.
2. the manufacture method of insulating barrier in the feds of positive grid structure according to claim 1 is characterized in that, step 1 is described at ito glass surface evaporation chromium metal, and the thickness range of described chromium metal is
3. the manufacture method of insulating barrier in the feds of positive grid structure according to claim 1, it is characterized in that, the described employing photoetching of step 2, corroding method at the concrete grammar that the described chromium metallic surface of step 1 prepares the cathode electrode bar are: select for use eurymeric photoresist RZJ-306 14mpa.s to spare glue, preceding baking, exposure, development and back baking at the chromium metallic surface, obtain mask pattern; Adopt the corrosive liquid of chromium corrosion of metal liquid and ITO respectively chromium metal and ITO to be carried out etching then; Obtain the cathode electrode bar.
4. the manufacture method of insulating barrier in the feds of positive grid structure according to claim 1, it is characterized in that, the model of the described photoresist of step 3 is SU8-50, and the viscosity of described photoresist is 100mpa.s, the rotating speed decision of the sol evenning machine of the thickness of photoresist during by spin coating; The rotating speed of described sol evenning machine is 800 rev/mins.
5. the manufacture method of insulating barrier in the feds of positive grid structure according to claim 1 is characterized in that the time of described twice development of step 3 is respectively: the time of developing is 15 minutes for the first time, and the time of second development is 1 minute.
6. the manufacture method of insulating barrier in the feds of positive grid structure according to claim 1 is characterized in that, adopts suitable temperature to carry out carrying out twice development after preceding baking, the exposure to described photoresist in the step 3; Described suitable temperature is 85 ℃, and the time of preceding baking is 40 minutes.
7. the manufacture method of insulating barrier in the feds of positive grid structure according to claim 1 is characterized in that, the described glass powder with low melting point of step 4 is to adopt magnetic stirrer three hours before spin coating.
8. the manufacture method of insulating barrier in the feds of positive grid structure according to claim 1 is characterized in that, the temperature of described twice sintering of step 4 is 430 ℃, and the time is 10 minutes.
9. the manufacture method of insulating barrier in the feds of positive grid structure according to claim 1 is characterized in that, the described sintering temperature of step 5 is 470 ℃, and the time is 10 minutes.
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| CN2010102291484A CN101882548B (en) | 2010-07-16 | 2010-07-16 | Method for manufacturing insulating layer of field emission device with positive grid structure |
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| CN2010102291484A CN101882548B (en) | 2010-07-16 | 2010-07-16 | Method for manufacturing insulating layer of field emission device with positive grid structure |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104716275A (en) * | 2015-03-20 | 2015-06-17 | 京东方科技集团股份有限公司 | Electronic device encapsulating method and system |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6811457B2 (en) * | 2002-02-09 | 2004-11-02 | Industrial Technology Research Institute | Cathode plate of a carbon nano tube field emission display and its fabrication method |
| JP2005116231A (en) * | 2003-10-03 | 2005-04-28 | Sony Corp | Manufacturing method of cold cathode field electron emission display device |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6811457B2 (en) * | 2002-02-09 | 2004-11-02 | Industrial Technology Research Institute | Cathode plate of a carbon nano tube field emission display and its fabrication method |
| JP2005116231A (en) * | 2003-10-03 | 2005-04-28 | Sony Corp | Manufacturing method of cold cathode field electron emission display device |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104716275A (en) * | 2015-03-20 | 2015-06-17 | 京东方科技集团股份有限公司 | Electronic device encapsulating method and system |
| WO2016150033A1 (en) * | 2015-03-20 | 2016-09-29 | 京东方科技集团股份有限公司 | Electronic device packaging method and packaging system |
| US9614173B2 (en) | 2015-03-20 | 2017-04-04 | Boe Technology Group Co., Ltd. | Packaging method for electronic device and packaging system |
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| CN101882548B (en) | 2012-06-13 |
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