CN101882430B

CN101882430B - Method for driving liquid crystal display device

Info

Publication number: CN101882430B
Application number: CN 201010222637
Authority: CN
Inventors: 冯佑雄
Original assignee: Century Technology Shenzhen Corp Ltd
Current assignee: Century Technology Shenzhen Corp Ltd
Priority date: 2010-07-02
Filing date: 2010-07-02
Publication date: 2012-01-11
Anticipated expiration: 2030-07-02
Also published as: CN101882430A

Abstract

The invention provides a method for driving a liquid crystal display device, which comprises the following steps of: driving a plurality of scanning lines in turn along the first direction; starting all film transistors at the same time to supply a first black insertion voltage to a plurality of pixel electrodes; driving the plurality of scanning lines in turn along the second direction; and starting all the film transistors at the same time to supply a second black insertion voltage to the plurality of pixel electrodes.

Description

A kind of driving method of liquid crystal indicator

Technical field

The present invention relates to a kind of liquid crystal display apparatus driving circuit, especially relate to a kind of liquid crystal display apparatus driving circuit that can insert black picture.

Background technology

Along with the arriving in HDTV epoch, the application of liquid crystal indicator is more and more universal, thereby liquid crystal indicator utilizes the rotation of electric field controls liquid crystal molecule and produces different transmittance display images.Liquid crystal indicator comprises display panels with most liquid crystal capacitances and the driving circuit that is used to drive this display panels.

Fig. 1 is the circuit block diagram of prior art liquid crystal indicator; As shown in Figure 1, liquid crystal indicator comprises: display panels 10, wherein display panels 10 comprise multi-strip scanning line XL1, XL2 ..., XLn (n＞2); Many data line YL1, YL2 ..., YLm (m＞2); A plurality of thin film transistor (TFT)s (TFT) 11, a plurality of liquid crystal capacitances 12, and a plurality of MM CAP 13; Gate drivers 21 (gate driver), itself and multi-strip scanning line XL1, XL2 ..., XLn connects, be used for the sweep trace XL1 on the display panels 10 is driven to XLn; Source electrode driver 22 (source driver), itself and many data line YL1, YL2 ..., YLm connects, be used for the data line YL1 on the display panels 10 is driven to YLm; And time schedule controller 23 (T-con), be used for the output of control gate driver 21 and source electrode driver 22.

Wherein thin film transistor (TFT) 11 comprises a grid, one source pole and a drain, and grid is connected with sweep trace, and source electrode is connected with data line, and drain is connected with liquid crystal capacitance 12.Liquid crystal capacitance 12 is made up of a pixel electrode, a common electrode and liquid crystal layer, and wherein liquid crystal layer is folded between this pixel electrode and the common electrode.

When operate as normal; Time schedule controller 23 sends scan control signal and gives gate drivers 21; Make gate drivers 21 according to the control of scan control signal with sweep signal (high level signal) input in regular turn sweep trace XL1, XL2 ..., XLn; Thereby open corresponding thin film transistor (TFT) 11; Meanwhile time schedule controller 23 sends data controlling signals and gives source electrode driver 22, make source electrode driver 22 data-driven control signals control with data-signal via data line YL1, YL2 ..., YLm inputs to corresponding pixel electrode.Wherein pixel electrode and common electrode form an electric field, utilize the rotation of liquid crystal molecule in this electric field controls liquid crystal layer and produce different transmittances, have realized the picture demonstration thus.

Yet,, can make liquid crystal indicator that smear problem is arranged when showing dynamic menu owing to the material behavior (specific inductive capacity, viscosity, elastic modulus) of liquid crystal molecule in the liquid crystal layer and the voltage maintenance type of drive of liquid crystal indicator.

In order to overcome because of liquid crystal indicator shows the dynamic menu smear problem, prior art has disclosed the driving method of the black picture (black frame) of a kind of insertion.Be black picture to be inserted between a last picture frame normal pictures and next the picture frame normal pictures as the one of which through the frequency that improves picture frame (Frame); Yet; Insert the method for black picture data signal and shortened opening the time of thin film transistor (TFT) in each picture frame through improving the picture frame frequency; Thereby can shorten the time that data-signal inputs to pixel electrode, thereby cause the problem of pixel electrode undercharge easily, and then influence us and want picture displayed.

Still the display mode that has a kind of novel insertion to deceive picture in addition is suggested to address the above problem.Fig. 2 is the circuit block diagram that prior art is inserted the liquid crystal indicator of black picture; As shown in Figure 2; Liquid crystal indicator comprises: have the display panels 30 of most liquid crystal capacitances 32, be used for the gate drivers 41 of driven sweep line X1～Xn, be used for the source electrode driver 42 of driving data lines Y1～Ym; Be used to insert the black plug picture driving circuit 44 of black picture, and the time schedule controller 43 that is used for control gate driver 41, source electrode driver 42 and black plug picture driving circuit 44.

Continuation is with reference to Fig. 2, and source electrode driver 42 comprises offset buffer group 420 and a plurality of first switch modules 421.Offset buffer group 420 electrically connects the shift pulse end 430 of time schedule controller 43, is used for receiving shift pulse V _ShiftIn addition, the data-signal end 431 of the data-signal input end 422 electric connection time schedule controllers 43 of first switch module 421 is used for receiving data-signal V _Data Offset buffer group 420 will be according to shift pulse V _ShiftControl opening of first switch module 421 with transmission of data signals V _Data

Black plug picture driving circuit 44 comprises the second switch assembly 441 of a plurality of for example thin film transistor (TFT)s, and its grid 442 electrically connects the black picture control signal end 432 of time schedule controller 43, in order to receive black picture control signal V _Pm, in addition, its source electrode 443 electrically connects common electric voltage end 445, in order to receive common electric voltage V _Com, its drain electrode 44 then electrically connect data line Y1, Y2 ..., Ym.

Fig. 3 is the drive waveforms figure of the sweep trace X1～Xn of above-mentioned liquid crystal indicator at N picture frame and N+1 picture frame; See also Fig. 2 and Fig. 3; Liquid crystal indicator is in the normal pictures input back of accomplishing N picture frame (just accomplishing a～c time period signal imports and keep); Accomplish black picture again and insert (just accomplishing c～a ' time period signal imports and keep); Normal pictures input and the black picture that carries out N+1 picture frame again that continue inserts, and one of them normal pictures and a black plug picture mean a picture frame.Describe particularly inserting the control of black picture at this; After accomplishing a normal pictures input (accomplishing a～c time period signal imports and keep); Time schedule controller 43 c constantly can send synchronization all open sweep trace X1, X2 ..., scan control signal to the gate drivers 41 of Xn upper film transistor 31; Make its gate drivers 41 according to this scan control signal c constantly with sweep signal (high level signal) send to all sweep trace X1, X2 ..., Xn is last; And make each sweep trace X1, X2 ..., the last thin film transistor (TFT) 31 of Xn all opened (turn on); Meanwhile all first open assembly 421 and be closed in the source electrode driver 42, thus data-signal can't be transferred to data line Y1, Y2 ..., Ym is last, and time schedule controller 43 will be deceived picture control signal V this moment _PmBe sent to black plug picture driving circuit 44, black plug picture driving circuit 44 is according to deceiving picture control signal V _PmAll second switch assemblies 441 are opened, when second switch assembly 441 is opened, common electric voltage signal V _ComVia second switch assembly 441 be transferred to all data line Y1, Y2 ..., Yn is last, so common electric voltage signal V _ComCan be transferred to constantly on each liquid crystal capacitance 32 in c.Accomplish c～d time period common electric voltage signal V _ComAfter the input; Time schedule controller 43 d stop constantly exporting synchronization all open sweep trace X1, X2 ..., the scan control signal of Xn upper film transistor 31 gives gate drivers 41, each sweep trace X1, X2 ..., the last 32 entering maintenance stages of liquid crystal capacitance of Xn.

Combine single liquid crystal capacitance 32 to describe common electric voltage V at present _ComDeliver to thin film transistor (TFT) 31 via data line, make pixel electrode obtain a common electric voltage V _ComBecause that apply on the common electrode also is common electric voltage V _Com, so the voltage difference between pixel electrode and the common electrode is 0, for the liquid crystal indicator (Normally Black) of normal black pattern, image will be shown as black picture this moment.Therefore, through common electric voltage V is provided to pixel electrode _Com, can realize the insertion of black picture.

Please continue to consult Fig. 3, at N picture frame, the time (holding time) that each pixel electrode that is connected with sweep trace X1 is kept normal pictures voltage is a1～c time period; The time of keeping black plug picture voltage is d～a ' time period, and the time (holding time) that each pixel electrode that is connected with sweep trace X2 is kept normal pictures voltage is a2～c time period, and the time of keeping black plug voltage is d～a1 ' time period; The rest may be inferred, and the time that each pixel electrode that is connected with sweep trace Xn is kept normal pictures voltage is an～c time period, and the time of keeping black plug voltage is d～an-1 ' time period; Normal pictures as shown in the figure hold time in X1 to Xn on demonstration be to shorten gradually, and the black plug picture hold time in X1 to Xn on demonstration be to increase (normal pictures hold time to hold time be inversely proportional to) gradually with the black plug picture, hence one can see that; Holding time of the bottom normal pictures of liquid crystal indicator than the weak point of holding time of black plug picture, therefore, no matter the liquid crystal indicator images displayed is how; As a whole; The top of liquid crystal indicator can show normal brightness, yet more to the bottom of liquid crystal indicator, display brightness can darkness deepens; Just depart from normal picture brightness more; For example see also Fig. 4, Fig. 4 is that above-mentioned liquid crystal indicator shows that normal pictures is the figure of white picture, therefore; This black picture insertion method can cause the overall brightness of liquid crystal indicator uneven, and then influences the display quality of liquid crystal indicator.

Summary of the invention

In order to overcome the problem that exists in the prior art, the present invention provides a kind of driving method of liquid crystal indicator.

The present invention provides a kind of driving method of liquid crystal indicator, and liquid crystal indicator comprises time schedule controller, a gate drivers, multi-strip scanning line, one source pole driver, many data lines, a plurality of thin film transistor (TFT)s, a plurality of pixel electrodes; This method may further comprise the steps: at first during first sequential; Time schedule controller provides scan control signal to gate drivers; Make gate drivers drive the multi-strip scanning line in regular turn according to the order of first direction according to this; And time schedule controller also provides data controlling signal to source electrode driver, makes the source electrode driver input signal to corresponding a plurality of pixel electrodes, keeps for first duration then; Then during second sequential, time schedule controller provide scan control signal to gate drivers to open all thin film transistor (TFT)s simultaneously, opening simultaneously at thin film transistor (TFT), the first black plug voltage inputs to a plurality of pixel electrodes; Secondly during the 3rd sequential; Time schedule controller provides scan control signal to gate drivers; The order that makes gate drivers comply with the second direction opposite with first direction drives the multi-strip scanning line in regular turn; And time schedule controller also provides data controlling signal to source electrode driver, makes the source electrode driver input signal to corresponding a plurality of pixel electrodes, keeps for second duration then; Once more during the 4th sequential, time schedule controller provide scan control signal to gate drivers to open all thin film transistor (TFT)s simultaneously, opening simultaneously at thin film transistor (TFT), the second black plug voltage inputs to a plurality of pixel electrodes.

In one of the present invention embodiment, during first sequential with second sequential during temporal summation equal during the 3rd sequential with the 4th sequential during temporal summation; In one of the present invention embodiment, during first sequential with second sequential during temporal summation equal 16.67 milliseconds.

In one of the present invention embodiment, first direction is for just sweeping direction, and second direction is the anti-direction of sweeping.

In one of the present invention embodiment; Scan control signal comprises the bilateral scanning signal; The bilateral scanning signal drives the multi-strip scanning line according to the order of this first direction in order to the control gate driver according to this in regular turn during first sequential, the order of during the 3rd sequential, complying with this first party second direction in the opposite direction according to this drives the multi-strip scanning line in regular turn.During first sequential, the bilateral scanning signal is a high level, and during the 3rd o'clock palpus, the bilateral scanning signal is a low level.

In one of the present invention embodiment; Scan control signal more comprises the standard-sized sheet signal; The standard-sized sheet signal is being opened all thin film transistor (TFT)s in order to the control gate driver during this second sequential with during the 4th sequential, and the standard-sized sheet signal is comprising low level during second sequential He during the 4th sequential.

In one of the present invention embodiment, liquid crystal indicator comprises black plug picture driving circuit, to provide the first black plug voltage and the second black plug voltage to a plurality of picture elements unit.Black plug picture driving circuit is integrated on the source electrode driver.

In one of the present invention embodiment, liquid crystal indicator is normal black pattern (normally black), and the first black plug voltage is identical with the second black plug voltage, is common electric voltage V all _Com

In one of the present invention embodiment, liquid crystal indicator is normal white mode (normally white), and the first black plug voltage is opposite with the relative common electric voltage polarity of this second black plug voltage.

In one of the present invention embodiment, also comprised for one the 3rd duration during second sequential, also comprised for one the 4th duration during the 4th sequential, wherein, the 3rd duration, the 4th duration was less than second duration less than first duration.

Liquid crystal display apparatus driving circuit of the present invention utilizes the time interval of two adjacent normal pictures to give all pixel electrodes at synchronization input black plug voltage, therefore, and in the duration of charging of realizing need not shortening when black picture inserts the normal pictures liquid crystal capacitance; And two adjacent normal pictures drive the multi-strip scanning line in regular turn and give pixel electrode with input signal through positive and negative sweeping respectively, therefore, have improved the inhomogenous problem of display brightness of liquid crystal indicator, thereby have improved the display quality of liquid crystal indicator.

Description of drawings

Fig. 1 is the circuit block diagram of prior art liquid crystal indicator.

Fig. 2 is the circuit block diagram that prior art is inserted the liquid crystal indicator of black picture.

Fig. 3 be Fig. 2 liquid crystal indicator sweep trace X1, X2 ..., Xn is at the drive waveforms figure of N picture frame and N+1 picture frame.

Fig. 4 is that Fig. 2 liquid crystal indicator shows that normal pictures is the figure of white picture.

Fig. 5 is the circuit block diagram of a kind of liquid crystal indicator of preferred embodiment of the present invention.

Fig. 6 is the time sequential pulse figure of gate drivers of the present invention at N picture frame and N+1 picture frame.

Fig. 7 is the flow chart of steps of driving method of a kind of liquid crystal indicator of preferred embodiment of the present invention.

Fig. 8 is the circuit block diagram of second embodiment of the invention.

Fig. 9 is the flow chart of steps of driving method of a kind of liquid crystal indicator of second embodiment of the invention.

Embodiment

In order to understand the preferred embodiments of the present invention better, we define greater than the common electric voltage V on the common electrode usually _ComCurrent potential be " positive polarity ", less than the common electric voltage V on the common electrode _ComCurrent potential be " negative polarity ", and if in two current potentials, one of them current potential is a positive polarity, the another one current potential is a negative polarity, we claim that this two current potential is that polarity is opposite.

First embodiment

Fig. 5 is the circuit block diagram of a kind of liquid crystal indicator of preferred embodiment of the present invention.Please with reference to Fig. 5, liquid crystal indicator comprises: time schedule controller 63 (T-con), gate drivers 61 (gate driver), source electrode driver 62 (source driver), display panels 50.Wherein, Time schedule controller 63 output control signals are used for the output of control gate driver 61 and source electrode driver 62 signals respectively, and gate drivers 61 and source electrode driver 62 are according to the demonstration with picture on the control display panels 50 of the control output signal of time schedule controller 63.

Wherein above-mentioned time schedule controller 63 links to each other with source electrode driver 62 with gate drivers 61 respectively; The control signal that right time schedule controller 63 is exported to gate drivers 61 is a scan control signal; Wherein scan control signal comprises: trigger pip GSP; Clock signal GCK, standard-sized sheet signal GSO, and signal such as bilateral scanning signal GUD; The control signal that time schedule controller 63 is exported to source electrode driver 62 is a data controlling signal, and wherein data controlling signal comprises data-signal V _Data, and shift pulse V _ShiftDeng signal.

Again, display panels 50 comprise multi-strip scanning line SL1, SL2 ... SLn (n＞2), many data line DL1, DL2 ... DLm (m＞2), a plurality of thin film transistor (TFT)s (TFT) 51, a plurality of liquid crystal capacitances 52, and a plurality of MM CAP 53.Wherein, multi-strip scanning line SL1 on the display panels 50, SL2 ... The SLn lotus root is connected to gate drivers 61, many data line DL1 on the display panels 50, DL2 ... The DLm lotus root is connected to source electrode driver 62.Thin film transistor (TFT) 51 comprises a grid, one source pole and a drain, and grid is connected to sweep trace, and source electrode is connected to data line, and drain is connected to liquid crystal capacitance 52 and MM CAP 53.Liquid crystal capacitance 52 is made up of a pixel electrode, a common electrode and liquid crystal layer, and wherein liquid crystal layer is folded between this pixel electrode and the common electrode; Be transfused to a common electric voltage V on the common electrode _Com, pixel electrode and common electrode form an electric field, thereby utilize the picture of the rotation control display panels 50 of liquid crystal molecule in this electric field controls liquid crystal layer to show.

Fig. 6 is the time sequential pulse figure of gate drivers 61 of the present invention at N picture frame (Frame) and N+1 picture frame sweep trace; And please consult Fig. 5 simultaneously; Before N picture frame began, the trigger pip GSP that time schedule controller 63 is output as high level gave gate drivers 61, goes to control the zero hour of N picture frame (Frame);, N picture frame export to gate drivers 61 after beginning with the low level trigger pip GSP that is about to time schedule controller 63, and before lasting till that N+1 picture frame begins.

The trigger pip GSP that is output as high level when time schedule controller 63 controls gives gate drivers after 61 blinks; Controlling clock signal GCK is immediately constantly also transferred to high level and is exported to gate drivers 61 by low level at A; Therefore; N picture frame opened in that A is normal constantly, gate drivers 61 according to time schedule controller 63 clock signal GCK be controlled at A～An time period export in regular turn high level give sweep trace SL1, SL2 ..., SLn.

When the standard-sized sheet signal GSO that continues to be output as high level when time schedule controller 63 control gives gate drivers 61 in A～C time period, sweep trace SL1, SL2 ... SLn accomplishes the input of normal pictures in regular turn according to the control of time schedule controller 63 and keeps; When finishing A～C after the time period; Time schedule controller 63 is exported the standard-sized sheet signal GSO low level of continuation immediately and is given gate drivers 61 in C～D time period; The standard-sized sheet signal GSO that gate drivers 61 sends according to time schedule controller 63 C constantly open simultaneously all sweep trace SL1, SL2 ... The thin film transistor (TFT) 51 that SLn is last, and last till that standard-sized sheet signal GSO is got back to high level by time schedule controller 63 controls constantly at D.

When the bilateral scanning signal GUD that continues to be output as high level when time schedule controller 63 control gives gate drivers 61, i.e. A～A ' time period, gate drivers 61 according to time schedule controller 63 gated sweep line SL1, SL2 ... SLn scans along first direction; When finishing A～A ' after the time period; Time schedule controller 63 is exported the bilateral scanning signal GUD low level of continuation immediately and is given gate drivers 61; Be A '～A " time period, gate drivers 61 according to time schedule controller 63 gated sweep line SL1, SL2 ... the second direction scanning that the SLn edge is opposite with first direction.Wherein, first direction is the direction of just sweeping, and just sweeping is that driven sweep line SL1 is to SLn in regular turn by gate drivers 61, and second direction is anti-direction of sweeping, counter sweep be by gate drivers 61 in regular turn driven sweep line SLn to SL1.

Fig. 7 is the flow chart of steps of driving method of a kind of liquid crystal indicator of preferred embodiment of the present invention, and please merge and consult Fig. 5 and Fig. 6, with the steps flow chart of detailed description present embodiment.

Operating procedure S10 at first; When N picture frame when A opens constantly; Gate drivers 61 is given the 1st sweep trace SL1 according to the trigger pip GSP and the clock signal GCK output high level of time schedule controller 63, and then the thin film transistor (TFT) 51 on the 1st sweep trace SL1 this moment is promptly opened (turn on); Meanwhile, time schedule controller 63 also sends corresponding data signal V _DataWith shift pulse V _ShiftGive source electrode driver 62, make its source electrode driver 62 import corresponding data-signal and give the pixel electrode on the 1st the sweep trace SL1 according to the unlatching of the thin film transistor (TFT) 51 on the 1st the sweep trace SL1; After accomplishing A～A1 time period data-signal input; Gate drivers 61 is given the 1st sweep trace SL1 according to the clock signal GCK of time schedule controller 63 in A1 moment output low level; Thin film transistor (TFT) 51 on the 1st sweep trace SL1 cuts out (turn off) immediately; Promptly the pixel electrode on the 1st sweep trace SL1 is accomplished charging, gets into the 1st 52 retention times of liquid crystal capacitance (Holding time) A1～C time period on the sweep trace SL1.

Simultaneously; At A1 constantly, gate drivers 61 is given the 2nd sweep trace SL2 according to the clock signal GCK output high level of time schedule controller 63, and then the thin film transistor (TFT) 51 on the 2nd sweep trace SL2 this moment is promptly opened; Meanwhile, time schedule controller 63 also sends corresponding data signal V _DataWith shift pulse V _ShiftGive source electrode driver 62, make its source electrode driver 62 open the corresponding data-signal of input and give the pixel electrode on the 2nd sweep trace SL2 according to the thin film transistor (TFT) on the 2nd the sweep trace SL2 51; After accomplishing A1～A2 time period data-signal input; Gate drivers 61 is given the 2nd sweep trace SL2 according to the clock signal GCK of time schedule controller 63 in A2 moment output low level; Thin film transistor (TFT) 51 on the 2nd sweep trace SL2 cuts out immediately; Promptly the pixel electrode on the 2nd sweep trace SL2 is accomplished charging, gets into the 2nd 52 retention times of the liquid crystal capacitance A2～C time period on the sweep trace SL2.

Come n bar sweep trace SLn under continuing in regular turn; At An-1 constantly; Gate drivers 61 is given n bar sweep trace SLn according to the clock signal GCK output high level of time schedule controller 63; Then the thin film transistor (TFT) 51 on n bar sweep trace SLn this moment is promptly opened, and meanwhile, time schedule controller 63 also sends corresponding data signal V _DataWith shift pulse V _ShiftGive source electrode driver 62, make its source electrode driver 62 open the corresponding data-signal of input and give the pixel electrode on the n sweep trace SLn according to the thin film transistor (TFT) 51 on the n bar sweep trace SLn; After accomplishing An-1～An time period data-signal input; Gate drivers 61 is given n bar sweep trace SLn according to the clock signal GCK of time schedule controller 63 in An moment output low level; Thin film transistor (TFT) 51 on the n bar sweep trace SLn cuts out immediately; Promptly the pixel electrode on the n bar sweep trace SLn is accomplished charging, gets into 52 first duration of the liquid crystal capacitance An～C time period on the n bar sweep trace SLn, so the normal pictures completion is input to liquid crystal capacitance 52 and entering keeps.

The A of the above～C time period is T1 during first sequential like it, during first sequential promptly as shown in Figure 6 T1 be A～A1 time period, A1～A2 time period ..., An-1～An time period and An～C time period temporal summation.T1 during first sequential; Each sweep trace SL1, SL2 ..., SLn equates time of high level; Be A～A1 time period=A1～A2 time period=...=An-1～An time period; And sweep trace SL1, SL2 ..., last 52 retention times of liquid crystal capacitance of SLn are to shorten gradually, promptly A1～C time period＞A2～C time period＞...＞An～C time period.

In addition; Traditional liquid crystal display device is after N picture frame accomplished the input of normal pictures signal; Before the beginning of N+1 picture frame, generally have a time interval; Promptly N picture frame except comprise drive n bar sweep trace SL1, SL2 ..., SLn A～An outside the time period, also comprise the time interval of An～A ' time period, and this time interval is enough to realize the insertion of black picture.

Operating procedure S20 then; Liquid crystal capacitance 52 on n bar sweep trace SLn keeps An～C after the time period; The standard-sized sheet signal GSO that gate drivers 61 is exported in time schedule controller 63 controls constantly transfers low level to by high level at C; Then this moment gate drivers 61 according to time schedule controller 63 standard-sized sheet signal GSO be controlled at C constantly export simultaneously high level give all sweep trace SL1, SL2 ..., SLn; Immediately sweep trace SL1, SL2 ..., the last thin film transistor (TFT) 51 of SLn all opens, promptly all thin film transistor (TFT)s 51 on the display panels 50 are all opened; Meanwhile, time schedule controller 63 also sends corresponding data signal V _DataWith shift pulse V _ShiftGive source electrode driver 62, make its source electrode driver 62 according to sweep trace SL1, SL2 ..., the last thin film transistor (TFT) of SLn 51 all open the output first black plug voltages give sweep trace SL1, SL2 ..., the last pixel electrode of SLn; After accomplishing C～D time period first black plug voltage input; The standard-sized sheet signal GSO that gate drivers 61 is exported in time schedule controller 63 controls constantly gets back to high level by low level at D; Then this moment gate drivers 61 according to time schedule controller 63 standard-sized sheet signal GSO be controlled at D constantly output low level give all sweep trace SL1, SL2 ..., SLn; Immediately sweep trace SL1, SL2 ..., the last thin film transistor (TFT) 51 of SLn cuts out; Promptly all pixel electrodes are accomplished the input first black plug voltage; Sweep trace SL1, SL2 ..., the last liquid crystal capacitance 52 of SLn got into for first black plug voltage hold-time D～An-1 ' time period respectively, D～An-2 ' time period ..., D～A ' time period (D～A ' time period be the 3rd duration), therefore, black picture is accomplished and is input to liquid crystal capacitance 52 and gets into the retention time.N+1 picture frame of time schedule controller 63 controls opened at A ' constantly then.

C～A ' the time period of the above is T2 during second sequential like it, and T2 is the temporal summation of C～D time period and D～A ' time period during second sequential promptly as shown in Figure 6.T2 during second sequential; Each sweep trace SL1, SL2 ..., SLn equates time of high level; It all is C～D time period; And sweep trace SL1, SL2 ..., the last liquid crystal capacitance 52 first black plug voltage hold-times of SLn also are to shorten gradually, that is: time period＞D of D～An-1 '～An-2 ' the time period＞... The time period of＞D～A '.

In the first step S10 and the second step S20, during first sequential during the T1 and second sequential temporal summation of T2 constitute N picture frame.At N picture frame, first duration An～C time period, first black plug voltage C input time～D time period and the n bar sweep trace SLn that n bar sweep trace SLn goes up liquid crystal capacitance 52 goes up the programming of the software that the size of the 3rd duration D～A ' time period of liquid crystal capacitance 52 can be through time schedule controller 63 and controls.And first duration An～C time period is the bigger the better; The 3rd duration D～A ' time period is more little good more, and the 3rd duration D～A ' time period is less than first duration An～C time period; The size of first black plug voltage C input time～D time period has the enough time to be input in all liquid crystal capacitances 52 as long as satisfy the first black plug voltage, can be the time of high level for arbitrary sweep trace T1 during first sequential for example.

In addition, liquid crystal indicator generally is divided into normal black pattern (Normally Black) and normal white mode (Normally White), and in normal black pattern, the first black plug voltage equals the common electric voltage V on the common electrode _Com, therefore, this first black plug voltage and common electric voltage V _ComPressure reduction be 0, thereby realized the insertion of black picture; In normal white mode, the first black plug voltage is high level or low level, and the first black plug voltage and common electric voltage V _ComPressure reduction be the grey black rank, therefore also realized the insertion of black picture.Certainly, present embodiment is not limited to realize the insertion of black picture, and the insertion of grey picture is also passable, as long as the size of the first black plug voltage that Controlling Source driver 62 was imported in C～D time period.

Follow operating procedure S30; When N+1 picture frame opened in the A ' moment; Gate drivers 61 is given n bar sweep trace SLn according to bilateral scanning signal GUD, trigger pip GSP and the clock signal GCK output high level of time schedule controller 63, and then the thin film transistor (TFT) 51 on n bar sweep trace SLn this moment is promptly opened; Meanwhile, time schedule controller 63 also sends corresponding data signal V _DataWith shift pulse V _ShiftGive source electrode driver 62, make its source electrode driver 62 import corresponding data-signal and give the pixel electrode on the n bar sweep trace SLn according to the unlatching of the thin film transistor (TFT) 51 on the n bar sweep trace SLn; After accomplishing A '～A1 ' time period data-signal input; Gate drivers 61 is given n bar sweep trace SLn according to the clock signal GCK of time schedule controller 63 in A1 ' moment output low level; Thin film transistor (TFT) 51 on the n bar sweep trace SLn cuts out immediately; Promptly the pixel electrode on the n bar sweep trace SLn is accomplished charging, gets into 52 retention time of the liquid crystal capacitance A1 '～C ' time period on the n bar sweep trace SLn.

Simultaneously; At A1 constantly, gate drivers 61 is given n-1 bar sweep trace SLn-1 according to the clock signal GCK output high level of time schedule controller 63, and then the thin film transistor (TFT) 51 on n-1 bar sweep trace SLn-1 this moment is promptly opened; Meanwhile, time schedule controller 63 also sends corresponding data signal V _DataWith shift pulse V _ShiftGive source electrode driver 62, make its source electrode driver 62 open the corresponding data-signal of input and give the pixel electrode on the n-1 sweep trace SLn-1 according to the thin film transistor (TFT) 51 on the n-1 bar sweep trace SLn-1; After accomplishing A1 '～A2 ' time period data-signal input; Gate drivers 61 is given n-1 bar sweep trace SLn-1 according to the clock signal GCK of time schedule controller 63 built in A2 ' moment output low level; Thin film transistor (TFT) 51 on the n-1 bar sweep trace SLn-1 cuts out immediately; Promptly the pixel electrode on the n-1 bar sweep trace SLn-1 is accomplished charging, gets into 52 retention time of the liquid crystal capacitance A2 '～C ' time period on the n-1 bar sweep trace SLn-1.

Come the 1st sweep trace SL1 under continuing in regular turn; At An-1 ' constantly; Gate drivers 61 is given the 1st sweep trace SL1 according to the clock signal GCK output high level of time schedule controller 63; Then the thin film transistor (TFT) 51 on the 1st sweep trace SL1 this moment is promptly opened, and meanwhile, time schedule controller 63 also sends corresponding data signal V _DataWith shift pulse V _ShiftGive source electrode driver 62, make its source electrode driver 62 open the corresponding data-signal of input and give the pixel electrode on the 1st sweep trace SL1 according to the thin film transistor (TFT) on the 1st the sweep trace SL1 51; After accomplishing An-1 '～An ' time period data-signal input; Gate drivers 61 is given the 1st sweep trace SL1 according to the clock signal GCK of time schedule controller 63 in An ' moment output low level; Thin film transistor (TFT) 51 on the 1st sweep trace SL1 cuts out immediately; Promptly the pixel electrode on the 1st sweep trace SL1 is accomplished charging, gets into the 1st the liquid crystal capacitance 52 second duration An '～C ' time period on the sweep trace SL1.

A ' of the above like it～C ' time period is T3 during the 3rd sequential, during the 3rd sequential promptly as shown in Figure 6 T3 be A '～A1 ' time period, A1 '～A2 ' time period ..., An-1 '～An ' time period and An '～C ' time period temporal summation.T3 during the 3rd sequential; Each sweep trace SL1, SL2 ..., SLn equates time of high level; And equal T1 during first sequential each sweep trace SL1, SL2 ..., SLn is the time of high level; Be A '～A1 ' time period=A1 '～A2 ' time period=...=An-1 '～An ' time period=A～A1 time period=A1～A2 time period=...=An-1～An time period; And sweep trace SL1, SL2 ..., last 52 retention times of liquid crystal capacitance of SLn are to increase gradually, promptly An '～C ' time period＜An-1 '～C ' time period＜...＜A1 '～C ' time period.

Last operating procedure S40; Liquid crystal capacitance 52 on the 1st sweep trace SL1 keeps An '～C ' after the time period; The standard-sized sheet signal GSO that gate drivers 61 is exported in time schedule controller 63 controls constantly transfers low level to by high level at C; Then this moment gate drivers 61 according to time schedule controller 63 standard-sized sheet signal GSO be controlled at C ' constantly export simultaneously high level give all sweep trace SL1, SL2 ..., SLn; Immediately sweep trace SL1, SL2 ..., the last thin film transistor (TFT) 51 of SLn all opens, promptly all thin film transistor (TFT)s 51 on the display panels 50 are all opened; Meanwhile, time schedule controller 63 also sends corresponding data signal V _DataWith shift pulse V _ShiftGive source electrode driver 62, make its source electrode driver 62 according to sweep trace SL1, SL2 ..., the last thin film transistor (TFT) of SLn 51 all open the output second black plug voltages give sweep trace SL1, SL2 ..., the last pixel electrode of SLn; After accomplishing C '～D ' time period second black plug voltage input; The standard-sized sheet signal GSO that gate drivers 61 is exported in time schedule controller 63 controls constantly gets back to high level by low level at D '; Then this moment gate drivers 61 according to time schedule controller 63 standard-sized sheet signal GSO be controlled at D ' constantly output low level give all sweep trace SL1, SL2 ..., SLn; Immediately sweep trace SL1, SL2 ..., the last thin film transistor (TFT) 51 of SLn cuts out; Promptly all pixel electrodes are accomplished input second black plug voltages, sweep trace SL1, SL2 ..., the last liquid crystal capacitance 52 of SLn gets into second black plug voltage hold-time D '～An-1 respectively " time period, D '～An-2 " time period ..., D '～A " time period (D '～A " time period was the 4th duration).N+2 picture frame of time schedule controller 63 controls is at A then " open constantly.

C ' of the above～A like it " time period is T4 during the 4th sequential, T4 is C '～D ' time period and D '～A during the 4th sequential promptly as shown in Figure 6 " temporal summation of time period.T2 during second sequential; Each sweep trace SL1, SL2 ..., SLn equates time of high level; It all is C '～D ' time period; And sweep trace SL1, SL2 ..., the last liquid crystal capacitance 52 first black plug voltage hold-times of SLn also are to shorten gradually, that is: time period＞D ' of D '～An-1 '～An-2 ' the time period＞...＞D '～A " time period.

In third step S30 and the 4th step S40; During the 3rd sequential during T3 and the 4th sequential temporal summation of T4 constitute N+1 picture frame; At N+1 picture frame, the 1st sweep trace SL1 goes up the second duration An '～C ' time period, second black plug voltage C ' input time～D ' time period of liquid crystal capacitance 52 and the 4th duration D '～A that the 1st sweep trace SL1 goes up liquid crystal capacitance 52 " size of time period can control the programming of software through time schedule controller 63 inside.And the second duration An '～C ' time period is the bigger the better; Second black plug voltage hold-time D '～A " time period is more little good more, and the 4th duration D '～A " time period is less than the second duration An '～C ' time period; The size of C '～D ' time period has the enough time to be input in all liquid crystal capacitances 52 as long as satisfy the second black plug voltage, can be the time t of high level for arbitrary sweep trace T3 during the 3rd sequential for example.

In addition, in normal black mode LCD, the second black plug voltage equals the common electric voltage V on the common electrode _Com, therefore, the second black plug voltage and common electric voltage V _ComPressure reduction be 0, thereby realized the insertion of black picture; In normal white mode liquid crystal indicator, the second black plug voltage is low level or high level, and the second black plug voltage and common electric voltage V _ComPressure reduction be the grey black rank, therefore realized the insertion of black picture, and the first black plug voltage is opposite with the second black plug polarity of voltage, promptly a black plug voltage is positive polarity, another black plug voltage is negative polarity.Certainly, present embodiment is not limited to realize the insertion of black picture, and the insertion of grey picture is also passable, as long as the size of the first black plug voltage of importing in C '～D ' time period through Controlling Source driver 62.

In the present embodiment, during first sequential during the T1 and second sequential temporal summation of T2 equal during the 3rd sequential temporal summation of T4 during the T3 and the 4th sequential, promptly the time of N picture frame and N+1 picture frame equates.And the present invention utilizes realize that black picture inserts two time intervals between the picture frame normal pictures; Therefore the preceding relatively case of the present invention does not improve the frequency of picture frame; For example the frequency of liquid crystal indicator is 60Hz in the present embodiment, promptly during first sequential during the T1 and second sequential temporal summation of T2 be about 16.67ms, still; The frequency that present embodiment is not limited to liquid crystal indicator is 60Hz, and 120Hz, 240Hz equifrequent also are fine.In addition, in the present embodiment, T1 can equal T3 during the 3rd sequential during first sequential, and T2 can equal T4 during the 4th sequential during second sequential.

In the present embodiment, prior art person should be appreciated that sweep trace SL1, SL2 ..., SLn first direction be not limited to just sweep direction, for the anti-direction of sweeping also passable.Sweep trace SL1, SL2 ..., SLn second direction also be not limited to the anti-direction of sweeping, also passable for just sweeping direction.

Please continue to consult Fig. 6; At N picture frame; The retention time of each liquid crystal capacitance 52 of normal pictures in SL1 to SLn is to shorten gradually, promptly A1～C time period＞A2～C time period＞...＞An～C time period, thereby the closer to the bottom of liquid crystal indicator; Promptly the closer to sweep trace SLn, the retention time of normal pictures liquid crystal capacitance 52 is short more; And the retention time of each liquid crystal capacitance 52 of black picture in SL1 to SLn also is to shorten gradually; Be D～An-1 ' time period＞D～An-2 ' time period＞...＞D～A ' time period; Thereby the closer to the bottom of liquid crystal indicator; Promptly the closer to sweep trace SLn, the retention time of black picture liquid crystal capacitance 52 is also short more.Hence one can see that: at N picture frame; The retention time of pixel electrode normal pictures display voltage and black picture display voltage is directly proportional; No matter promptly be normal pictures or black picture; From the retention time of top liquid crystal capacitance 52 of display panels 50 to the bottom all be to reduce gradually; Therefore, to mention retention time of liquid crystal capacitance 52 normal pictures on the top of liquid crystal indicator not longer than the retention time of black plug picture for case before the present invention can not occur, and the problem that the retention time of liquid crystal capacitance 52 normal pictures lacked than the retention time of black plug picture in the lower part of liquid crystal indicator; Therefore, the problem of display panels 50 brightness disproportionation that case is mentioned before N picture frame can not occur.In like manner; At N+1 picture frame; The retention time of pixel electrode normal pictures display voltage and black picture display voltage also is directly proportional, no matter promptly be normal pictures or black picture, from retention time of top liquid crystal capacitance 52 of liquid crystal indicator to the bottom all be to increase gradually; Therefore, the problem of display panels 50 brightness disproportionation that case is mentioned before N+1 picture frame can not occur yet.Therefore, preceding relatively case, liquid crystal indicator display brightness of the present invention is more even, has improved the display quality of liquid crystal indicator.And present embodiment does not improve the picture frame frequency, the problem of pixel electrode undercharge therefore can not occur.

In addition; In the present embodiment; The first black plug voltage and the second black plug voltage are to be produced by time schedule controller 63 Controlling Source drivers 62, through time schedule controller 63 Controlling Source drivers 62 export the first black plug voltage at T2 during second sequential, T4 exports the second black plug voltage during the 4th sequential, therefore; Need not increase extra black plug picture driving circuit and just can realize the insertion of black picture; But the present invention does not limit therewith, and following examples will be described through increasing extra black plug picture driving circuit and produce black plug voltage.

Second embodiment

Fig. 8 is the circuit block diagram of second embodiment of the invention, sees also Fig. 8, and the liquid crystal indicator of present embodiment is similar with the liquid crystal indicator of embodiment 1, so identical element numbers is represented identical assembly among Fig. 5 and Fig. 8.Specifically, both difference is: the design of source electrode driver, and the increase of extra black plug picture driving circuit.

In the present embodiment, source electrode driver 65 comprises offset buffer group 650, a plurality of first switch module 652.Offset buffer 650 electrically connects the shift pulse end 630 of time schedule controller 63, is used for accepting shift pulse V _ShiftIn addition, the data-signal input end 652 of first switch module 651 electrically connects the data-signal end 631 of time schedule controller 63, is used for receiving data-signal V _DataOffset buffer group 650 will be according to shift pulse V _ShiftControl opening of first switch module 651 with transmission of data signals V _DatA.

Black plug picture driving circuit 64 comprises the second switch assembly 641 of a plurality of for example thin film transistor (TFT)s, and its grid 642 electrically connects the black picture control signal end 632 of time schedule controller 63, in order to receive black picture control signal V _PM, in addition, its source electrode 643 electrically connects a voltage receiving end 645, in order to receiving black plug voltage, its drain 644 then electrically connect data line DL1, DL2 ..., DLn.

Fig. 9 be second embodiment of the invention a kind of liquid crystal indicator driving method flow chart of steps, the difference of the flow process of the flow process of present embodiment and first embodiment is second step and the 4th step.Please merge and consult Fig. 6, Fig. 8 and Fig. 9, with the second step S20 ' and the 4th step S40 ' of detailed description present embodiment.

When operating procedure S20 '; The standard-sized sheet signal GSO that gate drivers 61 is exported in time schedule controller 63 controls constantly transfers low level to by high level at C; Then this moment gate drivers 61 according to time schedule controller 63 standard-sized sheet signal GSO be controlled at C constantly export simultaneously high level give all sweep trace SL1, SL2 ..., SLn; Immediately sweep trace SL1, SL2 ..., the last thin film transistor (TFT) 51 of SLn all opens, promptly all thin film transistor (TFT)s 51 on the display panels 50 are all opened; Meanwhile, time schedule controller 63 is through shift pulse V _ShiftAll first opens assembly 651 and closes in the Controlling Source driver 65, make the data-signal of source electrode driver 65 can't be transferred to data line DL1, DL2 ..., DLn is last, time schedule controller 63 will be deceived picture control signal V right this moment _PMBe sent to black plug picture driving circuit 64, black plug picture driving circuit 64 is according to deceiving picture control signal V _PMAll second switch assemblies 641 are opened.When second switch assembly 641 is opened, the 3rd black plug voltage via second switch assembly 641 be transferred to all data line DL1, DL2 ..., DLm is last, therefore the 3rd black plug voltage can be transferred on all pixel electrodes through voltage receiving end 645; After accomplishing C～D time period the 3rd black plug voltage input; The standard-sized sheet signal GSO that gate drivers 61 is exported in time schedule controller 63 controls constantly gets back to high level by low level at D; Then this moment gate drivers 61 according to time schedule controller 63 standard-sized sheet signal GSO be controlled at D constantly output low level give all sweep trace SL1, SL2 ..., SLn; Immediately sweep trace SL1, SL2 ..., the last thin film transistor (TFT) 51 of SLn cuts out; Promptly all pixel electrodes are accomplished the 3rd black plug voltage input, sweep trace SL1, SL2 ..., the last liquid crystal capacitance 52 of SLn got into for the 3rd black plug voltage hold-time D～An-1 ' time period respectively, D～An-2 ' time period ..., D～A ' time period (D～A ' time period be the 3rd duration).Simultaneously, at D constantly, time schedule controller 63 stops to send black plug picture control signal V _PMGive black plug picture driving circuit 64, and through shift pulse V _ShiftAll first opens assembly 651 and opens in the Controlling Source driver 65, therefore, the 3rd black plug voltage also stop to flow to data line DL1, DL2 ..., DLn, keep and stop to send black plug picture control signal V _PMGive black plug picture driving circuit 64 constantly up to C '.Constantly move the 4th step S40 ' at C '; Because the 4th step S40 ' is similar with the second step S20 '; Main difference point is for giving standard-sized sheet signal GSD at C '～D ' time period input low level; And import the 4th black plug voltage through black plug picture driving circuit 64 in C '～D ' time period and give all pixel electrodes, therefore, the 4th step S40 ' is repeated no more at this.

In the present embodiment, for normal black mode LCD, black plug picture driving circuit 64 is common electric voltage V through the 3rd black plug voltage and the 4th black plug voltage that voltage receiving end 645 receives _Com, therefore, the 3rd black plug voltage and the 4th black plug voltage respectively with common electrode on common electric voltage V _ComPressure reduction be 0, thereby realized the insertion of black picture; For the liquid crystal indicator of normal white mode, the 3rd black plug voltage and the 4th black plug voltage of black plug picture driving circuit 64 output are high level or low level, and the 3rd black plug voltage and the 4th black plug voltage respectively with common electrode on common electric voltage V _ComPressure reduction be the grey black rank, therefore realized the insertion of black picture, and the 3rd black plug voltage is opposite with the 4th black plug polarity of voltage.

In addition, in the present embodiment, black plug picture driving circuit 64 is positioned at the outside of source electrode driver 65, and still, prior art person should be appreciated that black plug picture driving circuit 64 is integrated on the source electrode driver 65 also passable.

In sum; The present invention is on the basis that the black picture of preceding case inserts; The positive and negative type of drive of sweeping of collocation gate drivers has realized being directly proportional with the retention time of black picture display voltage in each picture frame pixel electrode normal pictures display voltage, therefore; The liquid crystal indicator brightness that case is mentioned before can improving shows uneven problem, and then has improved the display quality of liquid crystal indicator.In addition, the present invention realizes that the insertion of black picture does not improve the frequency of liquid crystal indicator, therefore can not shorten the duration of charging of pixel electrode, thereby, the problem of pixel electrode undercharge can not appear yet.

What should explain at last is: above embodiment is only in order to explaining technical scheme of the present invention, but not to its restriction; Although with reference to previous embodiment the present invention has been carried out detailed explanation, those of ordinary skill in the art is to be understood that: it still can be made amendment to the technical scheme that aforementioned each embodiment put down in writing, and perhaps part technical characterictic wherein is equal to replacement; And these are revised or replacement, do not make the spirit and the scope of the essence disengaging various embodiments of the present invention technical scheme of relevant art scheme.

Claims

1. the driving method of a liquid crystal indicator, this liquid crystal indicator comprises time schedule controller, a gate drivers, multi-strip scanning line, one source pole driver, many data lines, a plurality of thin film transistor (TFT)s, a plurality of pixel electrodes; It is characterized in that described driving method comprises the following steps:

During one first sequential; This time schedule controller provides the one scan control signal to this gate drivers; Make this gate drivers drive this multi-strip scanning line in regular turn according to the order of a first direction according to this; And this time schedule controller also provides a data controlling signal to this source electrode driver, makes this source electrode driver input signal to these corresponding a plurality of pixel electrodes, keeps for one first duration then;

During one second sequential, this time schedule controller provide this scan control signal to this gate drivers opening all these thin film transistor (TFT)s simultaneously, opening simultaneously at this thin film transistor (TFT), one first black plug voltage inputs to this a plurality of pixel electrodes;

During one the 3rd sequential; This time schedule controller provides this scan control signal to this gate drivers; Make this gate drivers drive this multi-strip scanning line in regular turn according to the order of a second direction opposite with this first direction; And this time schedule controller also provides this data controlling signal to this source electrode driver, makes this source electrode driver input signal to these corresponding a plurality of pixel electrodes, keeps for one second duration then;

During one the 4th sequential, this time schedule controller provide this scan control signal to this gate drivers opening all these thin film transistor (TFT)s simultaneously, opening simultaneously at this thin film transistor (TFT), one second black plug voltage inputs to this a plurality of pixel electrodes.

2. the driving method of liquid crystal indicator according to claim 1, wherein during this first sequential with this second sequential during temporal summation equal during the 3rd sequential with the 4th sequential during temporal summation.

3. like the driving method of the said liquid crystal indicator of claim 2, wherein during this first sequential with this second sequential during temporal summation equal 16.67 milliseconds.

4. the driving method of liquid crystal indicator according to claim 1 wherein should comprise the 1st sweep trace to n bar sweep trace (n＞2) by majority bar sweep trace, and this first direction is for be driven into the direction of this n bar sweep trace in regular turn from the 1st sweep trace.

5. the driving method of liquid crystal indicator according to claim 1; Wherein this scan control signal comprises a two-way sweep signal; This bilateral scanning signal drives this multi-strip scanning line according to the order of this first direction in order to the control gate driver according to this in regular turn during this first sequential, the order of during the 3rd sequential, complying with this first party second direction in the opposite direction according to this drives this multi-strip scanning line in regular turn.

6. like the driving method of the said liquid crystal indicator of claim 5, wherein during this first sequential, this bilateral scanning signal is a high level, and during the 3rd sequential, this bilateral scanning signal is a low level.

7. the driving method of liquid crystal indicator according to claim 1; Wherein this scan control signal more comprises a standard-sized sheet signal; This standard-sized sheet signal is being opened all thin film transistor (TFT)s in order to the control gate driver during this second sequential with during the 4th sequential, and this standard-sized sheet signal is comprising low level during this second sequential He during the 4th sequential.

8. the driving method of liquid crystal indicator according to claim 1, wherein this liquid crystal indicator comprises a black plug picture driving circuit, to provide this first black plug voltage and this second black plug voltage to these a plurality of pixel electrodes.

9. like the driving method of the said liquid crystal indicator of claim 8, wherein this black plug picture driving circuit is integrated on this source electrode driver.

10. the driving method of liquid crystal indicator according to claim 1, wherein this liquid crystal indicator is normal black pattern, this first black plug voltage is identical with this second black plug voltage, all is common electric voltage Vcom.

11. the driving method of liquid crystal indicator according to claim 1, wherein this liquid crystal indicator is normal white mode, and this first black plug voltage is opposite with the relative common electric voltage Vcom of this second black plug voltage polarity.

12. the driving method of liquid crystal indicator according to claim 1; Wherein also comprised for one the 3rd duration during this second sequential; Also comprised for one the 4th duration during the 4th sequential; The 3rd duration less than this second sequential during with this first duration, the 4th duration less than the 4th sequential during with this second duration.