CN106206619B - Array substrate and its driving method and display device - Google Patents
Array substrate and its driving method and display device Download PDFInfo
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- CN106206619B CN106206619B CN201610786139.2A CN201610786139A CN106206619B CN 106206619 B CN106206619 B CN 106206619B CN 201610786139 A CN201610786139 A CN 201610786139A CN 106206619 B CN106206619 B CN 106206619B
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- thin film
- film transistor
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- virtual pixel
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
Abstract
The application discloses a kind of array substrate and its driving method and display device, the array substrate includes: that multirow pixel thin film transistor, at least a line virtual pixel thin film transistor (TFT), a plurality of grid line and multiple data lines, a plurality of grid line are connect with the grid of the pixel thin film transistor of corresponding line and virtual pixel thin film transistor (TFT) respectively；Multiple data lines are connect with the source electrode of the pixel thin film transistor of respective column and virtual pixel thin film transistor (TFT) respectively；Wherein the drain electrode of virtual pixel thin film transistor (TFT) is connect with public electrode, to provide predeterminated voltage.By the way that the drain electrode of virtual pixel thin film transistor (TFT) to be connect with public electrode by via hole, data-signal is drawn to predeterminated voltage in 3D display, black picture is shown, realizes the black plug function of right and left eyes image.In 2D display, data line voltage is charged to predeterminated voltage after a frame picture in advance, the voltage of data line is avoided directly to jump to positive voltage value by negative voltage value, reduces the scintillation that picture is shown.
Description
Technical field
The present disclosure generally relates to field of display technology, in particular to a kind of array substrate and its driving method and show
Showing device.
Background technique
In recent years, with the fast development of virtual reality technology (Virtual Reality, abbreviation VR), to display device
It also puts forward higher requirements, such as can use 3D liquid crystal display device and realize VR.
In order to realize 3D liquid crystal display device, 3D shutter is shown, it usually needs when shutter after a frame picture is shown switches
Inserting black picture promotes 3D display effect to reduce right and left eyes frame crosstalk.The display area of array substrate is provided with multirow
Pixel thin film transistor and be arranged in pixel thin film transistor coboundary and/or lower boundary a line or two row virtual pixels it is thin
Film transistor.In general, the corresponding pixel unit of a pixel thin film transistor, a virtual pixel thin film transistor (TFT) corresponding one
A virtual pixel cell, in the conducting of (virtual) pixel thin film transistor, corresponding data-signal is written to corresponding (virtual)
In pixel unit.
It also needs that public electrode switching circuit is arranged in the outside of the display area of array substrate simultaneously, so as to black in insertion
All thin film transistor (TFT) is opened when picture, but due to public electrode switching circuit need to occupy it is certain on the outside of display area
Width, so that non-display area is broadening.Therefore, it is necessary to a kind of new array substrates and its driving method and display device.
Above- mentioned information are only used for reinforcing the understanding to the background of the disclosure, therefore it disclosed in the background technology part
It may include the information not constituted to the prior art known to persons of ordinary skill in the art.
Summary of the invention
The disclosure provides a kind of array substrate and its driving method and display device, to solve public electrode in the prior art
Switching circuit occupies the technical issues of width certain on the outside of display area.
Other characteristics and advantages of the disclosure will be apparent from by the following detailed description, or partially by the disclosure
Practice and acquistion.
According to one aspect of the disclosure, a kind of array substrate is provided, comprising:
Multirow pixel thin film transistor and at least a line virtual pixel thin film transistor (TFT)；
A plurality of grid line connects with the grid of the pixel thin film transistor of corresponding line and virtual pixel thin film transistor (TFT) respectively
It connects；
Multiple data lines connect with the source electrode of the pixel thin film transistor of respective column and virtual pixel thin film transistor (TFT) respectively
It connects；
Wherein the drain electrode of virtual pixel thin film transistor (TFT) is connect with public electrode, to provide predeterminated voltage.
In a kind of exemplary embodiment of the disclosure, public electrode is the first public electrode with grid line same layer, and the
One public electrode is connect with the drain electrode of virtual pixel thin film transistor (TFT) by the via hole on interlayer dielectric layer.
In a kind of exemplary embodiment of the disclosure, public electrode is the second common electrical above planarization layer
Pole, and the second public electrode is connect with the drain electrode of virtual pixel thin film transistor (TFT) by the via hole on planarization layer.
In a kind of exemplary embodiment of the disclosure, the second public electrode is transparent conductive film.
In a kind of exemplary embodiment of the disclosure, at least a line virtual pixel thin film transistor (TFT) is two row virtual pixels
Thin film transistor (TFT) is separately positioned on before the first row pixel thin film transistor and after last line pixel thin film transistor.
According to one aspect of the disclosure, a kind of driving method of array substrate is provided, is provided in array substrate a plurality of
Grid line, multiple data lines, multirow pixel thin film transistor and at least a line virtual pixel thin film transistor (TFT), driving method packet
It includes:
Scanning signal is provided to the pixel thin film transistor and virtual pixel thin film transistor (TFT) of corresponding line by grid line；
Data-signal is provided to the pixel thin film transistor and virtual pixel thin film transistor (TFT) of respective column by data line；
It is provided by the public electrode of the drain electrode connection with virtual pixel thin film transistor (TFT) to virtual pixel thin film transistor (TFT)
Predeterminated voltage.
In a kind of exemplary embodiment of the disclosure, in the black plug frame of 3D display, grid line is to virtual pixel film crystal
The scanning signal triggering virtual pixel thin film transistor (TFT) conducting that the grid of pipe provides, public electrode are thin by a corresponding column pixel
The data-signal of film transistor and virtual pixel thin film transistor (TFT) is charged to predeterminated voltage in advance.
In a kind of exemplary embodiment of the disclosure, predeterminated voltage is by the first public electrode with grid line same layer or is located at
The second public electrode above planarization layer provides, wherein the first public electrode passes through the via hole and virtual representation on interlayer dielectric layer
The drain electrode of plain thin film transistor (TFT) connects, and the second public electrode passes through the via hole and virtual pixel thin film transistor (TFT) on planarization layer
Drain electrode connection.
In a kind of exemplary embodiment of the disclosure, in the pre-charging stage that 2D is shown, after a frame picture is shown,
The current potential of data line is charged to predeterminated voltage in advance.
According to one aspect of the disclosure, a kind of display device is provided, including above-mentioned array substrate.
According to the technical solution of the disclosure, following technical effect can be obtained:
By the way that the drain electrode of virtual pixel thin film transistor (TFT) to be connect with public electrode by via hole, realizing will in 3D display
The data-signal of display area is drawn to predeterminated voltage, is shown black picture, is realized the black plug function of right and left eyes image, bring good
VR visual experience.Meanwhile in 2D display, after a frame picture data line voltage is charged to predeterminated voltage in advance, avoids counting
Positive voltage value is directly jumped to by negative voltage value according to the voltage of line, the scintillation that picture is shown can be reduced.
It should be understood that the above general description and the following detailed description are merely exemplary, this can not be limited
It is open.
Detailed description of the invention
Its example embodiment is described in detail by referring to accompanying drawing, above and other target, feature and the advantage of the disclosure will
It becomes more fully apparent.
Fig. 1 shows a kind of structural schematic diagram of the array substrate provided in one related embodiment of the disclosure.
Fig. 2 shows a kind of structural schematic diagrams for array substrate that the disclosure provides.
Fig. 3 shows the sectional view of one of virtual pixel thin film transistor (TFT) in Fig. 2.
Fig. 4 shows the sectional view of virtual pixel thin film transistor (TFT) in Fig. 3.
Fig. 5 shows the schematic diagram of column overturning generating positive and negative voltage switching mode used by liquid crystal display usually.
Voltage change waveform diagram when Fig. 6 shows usual 2D display.
Fig. 7 shows voltage change waveform diagram when 2D is shown in the disclosure.
Fig. 8 shows the structural schematic diagram for another array substrate that the also disclosure provides.
Fig. 9 shows the sectional view of one of virtual pixel thin film transistor (TFT) in Fig. 8.
Figure 10 shows the sectional view of virtual pixel thin film transistor (TFT) in Fig. 9.
Figure 11 shows a kind of flow chart of the driving method of array substrate of disclosure offer.
Specific embodiment
Example embodiment is described more fully with reference to the drawings.However, example embodiment can be with a variety of shapes
Formula is implemented, and is not understood as limited to example set forth herein；On the contrary, thesing embodiments are provided so that the disclosure will more
Fully and completely, and by the design of example embodiment comprehensively it is communicated to those skilled in the art.Attached drawing is only the disclosure
Schematic illustrations, be not necessarily drawn to scale.Identical appended drawing reference indicates same or similar part in figure, thus
Repetition thereof will be omitted.
In addition, described feature, structure or characteristic can be incorporated in one or more implementations in any suitable manner
In mode.In the following description, many details are provided to provide and fully understand to embodiment of the present disclosure.So
And it will be appreciated by persons skilled in the art that one in the specific detail can be omitted with technical solution of the disclosure
Or more, or can be using other methods, constituent element, device, step etc..In other cases, it is not shown in detail or describes
Known features, method, apparatus, realization, material or operation are to avoid a presumptuous guest usurps the role of the host and all aspects of this disclosure is made to become mould
Paste.
Some block diagrams shown in the drawings are functional entitys, not necessarily must be with physically or logically independent entity phase
It is corresponding.These functional entitys can be realized using software form, or in one or more hardware modules or integrated circuit in fact
These existing functional entitys, or these functions reality is realized in heterogeneous networks and/or processor device and/or microcontroller device
Body.
Fig. 1 shows a kind of structural schematic diagram of the array substrate provided in one related embodiment of the disclosure, comprising: multirow picture
Plain thin film transistor (TFT) T1 and the two row virtual pixel thin film transistor (TFT)s that pixel thin film transistor coboundary and lower boundary are set
T2.As shown in Figure 1, wherein the grid of every a line pixel thin film transistor T1 is all connected on grid line M1gate, source electrode connection
Onto data line, drain electrode is connected to pixel unit；The grid of every a line virtual pixel thin film transistor (TFT) T2 is all connected to virtual grid
On line VGL, which provides a preset low level, and source electrode is connected on data line, and drain electrode is connected to public electrode wire
On ITO1_COM, which provides a common voltage.Virtual pixel thin film transistor (TFT) T2 peripheral circuit in coboundary
In be additionally provided with public electrode switching circuit, including multiple thin film transistor (TFT) T3, the grid of each thin film transistor (TFT) T3 is connected to
It controls on metal wire SW_COM_M2, source electrode is connected on data line, and drain electrode is connected on another public electrode wire V_COM, this is another
One public electrode wire provides a preset voltage.
Since the grid of virtual pixel thin film transistor (TFT) T2 is all connected in preset low level, it is in normally off, not
Work.When all thin film transistor (TFT)s being connected, in public electrode in order to realize that 3D shutter is shown and when needing inserting black picture
When thin film transistor (TFT) T3 in switching circuit is connected, its drain voltage (namely preset voltage) is written to often by data line
In one pixel unit, to show black picture.
A kind of array substrate that the disclosure provides, comprising: multirow pixel thin film transistor, at least a line virtual pixel film
Transistor, a plurality of grid line and multiple data lines, a plurality of grid line respectively with the pixel thin film transistor of corresponding line and virtual representation
The grid of plain thin film transistor (TFT) connects；Multiple data lines respectively with the pixel thin film transistor of respective column and virtual pixel film
The source electrode of transistor connects；Wherein the drain electrode of virtual pixel thin film transistor (TFT) is connect with public electrode, to provide predeterminated voltage.
Wherein " public electrode " here can refer to the metal electrode with grid same layer, may also mean that different from grid
Layer, the metal-oxide film above planarization layer.
Fig. 2 shows a kind of structural schematic diagrams for array substrate that the disclosure provides, comprising: multirow pixel thin film transistor
T1, at least a line virtual pixel thin film transistor (TFT) T2, a plurality of grid line and multiple data lines, a plurality of grid line respectively with corresponding line
The connection of the grid of pixel thin film transistor T1 and virtual pixel thin film transistor (TFT) T2；Multiple data lines respectively with the picture of respective column
The connection of the source electrode of plain thin film transistor (TFT) T1 and virtual pixel thin film transistor (TFT) T2；The wherein leakage of virtual pixel thin film transistor (TFT) T2
Pole is connect with public electrode, to provide predeterminated voltage.Public electrode therein is the first public electrode with grid line same layer, and the
One public electrode is connect with the drain electrode of virtual pixel thin film transistor (TFT) T2 by the via hole on interlayer dielectric layer.
As shown in Fig. 2, at least a line virtual pixel thin film transistor (TFT) T2 in the disclosure is that two row virtual pixel films are brilliant
Body pipe T2 is separately positioned on before the first row pixel thin film transistor T1 and after last line pixel thin film transistor T1.
By being provided with dummy shift register driving circuit in the virtual pixel thin film transistor (TFT) T2 of the first row and last line, leak
Pole is connected on the first public electrode, and in 3D display, the virtual pixel thin film transistor (TFT) T2 of the first row and last line is connected
When, its drain voltage (namely predeterminated voltage) is written in each pixel unit by data line, to show black picture
The black plug between left eye picture and right eye picture is realized in face.
Fig. 3 shows the top view of one of virtual pixel thin film transistor (TFT) in Fig. 2, correspondingly, Fig. 4 shows void in Fig. 3
The sectional view of quasi- pixel thin film transistor.The first public electrode, the i.e. metal with grid same layer are indicated with M1_COM in Fig. 3-Fig. 4
The first public electrode M1_COM and grid line M1gate in electrode, that is, Fig. 3 are same layer metal (i.e. the first metal layer) shape
At.The second metal layer M2 with grid different layers in Fig. 3, the source S and drain D being used to form in Fig. 4.In conjunction with reference to figure
Shown in 3 and Fig. 4, source S and semiconductor active layer SAL are connected to by the first via hole K1, by the second via hole K2 be connected to drain D with
Semiconductor active layer SAL, while drain D and the first public electrode M1_COM are also connected to by third via hole K3, finally, passing through the
Four via hole K4 are connected to drain D and the second public electrode ITO1.
Referring also to shown in Fig. 4, wherein the third via hole K3 between drain D and the first public electrode M1_COM is by right
Interlayer dielectric layer ILD above first public electrode M1_COM is by via hole obtained from processing technology, and drain D is public with second
The 4th via hole K4 between common electrode ITO1 be by the planarization layer PLN above second metal layer M2 by processing technology and
Obtained via hole.In 3D display, virtual pixel thin film transistor (TFT) conducting, due to virtual pixel thin film transistor (TFT) drain D with
It is connected between first public electrode M1_COM by third via hole K3, drain voltage (namely write by data line by predeterminated voltage
Enter into each pixel unit, to show black picture, realizes the black plug function between left eye picture and right eye picture.
In addition, also shown in Fig. 4 glass substrate GS, light shield layer LS, buffer layer BL, planarization layer PLN, passivation layer PL with
And pixel electrode ITO2.It should also be noted that, thin film transistor (TFT) shown in Fig. 4 is double grating structures, but not as
Limit.
Fig. 5 shows the schematic diagram of column overturning generating positive and negative voltage switching mode used by liquid crystal display usually, works as respective pixel
When the thin film transistor (TFT) of unit is connected line by line, the generating positive and negative voltage that this line is connected is overturn, i.e., original positive voltage becomes
Negative voltage, originally negative voltage become positive voltage, while the generating positive and negative voltage of other rows remains unchanged, and pass through column overturning generating positive and negative voltage
Switching can reduce ghost problem caused by liquid crystal polarization.
Voltage change waveform diagram when Fig. 6 shows usual 2D display, due to not needing " black plug " function at this time, when positive and negative frame is cut
When changing, the positive voltage value of the 2nd row gate is directly jumped to by the negative voltage value of the 1st row gate, i.e., from the negative number in Fig. 6
Positive data voltage is directly jumped to according to voltage (i.e. data), causes data voltage to change greatly in this way, feedthrough influences
Increase, picture shows that the phenomenon that flashing is more serious.
Fig. 7 shows voltage change waveform diagram when 2D is shown in the disclosure, although " black plug " function is not needed yet, just
When negative frame switches, as soon as shown in fig. 7, due to that data line voltage will be charged in advance predeterminated voltage after frame picture,
It is first from negative data voltage to predeterminated voltage, then from predeterminated voltage to positive data voltage, therefore is no longer by negative voltage
Value directly jumps to positive voltage value, it is possible to reduce feedthrough caused by column inversion improves first trip and shows thin film transistor (TFT)
The charge rate of device, to reduce the scintillation that picture is shown.
Based on above-mentioned, the array substrate that the disclosure provides passes through the drain electrode of virtual pixel thin film transistor (TFT) and first is public
Electrode is connected to by the via hole of interlayer dielectric layer ILD, is realized and is drawn the data-signal of display area to default electricity in 3D display
Pressure, shows black picture, realizes the black plug function of right and left eyes image, bring good VR visual experience.Meanwhile in 2D display,
After a frame picture data line voltage is charged to predeterminated voltage in advance, the voltage of data line is avoided directly to be jumped by negative voltage value
Positive voltage value is changed to, the scintillation that picture is shown can be reduced.
Fig. 8 shows the structural schematic diagram for another array substrate that the also disclosure provides, comprising: multirow pixel thin film crystal
Pipe T1, at least a line virtual pixel thin film transistor (TFT) T2, a plurality of grid line and multiple data lines, a plurality of grid line respectively with corresponding line
Pixel thin film transistor T1 and virtual pixel thin film transistor (TFT) T2 grid connection；Multiple data lines respectively with respective column
The connection of the source electrode of pixel thin film transistor T1 and virtual pixel thin film transistor (TFT) T2；Wherein virtual pixel thin film transistor (TFT) T2
Drain electrode is connect with public electrode, to provide predeterminated voltage.
Due in this configuration and not set with grid same layer the first public electrode, public electrode at this time is positioned at flat
The second public electrode above smoothization layer, and the drain electrode of the second public electrode and virtual pixel thin film transistor (TFT) T2 pass through planarization
Via hole connection on layer.
It is driven by being provided with dummy shift register in the virtual pixel thin film transistor (TFT) T2 of the first row and last line
Dynamic circuit, drain electrode is connected on the second public electrode, in 3D display, the virtual pixel film crystal of the first row and last line
When pipe T2 is connected, its drain voltage (namely predeterminated voltage) is written in each pixel unit by data line, thus
It shows black picture, realizes the black plug between left eye picture and right eye picture.
Fig. 9 shows the top view of one of virtual pixel thin film transistor (TFT) in Fig. 8, correspondingly, Figure 10 shows virtual representation
The sectional view of plain thin film transistor (TFT).ITO1_COM indicates the public electrode wire with grid G different layers in Fig. 8, uses in Fig. 9-Figure 10
ITO1 indicates that the second public electrode, second public electrode are transparent conductive film.The main ingredient of transparent conductive film is oxygen
Change indium tin, there is good electric conductivity and the transparency.In conjunction with shown in reference Fig. 9 and Figure 10, source S is connected to by the first via hole K1
With semiconductor active layer SAL, drain D and semiconductor active layer SAL are connected to by the second via hole K2, while also passing through the 4th via hole
K4 is connected to drain D and the second public electrode ITO1.Wherein the formation of the first via hole K1, the second via hole K2 and the 4th via hole K4 are same
It is accordingly described in Fig. 4, details are not described herein again.
Due to being not provided with the first public electrode M1_COM with grid G same layer in array substrate shown in Fig. 8,
When 3D display, virtual pixel thin film transistor (TFT) conducting, due to the drain D and the second public electrode of virtual pixel thin film transistor (TFT)
It is connected between ITO1 by the 4th via hole K4, drain voltage (namely predeterminated voltage) is written to each pixel by data line
In unit, to show black picture, the black plug function between left eye picture and right eye picture is realized.
It similarly,, can also will be after a frame picture by data line voltage preliminary filling in the switching of positive and negative frame when 2D is shown
To predeterminated voltage, that is, first from negative data voltage to predeterminated voltage, then from predeterminated voltage to positive data voltage, therefore not
It is that positive voltage value is directly jumped to by negative voltage value again, it is possible to reduce feedthrough caused by column inversion improves first trip
The charge rate for showing film transistor device, to reduce the scintillation that picture is shown.
Based on above-mentioned, although disclosure array base-plate structure shown in Fig. 8 is different from Fig. 2,3D equally may be implemented
The black plug function of right and left eyes image when display reduces the effect for the scintillation that picture is shown in 2D display.
The above two array substrate provided according to the disclosure as a result, also provide a kind of driving method of array substrate,
A plurality of grid line, multiple data lines, multirow pixel thin film transistor and at least a line virtual representation are wherein provided in array substrate
Plain thin film transistor (TFT), Figure 11 show a kind of flow chart of the driving method of array substrate of disclosure offer.
As shown in figure 11, in step slo, by pixel thin film transistor from grid line to corresponding line and virtual pixel film
Transistor provides scanning signal.
As shown in figure 11, in step S20, the pixel thin film transistor and virtual pixel by data line to respective column are thin
Film transistor provides data-signal.
As shown in figure 11, in step s 30, by with virtual pixel thin film transistor (TFT) drain electrode connection public electrode to
Virtual pixel thin film transistor (TFT) provides predeterminated voltage.
Predeterminated voltage VCOM therein can be by providing, or by being located at planarization with the first public electrode of grid line same layer
Second public electrode of layer top provides.
With reference to shown in Fig. 3 and Fig. 4, the first public electrode M1_COM is the metal electrode with grid same layer, is situated between by interlayer
Third via hole K3 on matter layer is connect with the drain D of virtual pixel thin film transistor (TFT).Referring additionally to shown in Fig. 9 and Figure 10, second
Public electrode ITO1 is located above planarization layer through the 4th via hole K4 and virtual pixel thin film transistor (TFT) on planarization layer PLN
Drain D connection.
Based on the structure of above two array substrate, in the black plug frame of 3D display, grid line is to virtual pixel thin film transistor (TFT)
The scanning signal triggering virtual pixel thin film transistor (TFT) conducting that provides of grid, public electrode is by a corresponding column pixel thin film
The data-signal of transistor and virtual pixel thin film transistor (TFT) is charged to predeterminated voltage in advance, and such drain voltage is (namely default
Voltage) be written in each pixel unit by data line, to show black picture, realize left eye picture and right eye picture it
Between black plug function.
In addition, after one frame picture is shown, the current potential of data line is charged to default in advance in the pre-charging stage that 2D is shown
Voltage, in this way when positive and negative frame switches, due to that data line voltage will be charged in advance predeterminated voltage after a frame picture,
It is exactly first from negative data voltage to predeterminated voltage, then from predeterminated voltage to positive data voltage, therefore is no longer by negative electricity
Pressure value directly jumps to positive voltage value, it is possible to reduce feedthrough caused by column inversion improves first trip and shows film crystal
The charge rate of tube device, to reduce the scintillation that picture is shown.
In conclusion the disclosure finally also provides a kind of display device, including above-mentioned Fig. 2 or array shown in Fig. 8
Substrate.
It will be clearly understood that the present disclosure describes how to form and use particular example, but the principle of the disclosure is not limited to
These exemplary any details.On the contrary, the introduction based on disclosure disclosure, these principles can be applied to many other
Embodiment.
It is particularly shown and described the illustrative embodiments of the disclosure above.It should be appreciated that the disclosure is unlimited
In detailed construction described herein, set-up mode or implementation method；On the contrary, disclosure intention covers included in appended claims
Spirit and scope in various modifications and equivalence setting.
Claims (7)
1. a kind of array substrate characterized by comprising
Multirow pixel thin film transistor and at least a line virtual pixel thin film transistor (TFT)；
A plurality of grid line, respectively with the grid of the pixel thin film transistor of corresponding line and the virtual pixel thin film transistor (TFT)
Connection；
Multiple data lines, respectively with the source of the pixel thin film transistor of respective column and the virtual pixel thin film transistor (TFT)
Pole connection；
At least a line virtual pixel thin film transistor (TFT) is two row virtual pixel thin film transistor (TFT)s, is separately positioned on the first row picture
Before plain thin film transistor (TFT) and after last line pixel thin film transistor；The two rows virtual pixel thin film transistor (TFT) is all provided with
It is equipped with dummy shift register driving circuit；Wherein the drain electrode of the virtual pixel thin film transistor (TFT) is connect with public electrode, with
Predeterminated voltage is provided；
The public electrode includes the first public electrode and the second public electrode, first public electrode and grid line same layer, and
First public electrode is connect with the drain electrode of virtual pixel thin film transistor (TFT) by the via hole on interlayer dielectric layer；Described second is public
Common electrode is located at the top of planarization layer, and the drain electrode of second public electrode and virtual pixel thin film transistor (TFT) passes through planarization
Via hole connection on layer.
2. array substrate according to claim 1, which is characterized in that second public electrode is transparent conductive film.
3. a kind of driving method of array substrate, a plurality of grid line, multiple data lines, multirow pixel are provided in the array substrate
Thin film transistor (TFT) and at least a line virtual pixel thin film transistor (TFT), which is characterized in that the driving method includes:
Scanning is provided to the pixel thin film transistor of corresponding line and the virtual pixel thin film transistor (TFT) by the grid line
Signal；
Number is provided to the pixel thin film transistor of respective column and the virtual pixel thin film transistor (TFT) by the data line
It is believed that number；
At least a line virtual pixel thin film transistor (TFT) is two row virtual pixel thin film transistor (TFT)s, is separately positioned on the first row picture
Before plain thin film transistor (TFT) and after last line pixel thin film transistor；The two rows virtual pixel thin film transistor (TFT) is all provided with
It is equipped with dummy shift register driving circuit；By with the virtual pixel thin film transistor (TFT) drain electrode connection public electrode to
The virtual pixel thin film transistor (TFT) provides predeterminated voltage；
The public electrode includes the first public electrode and the second public electrode, first public electrode and grid line same layer, and
First public electrode is connect with the drain electrode of virtual pixel thin film transistor (TFT) by the via hole on interlayer dielectric layer；Described second is public
Common electrode is located at the top of planarization layer, and the drain electrode of second public electrode and virtual pixel thin film transistor (TFT) passes through planarization
Via hole connection on layer.
4. driving method according to claim 3, which is characterized in that in the black plug frame of 3D display, the grid line is to described
The scanning signal that the grid of virtual pixel thin film transistor (TFT) provides triggers the virtual pixel thin film transistor (TFT) conducting, described
Public electrode is by the data-signal preliminary filling of corresponding a column pixel thin film transistor and the virtual pixel thin film transistor (TFT)
To the predeterminated voltage.
5. driving method according to claim 4, which is characterized in that the predeterminated voltage is by with the grid line same layer
One public electrode or the second public electrode above planarization layer provide, wherein first public electrode is situated between by interlayer
Via hole on matter layer is connect with the drain electrode of the virtual pixel thin film transistor (TFT), and second public electrode passes through on planarization layer
Via hole connect with the drain electrode of the virtual pixel thin film transistor (TFT).
6. driving method according to claim 3, which is characterized in that in the pre-charging stage that 2D is shown, a frame picture is aobvious
After showing, the current potential of the data line is charged to the predeterminated voltage in advance.
7. a kind of display device, which is characterized in that including array substrate of any of claims 1-2.
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| CN106773420B (en) * | 2017-02-06 | 2019-11-05 | 京东方科技集团股份有限公司 | A kind of array substrate, display device and its driving method |
| CN107065366B (en) * | 2017-06-19 | 2019-12-24 | 深圳市华星光电技术有限公司 | Array substrate and driving method thereof |
| TWI671578B (en) * | 2018-03-30 | 2019-09-11 | 友達光電股份有限公司 | Pixel structure and touch panel |
| CN108694903B (en) * | 2018-05-28 | 2020-04-07 | 武汉华星光电技术有限公司 | Array substrate row driving circuit |
| CN109461718B (en) * | 2018-10-22 | 2020-09-25 | 昆山国显光电有限公司 | Display panel and display device |
| TWI711852B (en) | 2019-05-15 | 2020-12-01 | 友達光電股份有限公司 | Display panel and manufacturing method thereof |
| CN113782543B (en) * | 2020-08-21 | 2023-05-16 | 友达光电股份有限公司 | Pixel array substrate |
| CN113012638B (en) | 2020-12-31 | 2022-04-05 | 武汉天马微电子有限公司 | Display panel, driving method thereof and display device |
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