Embodiment
The present invention discloses a side cooling LED, in order to understand the present invention up hill and dale, will in following description, propose detailed step.Apparently, enforcement of the present invention is not defined in the known specific details of those of ordinary skill in the field of light-emitting diode.On the other hand, well-known step is not described in the details, with the restriction of avoiding causing the present invention unnecessary.The preferred embodiments of the present invention can be described in detail as follows, yet except these were described in detail, the present invention can also be implemented among other the embodiment widely, and scope of the present invention constrained not, and it is as the criterion with appended claim.
The present invention discloses a side cooling LED, and it comprises semiconductor layer, a luminescent layer of a substrate, a N type conducting, the semiconductor layer and a heat dissipating layer of a P type conducting.
Comprised a resilient coating between the semiconductor layer of above-mentioned substrate and the conducting of N type, wherein had a unadulterated semiconductor layer between the semiconductor layer of resilient coating and the conducting of N type, and luminescent layer is between the semiconductor layer of the semiconductor layer of N type conducting and the conducting of P type.
Can form between the semiconductor layer of unadulterated in addition semiconductor layer and the conducting of N type one have a pattern metal level, its pattern of metal level that wherein has pattern is a plurality of holes, and this has the metal level of pattern and the semiconductor layer ohmic contact of N type conducting.
Hold said structure, wherein the semiconductor layer of semiconductor layer, luminescent layer and the conducting of N type of the P type conducting of a part is removed and makes the semiconductor layer of part N type conducting come out.Have a P electrode on the semiconductor layer of above-mentioned P type conducting, and a N electrode is positioned on the semiconductor layer of the part N type conducting that exposes or is positioned on the metal level with pattern.An other protective layer covers the semiconductor layer of above-mentioned P type conducting and the semiconductor layer of N type conducting, and exposes above-mentioned N electrode and P electrode.And above-mentioned heat dissipating layer connects the semiconductor layer of above-mentioned metal level with pattern or the conducting of N type to encapsulating carrier plate.
The present invention discloses a kind of manufacturing approach of side cooling LED in addition, the semiconductor layer that its step comprises provides a substrate, form a N type conducting on the substrate, form a luminescent layer on the semiconductor layer of N type conducting, the semiconductor layer that forms a P type conducting on the luminescent layer and the last heat dissipating layer that in encapsulation process, forms on the semiconductor layer of N type conducting.
In the step of above-mentioned manufacturing, comprised and formed a resilient coating between the semiconductor layer of above-mentioned substrate and the conducting of N type, and formed a unadulterated semiconductor layer between the semiconductor layer of resilient coating and the conducting of N type.Can form between the semiconductor layer of above-mentioned in addition unadulterated semiconductor and the conducting of N type one have a pattern metal level; Wherein above-mentioned its pattern of the metal level with pattern is a plurality of holes, and the semiconductor layer ohmic contact of above-mentioned metal level with pattern and the conducting of N type.
Hold above-mentioned steps; Wherein the semiconductor layer of semiconductor layer, luminescent layer and the conducting of N type of the P type conducting of a part is removed and makes the semiconductor layer of part N type conducting come out; And on the semiconductor layer of above-mentioned P type conducting, form a P electrode, form a N electrode simultaneously on the semiconductor layer of the part N type conducting that exposes or be formed on the metal level with pattern.Form a protective layer in addition and be covered in the semiconductor layer of above-mentioned P type conducting and the semiconductor layer of N type conducting, and expose outside above-mentioned N electrode and P electrode.And in encapsulation process, above-mentioned heat dissipating layer is formed on the semiconductor layer of above-mentioned metal level with pattern or the conducting of N type, and extend on the encapsulating carrier plate.
Above-mentioned substrate can be sapphire substrate, silicon carbide substrate, lithium aluminate substrate, lithium gallium oxide substrate, silicon substrate, gallium nitride base board, zinc oxide substrate, aluminum zinc oxide substrate, GaAs substrate, gallium phosphide substrate, gallium antimonide substrate, indium phosphide substrate, indium arsenide substrate, zinc selenide substrate or metal substrate.
Above-mentioned heat dissipating layer forms through thermal paste cooling after coagulation, and its material is that argent (Silver) mixes with epoxy resin (Epoxy).
Above-mentioned side cooling LED can be the light-emitting diode of III-V group-III nitride or the light-emitting diode of II-VI group-III nitride; Wherein luminescent layer can be the structure of single quantum well layer (single quantum well) or multiple quantum trap layer (multiple quantum layers); And (metalorganic chemical vapor deposition MOCVD) forms the semiconductor layer of the semiconductor layer of above-mentioned N type conducting, luminescent layer and the conducting of P type through Metalorganic chemical vapor deposition.
Above-mentioned resilient coating can be aluminium nitride (AlN), aluminum gallium nitride (AlGaN) or gallium nitride arsenic/gallium nitride arsenic (InGaN/InGaN).And above-mentioned unadulterated semiconductor layer is gallium nitride (GaN), and (metal organicchemical vapor deposition MOCVD) forms through Metalorganic chemical vapor deposition for wherein above-mentioned resilient coating and unadulterated semiconductor layer.
In above-mentioned step; Wherein the semiconductor layer of semiconductor layer, luminescent layer and the conducting of N type of the P type conducting of a part is removed and makes the semiconductor layer of part N type conducting come out, and utilizes optical lithography (photo lithography) and etched mode to accomplish.
Above-mentioned P electrode can be the material of nickel (Ni)/chromium (Cr)/gold (Au), platinum (Pt)/gold (Au), platinum (Pt)/nickel (Ni) gold (Au) or nickel (Ni)/Au-Zn; And the N electrode can be the material of nickel (Ni)/chromium (Cr)/gold (Au), chromium (Cr)/nickel (Ni)/gold (Au), titanium (Ti)/nickel (Ni)/chromium (Cr)/gold (Au) or gold (Au)/nickel (Ni)/titanium (Ti)/silicon (Si)/titanium (Ti); Wherein P electrode and N electrode utilize the mode of vapor deposition (Evoaporation) or sputter (Sputter) to form, and utilize optical lithography (photo lithography) and etched mode to accomplish shape again.
The material of the above-mentioned metal level with pattern can be chromium (Chromium) or tungsten (Tungsten); The wherein above-mentioned metal level with pattern utilizes the mode of vapor deposition (Evoaporation) or sputter (Sputter) to be formed on the above-mentioned unadulterated semiconductor layer, utilizes optical lithography (photo lithography) and etched mode to accomplish patterning again.
Above-mentioned protective layer can be silicon dioxide (SiO2), silicon nitride (Si3N4) or silicon oxynitride (SiON); Wherein protective layer utilizes chemical vapour deposition (CVD) (chemical vapor deposition; CVD) or plasma auxiliary chemical vapor deposition (plasma enhanced chemical vapor deposition, mode PECVD) forms.
Hereinafter will arrange in pairs or groups accompanying drawing and example specify technology contents of the present invention and each item embodiment.
Please with reference to shown in the structure schematic top plan view of the structural profile sketch map of Fig. 1 a and Fig. 1 b; The present invention discloses a side cooling LED 01, and it comprises semiconductor layer 11, a luminescent layer 12 of a substrate 10, a N type conducting, the semiconductor layer 13 and a heat dissipating layer 14 of a P type conducting.
Comprise a resilient coating 15 between the semiconductor layer 11 of above-mentioned substrate 10 and the conducting of N type, wherein had a unadulterated semiconductor layer 16 between the semiconductor layer 11 of resilient coating 15 and the conducting of N type in addition.
Above-mentioned luminescent layer 12 is between the semiconductor layer 13 of the semiconductor layer 11 of N type conducting and the conducting of P type, and aforesaid luminescent layer 12 can be the structure of single quantum well layer (single quantum well) or multiple quantum trap layer (multiple quantum layers).
Hold said structure, semiconductor layer 11 depressions of wherein semiconductor layer 13, luminescent layer 12 and the conducting of N type of the P type conducting of a part make the semiconductor layer 11 of part N type conducting come out separately.Has a P electrode 17 on the semiconductor layer 13 of above-mentioned in addition P type conducting, on the semiconductor layer 11 of the part N type conducting that other has a N electrode 18 to be positioned to expose.
An other protective layer 19 covers the semiconductor layer 13 of above-mentioned P type conducting and the semiconductor layer 11 of N type conducting, and exposes above-mentioned N electrode 18 and P electrode 17.
The semiconductor layer 11 that above-mentioned heat dissipating layer 14 connects above-mentioned N type conducting is to encapsulating carrier plate.
Please with reference to Fig. 2 a to Fig. 2 c, the manufacturing approach of the side cooling LED 01 that the present invention discloses, its manufacturing approach comprises the following step.
Step 1A; One substrate 10 is provided; And form a resilient coating 15 and a unadulterated semiconductor layer 16 in regular turn on above-mentioned substrate 10; (metal organic chemical vapor deposition MOCVD) forms wherein above-mentioned resilient coating 15 through Metalorganic chemical vapor deposition with unadulterated semiconductor layer 16.
Step 1B; The semiconductor layer 13 of semiconductor layer 11, luminescent layer 12 and the conducting of P type that forms a N type conducting in regular turn is on unadulterated semiconductor layer 16; Wherein the semiconductor layer 11 of N type conducting is formed on the unadulterated semiconductor layer 16; Then form a luminescent layer 12 on the semiconductor layer 11 of N type conducting, the semiconductor layer 13 that forms a P type conducting at last is covered on the luminescent layer 12.Above-mentioned in addition side cooling LED 01 can be the light-emitting diode of III-V family or the light-emitting diode of II-VI family; Wherein luminescent layer 12 can be the structure of single quantum well layer (single quantum well) or multiple quantum trap layer (multiple quantum layers); The semiconductor layer 13 of the semiconductor layer 11 of wherein above-mentioned N type conducting, luminescent layer 12 and the conducting of P type is through Metalorganic chemical vapor deposition (metal organicchemical vapor deposition; MOCVD) or the molecular beam epitaxy flop-in method (molecular beamepitaxy MBE) forms.
Then utilize optical lithography (photo lithography) and etched mode, the semiconductor layer 11 of semiconductor layer 13, luminescent layer 12 and the conducting of N type of the P type conducting of a feasible part is removed, and the semiconductor layer 11 of part N type conducting comes out.The present invention provides a preferred embodiment to accomplish above-mentioned steps through optical lithography (photo lithography) and etched mode, like step 1C.At first, apply a photoresist layer 7 on the semiconductor layer 13 of above-mentioned P type conducting, and a photo mask layer 6 is set, above photo mask layer 6, provide a light source 9 simultaneously towards photo mask layer 6 emission light in the top of aforementioned photic resist layer 7.
Step 1D, after photoresist layer 7 was receiving the irradiation of light, the part of its photoresist layer 7 exposure can be dissolved, and the opposite photo mask layer 6 that receives is covered the part that does not receive irradiate light and is then existed.
Above-mentioned photoresist layer 7 is positive photoresist, i.e. photoresist deliquescing or decomposition after the sensitization.The present invention provides another embodiment in addition, and wherein photoresist layer 7 is a negative photoresist, and promptly photoresist does not decompose after the sensitization.Therefore, being provided with of its photo mask layer 6 can be relative with step 1D, and do not receive photo mask layer 6 to cover and the part that receives irradiate light can exist.
Step 1E; After removing photo mask layer 6 and light source 9; Then utilize the semiconductor layer 11 of semiconductor layer 13, luminescent layer 12 and the conducting of N type of the feasible P type conducting partly of etched mode to remove, wherein etched mode comprises Wet-type etching (wet etching) and two kinds of technology of dry-etching (dry etching).
Above-mentioned Wet-type etching (wet etching) is immersed in chip in the chemical solvent, or chemical solution quenched is sprayed on the chip, via solution and the chemical reaction that is etched thing to remove semiconductor layer.
In addition, dry ecthing comprises the mode of plasma etching (plasma etching), utilizes plasma that etching gas is dissociated and produces charged ion, molecule, electronics and hyperergic electronics group, makes that being removed thing forms volatile products.Also comprise the mode that splashes etching (sputter etching) in addition, utilize electric field, splash with the positron that derives acceleration and be etched thing the inert gas making alive.Moreover; Also comprise reactive ion etching (reactive ion etching; RIE) mode, the etching of rational ion bombardment of bond and chemical reaction, it mainly utilizes the etching of chemical reaction; Add the atomic bond knot destruction of the effect of ion bombardment again, with accelerated reaction speed with the etching material surface.Can destroy simultaneously being deposited on the polymer that is etched the thing surface again, be beneficial to etching and be able to continue carry out.
Step 1F removes photoresist layer 7, forms the nude film with extension platform (mesa).
Step 1G; Utilize the mode of vapor deposition (Evoaporation) or sputter (Sputter) to form metal level; Then utilize again optical lithography (photo lithography) and etched mode make the shape of P electrode 17 be formed at the conducting of P type semiconductor layer 13 on, and the shape of N electrode 18 be formed at the N type conducting that exposes semiconductor layer 11 on.
Step 1H; Utilize chemical vapour deposition (CVD) (chemical vapor deposition; CVD) or plasma auxiliary chemical vapor deposition (plasma enhanced chemical vapor deposition; PECVD) mode forms on the semiconductor layer 11 of semiconductor layer 13, luminescent layer 12 and the conducting of N type that protective layer 19 is covered in the conducting of aforesaid P type, and exposes N electrode 18 and P electrode 17.
Step 1I when the step of encapsulation, is coated with thermal paste and invests on the encapsulating carrier plate, and when nude film is positioned over when being coated with on the encapsulating carrier plate that has attached thermal paste, its thermal paste can extend to semiconductor layer 11 surfaces of the N type conducting that exposes along the nude film side.And when thermal paste is cooled off, just form a heat dissipating layer 14 in the semiconductor layer of the N type conducting that exposes 11 surfaces and extend on the encapsulating carrier plate.
Please with reference to shown in the structure schematic top plan view of the structural profile sketch map of Fig. 3 a and Fig. 3 b; The present invention discloses a kind of light-emitting diode 02 of side heat radiating type, and it comprises the semiconductor layer 21, a luminescent layer 22, the semiconductor layer 23 of a P type conducting, the metal level 5 that a heat dissipating layer 24 and has pattern of a substrate 20, a N type conducting.
Above-mentioned substrate 20 and have between the metal level 5 of pattern and comprised a resilient coating 25, wherein resilient coating 25 and have between the metal level 5 of pattern and have a unadulterated semiconductor layer 26 in addition.
Above-mentioned luminescent layer 22 is between the semiconductor layer 23 of the semiconductor layer 21 of N type conducting and the conducting of P type, and aforesaid luminescent layer 22 can be the structure of single quantum well layer (single quantum well) or multiple quantum trap layer (multiple quantum layers).
Hold said structure, semiconductor layer 21 depressions of wherein semiconductor layer 23, luminescent layer 22 and the conducting of N type of the P type conducting of a part make the semiconductor layer 21 of part N type conducting and the metal level 5 with pattern expose out.Have a P electrode 27 on the semiconductor layer 23 of above-mentioned in addition P type conducting, and on the semiconductor layer 21 of the part N type conducting that has a N electrode 28 to be positioned in addition to expose.
An other protective layer 29 covers the semiconductor layer 23 of above-mentioned P type conducting and the semiconductor layer 21 of N type conducting, and exposes above-mentioned N electrode 28 and P electrode 27.
Above-mentioned heat dissipating layer 24 connects the semiconductor layer 21 of above-mentioned N type conducting and extends on the encapsulating carrier plate.
Please with reference to the schematic diagram of fabrication technology of Fig. 4 a to Fig. 4 c, the present invention discloses a kind of manufacturing approach of side cooling LED 02, and its manufacturing approach comprises the following step.
Step 2A; One substrate 20 is provided; And form a resilient coating 25, one unadulterated semiconductor layer 26 and a metal level 5 in regular turn on above-mentioned substrate 20; (metal organic chemical vapordeposition MOCVD) forms, and the mode of above-mentioned metal level 5 through vapor deposition (Evoaporation) or sputter (Sputter) is formed on the unadulterated semiconductor layer 26 through Metalorganic chemical vapor deposition for wherein above-mentioned resilient coating 25 and unadulterated semiconductor layer 26.
Then utilize optical lithography (photo lithography) and etched mode, make above-mentioned metal level 5 produce patterning.The present invention provides a preferred embodiment to accomplish above-mentioned steps through optical lithography (photo lithography) and etched mode; Like step 2B; Apply a photoresist layer 71 on above-mentioned metal level 5; And a photo mask layer 61 is set in the top of aforementioned photic resist layer 71, above photo mask layer 61, provides a light source 91 simultaneously towards photo mask layer 61 emission light.
Step 2C, after photoresist layer 71 was receiving the irradiation of light, the part of its photoresist layer 71 exposure can be dissolved, and the opposite photo mask layer 61 that receives is covered the part that does not receive irradiate light and is then existed.
Above-mentioned photoresist layer 71 is positive photoresist, i.e. photoresist deliquescing or decomposition after the sensitization.The present invention provides another embodiment in addition, and wherein photoresist layer 71 is a negative photoresist, and promptly photoresist does not decompose after the sensitization.Therefore, being provided with of its photo mask layer 61 can be relative with step 2C, and do not receive photo mask layer 61 to cover and the part that receives irradiate light can exist.
Step 2D removes photo mask layer 61 and light source 91, then utilizes etched mode to make part metals layer 5 be removed and produce hole 51, and wherein etched mode comprises Wet-type etching (wet etching) and two kinds of technology of dry-etching (dry etching).
Step 2E removes photoresist layer 71, and the metal level 5 that formation one has pattern is on unadulterated semiconductor layer 26, and the metal level 5 that wherein has pattern comprises a plurality of holes 51 and pattern metal 52.
Step 2F; The semiconductor layer 23 of semiconductor layer 21, luminescent layer 22 and the conducting of P type that forms a N type conducting in regular turn is on the metal level with pattern 5; The wherein above-mentioned metal level with pattern 5 is ohmic contact with the semiconductor layer 21 of N type conducting, and the semiconductor layer 21 of N type conducting extends to a plurality of holes 51 of the metal level 5 with pattern.Above-mentioned side cooling LED 02 can be the light-emitting diode of III-V family or the light-emitting diode of II-VI family; Wherein luminescent layer 22 can be the structure of single quantum well layer (single quantum well) or multiple quantum trap layer (multiple quantum layers); The semiconductor layer 23 of the semiconductor layer 21 of wherein above-mentioned N type conducting, luminescent layer 22 and the conducting of P type is through Metalorganic chemical vapor deposition (metal organic chemical vapor deposition; MOCVD) or the molecular beam epitaxy flop-in method (molecular beam epitaxy MBE) forms.
Step 2G; Utilize optical lithography (photo lithography) and etched mode; The semiconductor layer 21 of semiconductor layer 23, luminescent layer 22 and the conducting of N type of the P type conducting of a feasible part is removed, and the semiconductor layer 21 of part N type conducting comes out with the metal level 5 with pattern.
Step 2H; Utilize the mode of vapor deposition (Evoaporation) or sputter (Sputter) to form metal level; Utilize optical lithography (photo lithography) and etched mode to make the shape of P electrode 27 be formed on the semiconductor layer 23 of P type conducting simultaneously, and the shape of N electrode 28 is formed on the semiconductor layer 21 of the N type conducting that exposes.
Step 2I; Utilize chemical vapour deposition (CVD) (chemical vapor deposition; CVD) or plasma auxiliary chemical vapor deposition (plasma enhanced chemical vapor deposition; PECVD) mode forms on the semiconductor layer 21 of semiconductor layer 23, luminescent layer 22 and the conducting of N type that protective layer 29 is covered in the conducting of aforesaid P type, and exposes aforesaid N electrode 28 and P electrode 27.
Step 2J when the step of encapsulation, is coated with thermal paste and invests on the encapsulating carrier plate, and when nude film is positioned over when being coated with on the encapsulating carrier plate that has attached thermal paste, its thermal paste can extend to semiconductor layer 21 surfaces of the N type conducting that exposes along the nude film side.And when thermal paste is cooled off, just form a heat dissipating layer 24 in the semiconductor layer of the N type conducting that exposes 21 surfaces and extend on the encapsulating carrier plate.
Please with reference to shown in the structure schematic top plan view of the structural profile sketch map of Fig. 5 a and Fig. 5 b; The present invention discloses a kind of light-emitting diode 03 of side heat radiating type, and it comprises the semiconductor layer 31, a luminescent layer 32, the semiconductor layer 33 of a P type conducting, the metal level 8 that a heat dissipating layer 34 and has pattern of a substrate 30, a N type conducting.
Above-mentioned substrate 30 and have between the metal level 8 of pattern and comprised a resilient coating 35, wherein resilient coating 35 and have between the metal level 8 of pattern and have a unadulterated semiconductor layer 36 in addition.
Above-mentioned luminescent layer 32 is between the semiconductor layer 33 of the semiconductor layer 31 of N type conducting and the conducting of P type, and aforesaid luminescent layer 32 can be the structure of single quantum well layer (single quantum well) or multiple quantum trap layer (multiple quantum layers).
Hold said structure, semiconductor layer 31 depressions of wherein semiconductor layer 33, luminescent layer 32 and the conducting of N type of the P type conducting of a part, the metal level 8 that makes part have pattern exposes out.Have a P electrode 37 on the semiconductor layer 33 of above-mentioned in addition P type conducting, and have a N electrode 38 to be positioned at the metal level with pattern 8 that exposes in addition.
An other protective layer 39 covers the semiconductor layer 33 of above-mentioned P type conducting and the semiconductor layer 31 of N type conducting, and exposes above-mentioned N electrode 38 and P electrode 37.
Above-mentioned heat dissipating layer 34 connects the above-mentioned metal level with pattern 8 and extends on the encapsulating carrier plate.
In the structure of the light-emitting diode 03 of disclosed side heat radiating type; N electrode 38 is to be arranged on the metal level 8 with pattern; Be the metallic conduction material owing to have the metal level 8 of pattern; Therefore, this kind structure can make that luminescent layer 32 its electric currents distributions in the semiconductor are more even, can promote the luminous efficiency of the light-emitting diode 03 of side heat radiating type whereby.
Please with reference to the schematic diagram of fabrication technology of Fig. 6 a to Fig. 6 c, the present invention discloses a kind of manufacturing approach of side cooling LED 03, and its manufacturing approach comprises the following step.
Step 3A; One substrate 30 is provided; And form in regular turn the unadulterated semiconductor layer of a resilient coating 35, one 36, with a metal level 8 on above-mentioned substrate 30; (metal organic chemical vapordeposition MOCVD) forms, and the mode of above-mentioned metal level 8 through vapor deposition (Evoaporation) or sputter (Sputter) is formed on the unadulterated semiconductor layer 36 through Metalorganic chemical vapor deposition for wherein above-mentioned resilient coating 35 and unadulterated semiconductor layer 36.
Then utilize optical lithography (photo lithography) and etched mode, make above-mentioned metal level 8 produce patterning.The present invention provides a preferred embodiment to accomplish above-mentioned steps through optical lithography (photo lithography) and etched mode; Like step 3B; Apply a photoresist layer 72 on above-mentioned metal level 8; And a photo mask layer 62 is set in the top of aforementioned photic resist layer 72, above photo mask layer 62, provides a light source 92 simultaneously towards photo mask layer 62 emission light.
Step 3C, after photoresist layer 72 was receiving the irradiation of light, the part of its photoresist layer 72 exposure can be dissolved, and the opposite photo mask layer 62 that receives is covered the part that does not receive irradiate light and is then existed.
Above-mentioned photoresist layer 72 is positive photoresist, i.e. photoresist deliquescing or decomposition after the sensitization.The present invention provides another embodiment in addition, and wherein photoresist layer 72 is a negative photoresist, and promptly photoresist does not decompose after the sensitization.Therefore, being provided with of its photo mask layer 62 can be relative with step 3C, and do not receive photo mask layer 62 to cover and the part that receives irradiate light can exist.
Step 3D removes photo mask layer 62 and light source 92, then utilizes etched mode to make part metals layer 8 be removed and produce hole 81, and wherein etched mode comprises Wet-type etching (wet etching) and two kinds of technology of dry-etching (dry etching).
Step 3E removes photoresist layer 72, and the metal level 8 that formation one has pattern is on unadulterated semiconductor layer 36, and the metal level 8 that wherein has pattern comprises a plurality of holes 81 and pattern metal 82.
Step 3F; The semiconductor layer 33 of semiconductor layer 31, luminescent layer 32 and the conducting of P type that forms a N type conducting in regular turn is on the metal level with pattern 8; The wherein above-mentioned metal level with pattern 8 is ohmic contact with the semiconductor layer 31 of N type conducting, and the semiconductor layer 31 of N type conducting extends to a plurality of holes 81 of the metal level 8 with pattern.Above-mentioned side cooling LED 03 can be the light-emitting diode of III-V family or the light-emitting diode of II-VI family; Wherein luminescent layer 32 can be the structure of single quantum well layer (single quantum well) or multiple quantum trap layer (multiple quantum layers); The semiconductor layer 33 of the semiconductor layer 31 of wherein above-mentioned N type conducting, luminescent layer 32 and the conducting of P type is through Metalorganic chemical vapor deposition (metal organic chemical vapor deposition; MOCVD) or the molecular beam epitaxy flop-in method (molecular beam epitaxy MBE) forms.
Step 3G; Utilize optical lithography (photo lithography) and etched mode; The semiconductor layer 31 of semiconductor layer 33, luminescent layer 32 and the conducting of N type of the P type conducting of a feasible part is removed, and the semiconductor layer 31 of part N type conducting comes out with the metal level 8 with pattern.
Step 3H; Utilize the mode of vapor deposition (Evoaporation) or sputter (Sputter) to form metal level; Utilize optical lithography (photo lithography) and etched mode to make the shape of P electrode 37 be formed on the semiconductor layer 33 of P type conducting simultaneously, and the shape of N electrode 38 is formed on the metal level with pattern 8 that exposes.
Step 3I; Utilize chemical vapour deposition (CVD) (chemical vapor deposition; CVD) or plasma auxiliary chemical vapor deposition (plasma enhanced chemical vapor deposition; PECVD) mode forms on the semiconductor layer 31 of semiconductor layer 33, luminescent layer 32 and the conducting of N type that protective layer 39 is covered in the conducting of aforesaid P type, and exposes aforesaid N electrode 38 and P electrode 37.
Step 3J when the step of encapsulation, is coated with thermal paste and invests on the encapsulating carrier plate, and when nude film is positioned over when being coated with on the encapsulating carrier plate that has attached thermal paste, its thermal paste can extend to semiconductor layer 31 surfaces of the N type conducting that exposes along the nude film side.And when thermal paste is cooled off, just form a heat dissipating layer 34 in the metal level that exposes 8 surface and extend on the encapsulating carrier plate with pattern.
In the material part, the substrate of above-mentioned side cooling LED can be sapphire substrate, silicon carbide substrate, lithium aluminate substrate, lithium gallium oxide substrate, silicon substrate, gallium nitride base board, zinc oxide substrate, aluminum zinc oxide substrate, GaAs substrate, gallium phosphide substrate, gallium antimonide substrate, indium phosphide substrate, indium arsenide substrate, zinc selenide substrate or metal substrate.
Above-mentioned side cooling LED can be the light-emitting diode of III-V group-III nitride or the light-emitting diode of II-VI group-III nitride, and wherein luminescent layer can be the structure of single quantum well layer (single quantum well) or multiple quantum trap layer (multiple quantum layers).
Above-mentioned heat dissipating layer forms through thermal paste cooling after coagulation, and its material is that argent (Silver) mixes with epoxy resin (Epoxy).
Above-mentioned resilient coating can be aluminium nitride (AlN), aluminum gallium nitride (AlGaN) or gallium nitride arsenic/gallium nitride arsenic (InGaN/InGaN), and above-mentioned unadulterated semiconductor layer is gallium nitride (GaN).
Above-mentioned P electrode and N electrode can be the high metal of electrical conductivity; Preferable material provided by the present invention is metallic copper (Copper); The material of the above-mentioned in addition metal level with pattern is a metal high temperature resistant and that conductive coefficient is high, can be chromium (Chromium) or tungsten (Tungsten).
Above-mentioned protective layer is a protective clear layer, and material can be silicon dioxide (SiO2), silicon nitride (Si3N4) or silicon oxynitride (SiON).
Please with reference to shown in Figure 7; When disclosed side cooling LED when luminous; The thermal source that its luminescent layer 42 is produced can conduct to heat dissipating layer 44 with 4 conduction of the metal level with pattern with thermal source via the semiconductor layer 41 of N type conducting; Heat dissipating layer 44 can be taken heat energy light emitting diode construction out of and conducted on the encapsulating carrier plate 40 this moment, and encapsulating carrier plate 40 can fit pin 43 be derived thermal source outside the package structure for LED simultaneously.
Disclosed side cooling LED conducts the luminescent layer thermal source through the above-mentioned metal level with pattern via side, and cooperates encapsulating structure that thermal source is derived outside the package structure for LED.This structure can be improved the light-emitting diode of traditional coplanar electrode must be by the shortcoming of the epitaxial substrate of conductive coefficient difference heat radiation.
Disclosed light-emitting diode, the cost that need not increase its manufacturing can improve the unfavorable problem of light-emitting diode heat extraction, and then provides high efficient LED that better luminous efficiency can be arranged.
Apparently, according to the description among the top embodiment, the present invention has many corrections and difference.Therefore need in the scope of its additional claim item, understand, except above-mentioned detailed description, the present invention can also implement in other embodiment widely.The above-mentioned the preferred embodiments of the present invention that are merely not are in order to limit claim of the present invention; All other do not break away from the equivalence of being accomplished under the disclosed spirit and changes or modification, all should be included in the accompanying claims.