CN101820279A - Circuit for synchronization of multiple pulse width modulators - Google Patents

Circuit for synchronization of multiple pulse width modulators Download PDF

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Publication number
CN101820279A
CN101820279A CN 201010175616 CN201010175616A CN101820279A CN 101820279 A CN101820279 A CN 101820279A CN 201010175616 CN201010175616 CN 201010175616 CN 201010175616 A CN201010175616 A CN 201010175616A CN 101820279 A CN101820279 A CN 101820279A
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triode
pulse width
pwm
resistance
width modulator
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CN 201010175616
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CN101820279B (en
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张宏科
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771 Research Institute of 9th Academy of CASC
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771 Research Institute of 9th Academy of CASC
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Abstract

The invention discloses a circuit for synchronization of a plurality of pulse width modulators (PWM). The circuit is characterized in that the circuit comprises a blocking condenser C1, a first resistance R1 for charging and discharging the blocking condenser C1, a triode P1 and a second resistance R2 which converts a synchronous pulse current signal into a Slave PWM synchronizing signal; one end of the blocking condenser C1 is connected with a Master PWM frequency-fixed triangular wave signal OSCm end, while the other end is connected with a base electrode b of the triode P1; one end of the first resistance R1 is connected with the base electrode b of the triode P1, while the other end is connected with an emitting electrode e of the triode P1; one end of the second resistance R2 is connected with a collecting electrode c of the triode P1, while the other end is grounded (GND); the emitting electrode e of the triode P1 is connected with a voltage reference Vrefm end of a Master PWM or a voltage reference Vrefs end of a Slave PWM; and the connection point of the collecting electrode c of the triode P1 and the second resistance R2 outputs a synchronizing pulse signal (syn) required by the Slave PWM.

Description

Be used for the synchronous circuit of a plurality of pulse width modulators
Technical field
The present invention relates to a kind of synchronous circuit of a plurality of pulse width modulators that is used for, be particularly useful for the switching power circuit of a plurality of pulse width modulator work in the power-supply system.
Background technology
When a plurality of pulse width modulators are worked in a power-supply system, because each pulse width modulator frequency varies in size, exist difference frequency to disturb between a plurality of pulse width modulators, cause the power-supply system vibration when serious, the stability of losing the job.Simultaneously, a plurality of pulse width modulators make switching time superimposed sometimes because switching signal is asynchronous, stagger sometimes, and the stack of switching noise shows as time varying frequency, thereby has weakened the filter effect of power input electromagnetic compatibility filter.In order to overcome the problems referred to above, during a plurality of pulse width modulator co-operation, adopt simultaneous techniques, make a plurality of pulse width modulators with synchronous working frequently, can significantly improve the job stability and the Electro Magnetic Compatibility of power-supply system.
U.S. Texas Instruments company has provided a kind of many pulse width modulators synchronous circuit in its product application note (APPLICATION NOTE:U-100AUC3842/3/4/5 PROVIDES LOW-COST CURRENT-MODE CONTROL).This synchronous circuit adopted 3 triodes, 3 electric capacity, 6 resistance totally 12 elements generate synchronization pulse (Fig. 1).This pulse width modulator synchronous circuit operation principle is, triode N1 and resistance R 1 are used for finishing to the fixed emitter following of triangular wave frequently of master pulse width modulator (Master PWM), and this follows 1 pair of capacitor C the signal stopping direct current and get the base stage b that exchanges and AC signal is superimposed on triode P1; Resistance R 2 and R3 provide direct current biasing for triode P1 base stage after to the voltage reference Vrefm dividing potential drop of Master PWM; Triode P1, resistance R 4 and capacitor C 2, the AC signal trailing edge that provides in capacitor C 1 produce the lock-out pulse current signal and output to the base stage b of triode N2; Triode N2 and resistance R 5 constitute emitter follower, the output positive voltage pulse signals; This signal every straight after-applied on resistance R 6, is exported the required synchronizing signal syn of Slave PWM in capacitor C 3 with resistance R 6 tie point places through capacitor C 3.
Two pulse width modulators that above-mentioned Texas Instruments company provides have following weak point with circuit synchronously: 1) structure more complicated, debugging inconvenience; 2) triangular wave produces synchronizing signal (positive voltage pulse signals) to deciding frequently from pulse width modulator (Slave PWM) by the fixed triangular wave trailing edge frequently of master pulse width modulator (Master PWM), need be through three triodes time-delays, and synchronizing relay is bigger; 3) triode P1 base stage band direct current biasing, Master PWM surely frequently the HF switch noise spine on the triangular wave be added on the base input end of triode P1 easily by capacitor C 1, and amplified by triode P1 after output to the deciding on the frequency triangular wave of Slave PWM behind the triode N2, resistance R 5, capacitor C 3, resistance R 6 emitter followings, reduced the reliability of synchronizing signal work; 4) used components and parts are more, and the circuit board face that takies is bigger.
Show " Switching Power Supply Design ﹠amp at Sanjaya Maniktala; Optimization " mentioned a kind of two pulse width modulator synchronous circuits (Fig. 2) in the book.This synchronous circuit adopted 1 triode, 1 electric capacity, 3 resistance totally 5 elements generate synchronization pulse.This circuit structure is simpler than the pulse width modulator of the manying synchronous circuit of Fig. 1, but used element is still many than the circuit element that the present invention relates to, and because the synchronous transistor base of this circuit has applied direct current biasing, Master PWM surely frequently the HF switch noise spine on the triangular wave be added on the base input end of triode P1 easily by capacitor C 1, and amplified after resistance R 3 outputs to deciding on the frequency triangular wave of Slave PWM by triode P1, reduced the reliability of synchronizing signal work.
Summary of the invention
The invention provides the synchronous circuit of a kind of many pulse width modulators, be intended to solve the following problem of the related many pulse width modulators synchronous circuit of background technology: 1) complex structure debugging inconvenience; 2) synchronizing relay is bigger; 3) triode band direct current biasing synchronizing signal is subject to disturb synchronously; 4) components and parts are unfavorable for miniaturization more.
For reaching above purpose, the present invention takes following technical scheme to be achieved: a kind of synchronous circuit of a plurality of pulse width modulators that is used for, comprise a capacitance C1, first resistance R 1 of discharging and recharging for capacitance C1, one master pulse width modulator Master PWM surely frequently the triangular wave trailing edge produce the triode P1 of lock-out pulse current signal and one the lock-out pulse current signal be converted to from second resistance R 2 of pulse width modulator Slave PWM synchronizing signal; Described capacitance C1 one end connects master pulse width modulator Master PWM frequency triangular signal OSCm end surely, and the other end connects the base stage b of triode P1; First resistance R, 1 one ends connect the base stage b of triode P1, and the other end connects the emitter e of triode P1; One end of second resistance R 2 connects the collector electrode c of triode P1, other end ground connection GND; The emitter e of triode P1 connects the voltage reference Vrefm end of master pulse width modulator Master PWM or from the voltage reference Vrefs end of pulse width modulator Slave PWM.The tie point output of the collector electrode c of triode P1 and second resistance R 2 is from the required synchronization pulse syn of pulse width modulator Slave PWM.
In the such scheme, the connecting one to three from the required synchronization pulse syn of pulse width modulator Slave PWM and decide frequency capacitor C s of described output from pulse width modulator Slave PWM.
Compared with prior art, the invention has the advantages that: 1. circuit structure is simple, debugging convenient (element and parameter are exempted to transfer or fine setting gets final product); 2. synchronizing relay little (generation of synchronizing signal is only through a triode time-delay); 3. the synchronous circuit interference rejection capability is strong, the synchronizing signal reliable operation.
4. components and parts are few, take circuit board face little (only being made of 4 circuit elements).
Description of drawings
Fig. 1 uses circuit (dotted portion among the figure) synchronously for two pulse width modulators that Texas Instruments company provides.
Fig. 2 uses circuit (dotted portion among the figure) synchronously for two pulse width modulators that propose in the Sanjaya Maniktala works.
Fig. 3 is the synchronous circuit (dotted portion among the figure) of a synchronous Slave PWM of Mster PWM of the present invention.
Fig. 4 is the synchronous circuit (dotted portion among the figure) of synchronous two the Slave PWM of Mster PWM of the present invention.
Fig. 5 is the synchronous circuit (dotted portion among the figure) of synchronous three the Slave PWM of Mster PWM of the present invention.
Fig. 6 is principal and subordinate's pulse width modulator synchronous working waveform in Fig. 1 circuit (a triode P1 base stage band direct current biasing).
Fig. 7 is principal and subordinate's pulse width modulator synchronous working waveform (triode P1 base stage is not with direct current biasing) in Fig. 3 circuit.
Embodiment
The present invention is described in further detail below in conjunction with drawings and the specific embodiments.
As shown in Figure 3, a kind of synchronous circuit of a plurality of pulse width modulators that is used for, comprise a capacitance C1, first resistance R 1 of discharging and recharging for capacitance C1, one master pulse width modulator Master PWM surely frequently the triangular wave trailing edge produce the triode P1 of lock-out pulse current signal and one the lock-out pulse current signal be converted to second resistance R 2 from the required synchronizing signal of pulse width modulator SlavePWM.Wherein: R1=10k Ω; R2=100 Ω; C1=100pF; The triode model is 3CK3108.
Capacitance C1 one end connects master pulse width modulator Master PWM frequency triangular signal OSCm end surely, and the other end connects the base stage b of triode P1; First resistance R, 1 one ends connect the base stage b of triode P1, and the other end connects the emitter e of triode P1; One end of second resistance R 2 connects the collector electrode c of triode P1, other end ground connection GND; The emitter e of triode P1 connects the voltage reference Vrefm end of master pulse width modulator Master PWM or from the voltage reference Vrefs end of pulse width modulator Slave PWM, the tie point of the collector electrode c of triode P1 and second resistance R 2 is exported from the required synchronization pulse syn of pulse width modulator Slave PWM.
The synchronous circuit operation principle of Fig. 3 is: when precipitous trailing edge appears in the fixed frequency of master pulse width modulator (Master PWM) triangular wave OSCm, because the voltage at capacitance C1 two ends can not suddenly change, so the base stage b current potential of triode 3CK3108 reduces suddenly synchronously, suddenly conducting of this PNP triode P1, the electric current I c on its collector electrode c is producing positive voltage pulse on the resistance R 2 synchronously; Can not suddenly change owing to go up voltage, so the positive voltage pulse on the resistance R 2 appears at simultaneously and decides frequency capacitor C s upper end (be Slave PWM surely triangular wave OSCs end) frequently synchronously from the fixed capacitor C s frequently of pulse width modulator (Slave PWM).So Slave PWM synchronizing signal (positive voltage pulse) occurs on the triangular wave OSCs surely frequently.Along with the charging of 1 pair of capacitor C 1 of resistance R, triode P1 base stage b voltage is drawn high by resistance R 1, and triode P1 turn-offs, and synchronizing signal disappears.Along with MasterPWM surely frequently triangular wave OSCm triangular wave slowly climb, capacitor C 1 is slowly discharged by resistance R 1, triode is in off state all the time.Slave PWM frequency triangular wave OSCs surely is in the triangular wave rising edge that slowly climbs by the frequency that its fixed resistance R s frequently and fixed frequency capacitor C s set, and waits for the next synchronizing signal that Master PWM produces when precipitous trailing edge appears in triangular wave OSCm frequently surely.Because the base stage b of triode P1 does not have direct current biasing, thus Master PWM surely frequently the slow ramp-up period of the triangular wave OSCm interference waveform that puts on triode P1 base stage b can not make triode P1 open and be delivered to Slave PWM surely frequently on the triangular wave OSCs and then cause synchronous false triggering.So synchronous circuit to Master PWM surely frequently triangular wave OSCm go up the interference waveform that exists and have stronger antijamming capability.。
Fig. 3 be with a Slave PWM decide be connected in synchronization pulse Syn after the end disconnection that frequency capacitor C s1 originally linked to each other with ground (GND), can realize the function of a synchronous Slave PWM of Mster PWM.
As shown in Figure 4, with two Slave PWM (Slave1 and Slave2) decide be connected in synchronization pulse Syn jointly after a end that frequency capacitor C s1, Cs2 originally linked to each other with ground (GND) all disconnects, can realize the function of synchronous two the Slave PWM of Mster PWM.
As shown in Figure 5, with three Slave PWM (Slave1, Slave2 and Slave3) decide be connected in synchronization pulse Syn jointly after a end that frequency capacitor C s1, Cs2, Cs3 link to each other with ground (GND) originally all disconnects, can realize the function of synchronous three the Slave PWM of Mster PWM.
Adopt synchronous circuit of the present invention, do not have specific (special) requirements with synchronous one to three a Slave PWM best performance of Mster PWM and to used components and parts.During synchronous Slave PWM more than three, need to select the big triode P1 (β 〉=200) of current amplification factor.
As shown in Figure 6, two pulse width modulators that Texas Instruments company provides are used circuit synchronously, when principal and subordinate's pulse width modulator synchronous working, because triode P1 base stage b band direct current biasing, Master PWM surely frequently the slow ramp-up period of the triangular wave OSCm interference waveform that puts on triode P1 base stage b after triode P1 amplifies, be delivered to Slave PWM surely frequently on the triangular wave OSCs.Because along with the increase of Master PWM pulsewidth, its PWM turn-offs the interference meeting that switching noise constantly causes and moves to fixed triangular wave top frequently, when this disturbs near fixed triangular wave top frequently, will be caused the synchronous false triggering of Slave PWM by mistake as synchronizing signal.So triode P1 base stage band direct current biasing can reduce the reliability of synchronizing signal work.As shown in Figure 7, two pulse width modulators that the present invention provides are used circuit synchronously, when principal and subordinate's pulse width modulator synchronous working, because triode P1 base stage b is not with direct current biasing, Slave PWM can not amplified and be delivered to the interference that Master PWM switching noise causes, and triangular wave OSCs is last frequently surely by triode P1, the synchronous circuit interference rejection capability is strong, the synchronizing signal reliable operation.

Claims (2)

1. one kind is used for the synchronous circuit of a plurality of pulse width modulators, it is characterized in that, comprise a capacitance C1, first resistance R 1 of discharging and recharging for capacitance C1, one master pulse width modulator Master PWM surely frequently the triangular wave trailing edge produce the triode P1 of lock-out pulse current signal and one the lock-out pulse current signal be converted to from second resistance R 2 of pulse width modulator Slave PWM synchronizing signal; Described capacitance C1 one end connects master pulse width modulator Master PWM frequency triangular signal OSCm end surely, and the other end connects the base stage b of triode P1; First resistance R, 1 one ends connect the base stage b of triode P1, and the other end connects the emitter e of triode P1; One end of second resistance R 2 connects the collector electrode c of triode P1, other end ground connection GND; The emitter e of triode P1 connects the voltage reference Vrefm end of master pulse width modulator Master PWM or from the voltage reference Vrefs end of pulse width modulator Slave PWM, the tie point of the collector electrode c of triode P1 and second resistance R 2 is exported from the required synchronization pulse syn of pulse width modulator Slave PWM.
2. the synchronous circuit of a plurality of pulse width modulators that is used for as claimed in claim 1 is characterized in that, the connecting one to three from the required synchronization pulse syn of pulse width modulator Slave PWM and decide frequency capacitor C s from pulse width modulator Slave PWM of described output.
CN2010101756164A 2010-05-18 2010-05-18 Circuit for synchronization of multiple pulse width modulators Active CN101820279B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103425069A (en) * 2013-08-15 2013-12-04 上海固泰科技有限公司 Method for synchronizing multiple devices on basis of CAN (controller area network) buses

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1808955A2 (en) * 2006-01-13 2007-07-18 Omron Corporation Inverter device
US20080265680A1 (en) * 2007-04-27 2008-10-30 Liebert Corporation Method for pulse width modulation synchronization in a parallel ups system
CN101416390A (en) * 2006-04-04 2009-04-22 密克罗奇普技术公司 Allowing immediate update of pulse width modulation values
CN101419479A (en) * 2008-12-10 2009-04-29 武汉大学 Low-voltage difference linear constant voltage regulator with novel structure

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1808955A2 (en) * 2006-01-13 2007-07-18 Omron Corporation Inverter device
CN101416390A (en) * 2006-04-04 2009-04-22 密克罗奇普技术公司 Allowing immediate update of pulse width modulation values
US20080265680A1 (en) * 2007-04-27 2008-10-30 Liebert Corporation Method for pulse width modulation synchronization in a parallel ups system
CN101419479A (en) * 2008-12-10 2009-04-29 武汉大学 Low-voltage difference linear constant voltage regulator with novel structure

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103425069A (en) * 2013-08-15 2013-12-04 上海固泰科技有限公司 Method for synchronizing multiple devices on basis of CAN (controller area network) buses

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