CN101944846B - 0.75-time charge pump circuit - Google Patents

0.75-time charge pump circuit Download PDF

Info

Publication number
CN101944846B
CN101944846B CN201010274686A CN201010274686A CN101944846B CN 101944846 B CN101944846 B CN 101944846B CN 201010274686 A CN201010274686 A CN 201010274686A CN 201010274686 A CN201010274686 A CN 201010274686A CN 101944846 B CN101944846 B CN 101944846B
Authority
CN
China
Prior art keywords
switch
charge pump
pump circuit
capacitor
electric capacity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201010274686A
Other languages
Chinese (zh)
Other versions
CN101944846A (en
Inventor
牟陟
周之栩
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Scarlett Ruipu microelectronics technology (Suzhou) Limited by Share Ltd
Original Assignee
3PEAKIC (SUZHOU) MICROELECTRONICS Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 3PEAKIC (SUZHOU) MICROELECTRONICS Co Ltd filed Critical 3PEAKIC (SUZHOU) MICROELECTRONICS Co Ltd
Priority to CN201010274686A priority Critical patent/CN101944846B/en
Publication of CN101944846A publication Critical patent/CN101944846A/en
Application granted granted Critical
Publication of CN101944846B publication Critical patent/CN101944846B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Abstract

The invention discloses a 0.75-time charge pump circuit which comprises capacitors and switches, and controls modulation output voltage by selecting the capacitors and the switches. The invention is characterized in that one end of a switch (S1) and one end of a switch (S2) are connected to an input voltage Vin together; the other end of the switch (S1) is respectively connected to a capacitor (C1) and a switch (S5), and the other end of the switch (S2) is respectively connected to a capacitor (C2) and a switch (S3); the other end of the switch (S3) is simultaneously connected with the other end of the capacitor (C1) relative to the switch (S1), a switch (S6) and a switch (S7); the other end of the switch (S6) and the other end of the switch (S5) form the output end Vout of a charge pump circuit together; the output end Vout is grounded through a load capacitor (C3); and the other end of the switch (S7) is connected with the other end of the capacitor (C2), and is grounded through a switch (S4). The invention prevents a PN junction from generating leakage current, and effectively reduces the chip statical power consumption and application cost.

Description

A kind of 0.75 times of charge pump circuit
Technical field
The present invention relates to integrated circuit fields, being specifically related to a kind of modulator output voltage is the charge pump circuit structure of input voltage non-integer fraction.
Background technology
Usually need use the voltage higher or smaller slightly than supply voltage than supply voltage in the integrated circuit, the application of charge pump that therefore is used for modulation power source voltage is quite extensive.Like the DC-to-DC transducer level beyond the supply voltage is provided; To operational amplifier high voltage is provided; And all outsides provide single voltage, and the circuit of the multiple level of inside needs, especially provide aspect the required voltage at nonvolatile memory, are bringing into play crucial effects.
Generally speaking, the charge pump circuit of output voltage that is used for the higher multiple of modulation ratio supply voltage is ripe relatively, and for example 2 times, 4 times charge pump circuit is widespread usage.But in many cases, the voltage output that some inner circuit of IC chip need be lower than supply voltage drives, and a kind of charge pump circuit specification relatively more commonly used is 0.75 times of charge pump circuit.But 4 of existing direct 0.75 times of charge pump circuit structure needs fly electric capacity and 11 switches can be realized, this has increased more than 50% and switch relevant chip area to a certain extent, increases by 4 pins simultaneously, thereby causes the significantly rising of chip cost.
Fly electric capacity and 7 circuit structures that switch can be realized even there is similar 0.75 times of charge pump also only to need 2 in addition; But in the phase III of its running; Input voltage is connected on C1-; C1+ is connected on C2+, and C2-is connected on output voltage, and such connection will cause node C1+ and the C2+ magnitude of voltage in the phase III greater than input voltage.This can produce the leakage current of PN junction in the side circuit design based on CMOS, thereby causes the quiescent dissipation of charge pump circuit to increase, even can't operate as normal.
Summary of the invention
In view of the defective that above-mentioned prior art exists, the object of the invention is intended to propose a kind of 0.75 times of novel charge pump circuit structure, reduces chip area and manufacturing cost on the one hand, overcomes the defective in the homogeneous circuit design on the other hand.
The object of the invention will be achieved through following technical scheme:
A kind of 0.75 times of charge pump circuit comprises electric capacity and switch, through electric capacity and switch are selected the control modulator output voltage, it is characterized in that:
A said switch (S1) and switch (S2) end are connected to input voltage V jointly InThe other end of switch (S1) is connected respectively to electric capacity (C1) and switch (S5); The other end of switch (S2) is connected to electric capacity (C2) and switch (S3) respectively; The other end of said switch (S3) links to each other with the other end, switch (S6) and the switch (S7) of electric capacity (C1) with respect to switch (S1) simultaneously, and the other end of the other end of said switch (S6) and switch (S5) constitutes the output V of charge pump circuit in the lump Out, said output V OutThrough a load capacitance (C3) ground connection; And said switch (S7) other end links to each other with electric capacity (C2) other end, and through a switch (S4) ground connection.
The operation of said charge pump circuit comprises the three phases in the one-period:
Phase I switch (S3), switch (S4) and switch (S5) conducting, switch (S1), switch (S2), switch (S6) and switch (S7) break off;
Second stage switch (S1) and switch (S6) conducting, switch (S2), switch (S3), switch (S4), switch (S5) and switch (S7) break off;
Phase III switch (S2), switch (S5) and switch (S7) conducting, switch (S1), switch (S3), switch (S4), switch (S6) break off.
Technique scheme of the present invention also can further be optimized for: said switch (S1) to switch (S7) is cmos switch, is driven by control signal and opens or close; Said control signal is other switching frequency of megahertz level; Said electric capacity (C1) and electric capacity (C2) are for flying electric capacity.
After the application implementation of 0.75 times of charge pump circuit of the present invention; Compare to the charge pump circuit of traditional technology; Saved 4 package pins and 2 and flown electric capacity, can effectively reduce charge pump circuit and reach more than 30%, thereby reduced the quiescent dissipation and the application cost of chip at the area on the chip; Avoided the defective of PN junction generation leakage current in the similar technology simultaneously.
Following constipation closes the embodiment accompanying drawing, and specific embodiments of the invention is done further to detail, so that technical scheme of the present invention is easier to understand, grasp.
Description of drawings
Fig. 1 a is the on off state sketch map of charge pump circuit phase I of the present invention;
Fig. 1 b is the on off state sketch map of charge pump circuit second stage of the present invention;
Fig. 1 c is the on off state sketch map of charge pump circuit phase III of the present invention;
Fig. 2 a is the simplified system block diagram of Fig. 1 a;
Fig. 2 b is the simplified system block diagram of Fig. 1 b;
Fig. 2 c is the simplified system block diagram of Fig. 1 c.
Embodiment
The present invention is from the purpose of chip miniaturized design and reduction manufacturing cost; Simultaneously also for overcoming the defective in traditional homogeneous circuit design; Researcher of the present invention is through careful circuit studies and experiment repeatedly; Proposed a kind of 0.75 times of novel charge pump circuit structure eventually,, formed the charge pump circuit system that can realize and satisfy each item functional requirement through simple switch and electric capacity combining structure.
0.75 times of charge pump circuit of this kind of the present invention comprises electric capacity and switch, through other switching frequency of megahertz level electric capacity and switch is selected the control modulator output voltage, and its concrete circuit structure characteristic is shown in Fig. 1 a~Fig. 1 c.Wherein a switch (S1) and switch (S2) end are connected to input voltage V jointly InThe other end of switch (S1) is connected respectively to electric capacity (C1) and switch (S5); The other end of switch (S2) is connected to electric capacity (C2) and switch (S3) respectively; The other end of switch (S3) links to each other with the other end, switch (S6) and the switch (S7) of electric capacity (C1) with respect to switch (S1) simultaneously, and the other end of the other end of switch (S6) and switch (S5) constitutes the output V of charge pump circuit in the lump Out, output V OutThrough a load capacitance (C3) ground connection; And switch (S7) other end links to each other with electric capacity (C2) other end, and through a switch (S4) ground connection.
Above-mentioned charge pump circuit is to regulate and control running by the control signal of one-period property, and said each cmos switch is independently controlled by control signal, and this control signal operation is divided into three phases in one-period, and the on off state in each stage is shown in Fig. 2 a~Fig. 2 c:
Phase I switch (S3), switch (S4) and switch (S5) conducting, switch (S1), switch (S2), switch (S6) and switch (S7) break off; At this moment, C1 and C2 series connection, C1+ meets output V Out, C2-ground connection, C1 and C1 discharge electric charge to C3; The loop voltage formula of equivalence is:
Eq.1 V Out=V1+V2, wherein V1, V2 are the voltage that flies electric capacity;
Second stage switch (S1) and switch (S6) conducting, switch (S2), switch (S3), switch (S4), switch (S5) and switch (S7) break off; At this moment, C1+ meets input V In, C1-meets output V Out, input V InTo C1 and C3 charging; The loop voltage formula of equivalence is:
Eq.2 V out=V in-V1
Phase III switch (S2), switch (S5) and switch (S7) conducting, switch (S1), switch (S3), switch (S4), switch (S6) break off; At this moment, C2+ meets input V In, C2-meets C1-, and C1+ meets output V Out, V InWith C1 C2 and C3 are charged; The loop voltage formula of equivalence is:
Eq.3 V out=V in-V2+V1
Join and separate above-mentioned three loop voltage formula, can derive to draw when circuit and start under the state of dynamic equilibrium, output voltage is 0.75 times of input voltage, under the condition of perfect switch, (does not promptly have internal power consumption), and output current is 0.75 times of output current.V out=0.75V in
After the control signal of one-period, each switch (S1) to (S7) returns to the home position, gets into the switch control modulation of following one-period, through regulating control signal suitable frequency and circuit of the present invention, exportable 0.75 times input voltage.
After the application implementation of 3/4ths times of charge pump circuits of the present invention; Compare to the charge pump circuit of conventional art; Saved 4 package pins and 2 and flown electric capacity, can effectively reduce charge pump circuit and reach more than 30%, thereby reduced the quiescent dissipation and the application cost of chip at the area on the chip; Avoided the defective of PN junction generation leakage current in the similar technology simultaneously.

Claims (5)

1. 0.75 times of charge pump circuit comprises electric capacity and switch, and through electric capacity and switch are selected the control modulator output voltage, it is characterized in that: switch S 1 is connected to input voltage V jointly with switch S 2 one ends InThe other end of switch S 1 is connected respectively to capacitor C 1 and switch S 5; The other end of switch S 2 is connected to capacitor C 2 and switch S 3 respectively; The other end of said switch S 3 links to each other with the other end, switch S 6 and the switch S 7 of capacitor C 1 with respect to switch S 1 simultaneously, and the other end of the other end of said switch S 6 and switch S 5 constitutes the output V of charge pump circuit in the lump Out, said output V OutThrough a load capacitance C3 ground connection; And said switch S 7 other ends link to each other with capacitor C 2 other ends, and through a switch S 4 ground connection.
2. a kind of 0.75 times of charge pump circuit according to claim 1, it is characterized in that: said switch S 1 to switch S 7 is cmos switch, is driven by control signal and opens or close.
3. a kind of 0.75 times of charge pump circuit according to claim 1 is characterized in that: through other switching frequency of megahertz level electric capacity and switch are selected the control modulator output voltage.
4. a kind of 0.75 times of charge pump circuit according to claim 1 is characterized in that: said capacitor C 1 and capacitor C 2 are for flying electric capacity.
5. a kind of 0.75 times of charge pump circuit according to claim 1; It is characterized in that: the operation of said charge pump circuit comprises the three phases in the one-period: phase I switch S 3, switch S 4 and switch S 5 conductings, and switch S 1, switch S 2, switch S 6 and switch S 7 are broken off; Second stage switch S 1 and switch S 6 conductings, switch S 2, switch S 3, switch S 4, switch S 5 and switch S 7 are broken off; Phase III switch S 2, switch S 5 and switch S 7 conductings, switch S 1, switch S 3, switch S 4, switch S 6 are broken off.
CN201010274686A 2010-09-07 2010-09-07 0.75-time charge pump circuit Active CN101944846B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201010274686A CN101944846B (en) 2010-09-07 2010-09-07 0.75-time charge pump circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201010274686A CN101944846B (en) 2010-09-07 2010-09-07 0.75-time charge pump circuit

Publications (2)

Publication Number Publication Date
CN101944846A CN101944846A (en) 2011-01-12
CN101944846B true CN101944846B (en) 2012-10-17

Family

ID=43436672

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201010274686A Active CN101944846B (en) 2010-09-07 2010-09-07 0.75-time charge pump circuit

Country Status (1)

Country Link
CN (1) CN101944846B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103532377B (en) * 2013-10-31 2015-12-23 无锡中感微电子股份有限公司 A kind of charge pump apparatus and use the electric power management circuit of this device
CN109039058B (en) * 2018-08-09 2020-06-26 安徽矽磊电子科技有限公司 Voltage converter based on configurable switched capacitor
CN110620510B (en) * 2019-09-29 2020-07-28 维沃移动通信有限公司 Power supply circuit, electronic device, and power supply circuit control method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2245780A (en) * 1990-07-05 1992-01-08 Motorola Inc Voltage multiplier
US5767735A (en) * 1995-09-29 1998-06-16 Intel Corporation Variable stage charge pump
US6806761B1 (en) * 2003-05-01 2004-10-19 National Semiconductor Corporation Integrated charge pump circuit with low power voltage regulation
CN101335486A (en) * 2007-06-28 2008-12-31 天利半导体(深圳)有限公司 Low-cost high-efficient time division multiplex charge pump circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7602232B2 (en) * 2005-11-01 2009-10-13 Semiconductor Components Industries, L.L.C. Programmable fractional charge pump for DC-DC converter

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2245780A (en) * 1990-07-05 1992-01-08 Motorola Inc Voltage multiplier
US5767735A (en) * 1995-09-29 1998-06-16 Intel Corporation Variable stage charge pump
US6806761B1 (en) * 2003-05-01 2004-10-19 National Semiconductor Corporation Integrated charge pump circuit with low power voltage regulation
CN101335486A (en) * 2007-06-28 2008-12-31 天利半导体(深圳)有限公司 Low-cost high-efficient time division multiplex charge pump circuit

Also Published As

Publication number Publication date
CN101944846A (en) 2011-01-12

Similar Documents

Publication Publication Date Title
CN104335280B (en) Negative-voltage generator
US9548648B2 (en) Switched reference MOSFET drive assist circuit
CN104796171B (en) A kind of control circuit applied to SOI CMOS RF switches
CN102082512A (en) Driver for piezoelectric actuator
CN106549564A (en) Power amplification device with supply modulation and method
CN101218736A (en) Multiphase voltage regulation using paralleled inductive circuits having magnetically coupled inductors
US20130082666A1 (en) Buck power factor correction system
CN103490629A (en) Switched-mode power supply and a two-phase DC to DC converter
Abdulslam et al. 8.2 A continuous-input-current passive-stacked third-order buck converter achieving 0.7 W/mm 2 power density and 94% peak efficiency
US9564890B2 (en) System-on-chip with dc-dc converters
CN107342685A (en) DCDC converters
CN109586572A (en) Converter and power management integrated circuit system
CN102158082B (en) Power supply management system with multipath output
US10447161B2 (en) Inverting buck-boost power converter
CN101944846B (en) 0.75-time charge pump circuit
KR102190294B1 (en) Switched capacitor converter
CN204103759U (en) Be applicable to power supply circuits and the bridge circuit of upper switching tube driving in bridge circuit
CN103532382A (en) Switching power supply circuit
KR102466914B1 (en) Switched capacitor converter
US9225238B2 (en) Multiple level charge pump generating voltages with distinct levels and associated methods
CN110391730A (en) The negative charge pump that output voltage range for boost LED driver doubles
CN100586015C (en) Semiconductor circuit apparatus
CN102231597A (en) Charge pump and working method thereof
CN103248222A (en) Boost voltage converter
CN110120746A (en) A kind of Multiphase Parallel DCDC circuit and its chip structure

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
ASS Succession or assignment of patent right

Owner name: SUZHOU 3PEAK ELECTRONIC TECHNOLOGY CO., LTD.

Free format text: FORMER OWNER: 3PEAKIC (SUZHOU) MICROELECTRONICS CO., LTD.

Effective date: 20120604

C41 Transfer of patent application or patent right or utility model
TA01 Transfer of patent application right

Effective date of registration: 20120604

Address after: Xinghu Street Industrial Park of Suzhou city in Jiangsu province 215123 No. 328 Creative Industry Park 2-B304-1

Applicant after: Suzhou Ruipu Electronic Technology Co. Ltd.

Address before: Xinghu Street Industrial Park of Suzhou city in Jiangsu province 215123 No. 328 Creative Industry Park 2-B304

Applicant before: 3peakic (Suzhou) Microelectronics Co., Ltd.

C53 Correction of patent for invention or patent application
CB02 Change of applicant information

Address after: Xinghu Street Industrial Park of Suzhou city in Jiangsu province 215123 No. 328 Creative Industry Park 2-B3O4-1

Applicant after: 3peakic (Suzhou) Microelectronics Co., Ltd.

Address before: Xinghu Street Industrial Park of Suzhou city in Jiangsu province 215123 No. 328 Creative Industry Park 2-B304-1

Applicant before: Suzhou Ruipu Electronic Technology Co. Ltd.

COR Change of bibliographic data

Free format text: CORRECT: APPLICANT; FROM: SUZHOU 3PEAK ELECTRONIC TECHNOLOGY CO., LTD. TO: SUZHOU 3PEAKIC MICROELECTRONIC TECHNOLOGY CO., LTD.

C14 Grant of patent or utility model
GR01 Patent grant
ASS Succession or assignment of patent right

Owner name: 3PEAKIC MICROELECTRONICS (SUZHOU) CO., LTD.

Free format text: FORMER OWNER: SUZHOU 3PEAKIC MICROELECTRONIC TECHNOLOGY CO., LTD.

Effective date: 20130130

C41 Transfer of patent application or patent right or utility model
TR01 Transfer of patent right

Effective date of registration: 20130130

Address after: Xinghu Street Industrial Park of Suzhou city in Jiangsu province 215123 No. 328 Creative Industry Park 2-B304-1

Patentee after: Scarlett Ruipu microelectronics technology (Suzhou) Co., Ltd.

Address before: Xinghu Street Industrial Park of Suzhou city in Jiangsu province 215123 No. 328 Creative Industry Park 2-B3O4-1

Patentee before: 3peakic (Suzhou) Microelectronics Co., Ltd.

TR01 Transfer of patent right

Effective date of registration: 20170412

Address after: Xinghu Street Industrial Park of Suzhou city in Jiangsu province 215123 No. 328 Creative Industry Park 2-B304-1

Patentee after: Scarlett Ruipu microelectronics technology (Suzhou) Limited by Share Ltd

Address before: Xinghu Street Industrial Park of Suzhou city in Jiangsu province 215123 No. 328 Creative Industry Park 2-B304-1

Patentee before: Scarlett Ruipu microelectronics technology (Suzhou) Co., Ltd.

TR01 Transfer of patent right