Summary of the invention
The purpose of this invention is to provide a kind of TFT-LCD array base palte and manufacture method thereof, under the prerequisite that guarantees aperture opening ratio and display brightness, effectively solve the light leak defective.
To achieve these goals, the invention provides a kind of TFT-LCD array base palte, comprise the grid line and the data line that are formed on the substrate, form pixel electrode and thin film transistor (TFT) in the pixel region that described grid line and data line limit, described data line top is formed with the barrier bed that blocks the light leak zone.
The both sides of described data line also are provided with shield bars, and the edge of described barrier bed both sides is positioned at the zone that described shield bars blocks.
Described barrier bed and pixel electrode are forming with in a composition technology.
To achieve these goals, the present invention also provides a kind of TFT-LCD manufacturing method of array base plate, comprising:
Step 1, on substrate deposition grid metallic film, form the figure that comprises grid line and gate electrode by composition technology;
Step 2, on the substrate of completing steps 1, deposit gate insulation layer, semiconductor layer, doping semiconductor layer and metallic film is leaked in the source, form the figure that comprises data line, drain electrode, source electrode and TFT raceway groove by composition technology;
Step 3, on the substrate of completing steps 2 deposit passivation layer, form the figure comprise passivation layer via hole by composition technology, described passivation layer via hole is positioned at the top of drain electrode;
Step 4, on the substrate of completing steps 3 deposit transparent conductive film and shading metallic film, form the figure that comprises pixel electrode and barrier bed by composition technology, described pixel electrode is connected with drain electrode by passivation layer via hole, and described barrier bed is positioned at the top of data line.
Also be formed with shield bars in the described step 1 simultaneously.
The edge of described barrier bed both sides is positioned at the zone that described shield bars blocks.
Described step 4 can comprise:
On the substrate of completing steps 3, adopt the method for magnetron sputtering or thermal evaporation, successively deposit transparent conductive film and shading metallic film;
On described shading metallic film, apply one deck photoresist;
Adopt the exposure of half rank or gray-tone mask plate, make the complete reserve area of photoresist formation photoresist, photoresist remove zone and photoresist half reserve area fully, the complete reserve area of photoresist is corresponding to barrier bed figure region, photoresist half reserve area is corresponding to pixel electrode figure region, and photoresist is removed the zone fully corresponding to the zone beyond the above-mentioned figure; After the development treatment, the photoresist thickness of the complete reserve area of photoresist does not change, and photoresist is removed the photoresist in zone fully and removed the photoresist thickness attenuation of photoresist half reserve area fully;
By the first time etching technics etch away shading metallic film and the transparent conductive film that photoresist is removed the zone fully fully, form the barrier bed figure, described barrier bed is positioned at the top of data line;
By cineration technics, remove the photoresist of photoresist half reserve area, expose this regional shading metallic film;
By the second time etching technics etch away the shading metallic film of photoresist half reserve area fully, expose the transparent conductive film of its below, form the pixel electrode figure, pixel electrode is connected with drain electrode by passivation layer via hole;
Peel off remaining photoresist.
Described step 4 also can comprise:
On the substrate of completing steps 3, adopt the method for magnetron sputtering or thermal evaporation, the deposit transparent conductive film;
On described transparent conductive film, apply one deck photoresist;
Adopt the exposure of normal masks plate, make photoresist formation complete reserve area of photoresist and photoresist remove the zone fully, the complete reserve area of photoresist is corresponding to the pixel electrode region, and photoresist is removed the zone fully corresponding to the zone beyond the pixel electrode figure; After the development treatment, the photoresist thickness of the complete reserve area of photoresist does not change, and photoresist is removed the photoresist in zone fully and removed fully;
Etch away the transparent conductive film that photoresist is removed the zone fully fully by etching technics, form the pixel electrode figure, pixel electrode is connected with drain electrode by passivation layer via hole;
On formation pixel electrode and pixel electrode, remain with on the substrate of photoresist, adopt the method for magnetron sputtering or thermal evaporation, deposition shading metallic film, described shading metallic film ruptures at the photoresist fringe region;
Adopt liftoff stripping technology stripping photoresist, the shading metallic film on the stripping photoresist forms the barrier bed figure simultaneously, and described barrier bed figure is positioned at the top of data line.
Described etching technics is wet etching and adopted the mode at quarter, etches away the transparent conductive film of photoresist fringe region below.The thickness of described shading metallic film is
The invention provides a kind of TFT-LCD array base palte and manufacture method thereof,, under the prerequisite that guarantees aperture opening ratio and display brightness, effectively solve the light leak defective by above data line, forming barrier bed.Because barrier bed of the present invention is arranged on the array base palte, therefore no matter be color membrane substrates and accurately contraposition of array base palte, still color membrane substrates or array base palte are subjected to external impacts, though the black matrix on the color membrane substrates lost efficacy at this moment, but barrier bed of the present invention can play the interception of black matrix, be not subjected to contraposition and shock effect, can stop the front light leak fully, effectively stop the side light leak.Further, adopt the solution that strengthens black matrix width to compare with prior art, because barrier bed of the present invention can effectively be eliminated the light leak that bit errors causes, therefore the present invention can reduce the width of black matrix on the color membrane substrates to greatest extent, improves aperture opening ratio and the display brightness of TFT-LCD effectively.In addition, the TFT-LCD array base palte that the present invention is formed with barrier bed still adopts existing process equipment and condition preparation, under the prerequisite that does not increase composition technology, has improved TFT-LCD performance and quality on the whole.
Embodiment
Below by drawings and Examples, technical scheme of the present invention is described in further detail.
Fig. 1 is the planimetric map of TFT-LCD array base palte of the present invention, Fig. 2 be among Fig. 1 A1-A1 to sectional view, Fig. 3 be among Fig. 1 B1-B1 to sectional view.As Fig. 1~shown in Figure 3, the agent structure of TFT-LCD array base palte of the present invention comprises grid line 11, data line 13, pixel electrode 14, barrier bed 15 and the thin film transistor (TFT) that is formed on the substrate 1, orthogonal grid line 11 and data line 13 have defined pixel region, thin film transistor (TFT) and pixel electrode 14 are formed in the pixel region, grid line 11 is used for providing start signal to thin film transistor (TFT), data line 13 is used for providing data-signal to pixel electrode 14, barrier bed 15 is positioned at the top of data line 13, is used to block the light leak zone.Particularly, thin film transistor (TFT) comprises gate electrode 2, gate insulation layer 3, semiconductor layer 4, doping semiconductor layer (ohmic contact layer) 5, source electrode 6, drain electrode 7 and passivation layer 8, and gate electrode 2 is formed on the substrate 1, and is connected with grid line 11; Gate insulation layer 3 is formed on gate electrode 2 and the grid line 11 and covers whole base plate 1, and active layer (semiconductor layer 4 and doping semiconductor layer 5) is formed on the gate insulation layer 3 and is positioned at the top of gate electrode 2; One end of source electrode 6 is formed on the active layer, the other end is connected with data line 13, one end of drain electrode 7 is formed on the active layer, the other end is connected with pixel electrode 14 by the passivation layer via hole of offering on the passivation layer 89, form the TFT channel region between source electrode 6 and the drain electrode 7, the doping semiconductor layer 5 of TFT channel region is etched away fully, exposes semiconductor layer 4; Passivation layer 8 is formed on data line 13, source electrode 6 and the drain electrode 7 and covers whole base plate 1, offers the passivation layer via hole 9 that drain electrode 7 is connected with pixel electrode 14 in drain electrode 7 positions.Barrier bed 15 is formed on the passivation layer 8, and is positioned at the top of data line 13, plays the interception of black matrix.
In technique scheme of the present invention, can also comprise shield bars 12 structures, according to actual needs, shield bars 12 both can be arranged on pixel electrode 14 around, also can only be arranged on the both sides of pixel electrode 14, promptly be positioned at the both sides of data line 13, be provided with layer with grid line 11.The width of barrier bed 15 can be provided with according to actual needs, among the present invention, the width of barrier bed 15 is set to more than or equal to L1, be less than or equal to L2, wherein L1 is the distance between two shield bars, 12 close data line 13 1 lateral edges, and L2 is that two shield bars 12 are away from the distance between data line 13 1 lateral edges.Like this, the edge of barrier bed 15 both sides is positioned at the occlusion area of two shield bars 12, the shield bars 12 that is barrier bed 15 and its both sides has overlapping, barrier bed 15 is formed with shield bars 12 block the barrier structure in light leak zone, not only improve shaded effect to greatest extent, and can not influence aperture opening ratio and the display brightness of TFT-LCD.
Fig. 4~Figure 26 is the synoptic diagram of TFT-LCD array base palte manufacture process of the present invention, can further specify technical scheme of the present invention, in the following description, the alleged composition technology of the present invention comprises technologies such as photoresist coating, mask, exposure, etching, and photoresist is example with the positive photoresist.
Fig. 4 is TFT-LCD array base palte of the present invention planimetric map after the composition technology for the first time, Fig. 5 be among Fig. 4 A2-A2 to sectional view, Fig. 6 be among Fig. 4 B2-B2 to sectional view.At first adopt the method for magnetron sputtering or thermal evaporation, go up deposition one deck grid metallic film at substrate 1 (as glass substrate or quartz base plate), the grid metallic film can adopt metals such as Mo, Al, also can adopt the laminated film (as the Mo/Al/Mo laminated film) that is made of the multiple layer metal film.Adopt the normal masks plate that the grid metallic film is carried out composition, on substrate 1, form the figure that comprises gate electrode 2, grid line 11 and shield bars 12, as Fig. 4~shown in Figure 6.In the practical application, also can form the shield bars of other version or shield bars is not set.The present invention for the first time also can form the public electrode line graph in the composition technology simultaneously, forms memory capacitance structure of (Cs on Common) on public electrode wire.
Fig. 7 is TFT-LCD array base palte of the present invention planimetric map after the composition technology for the second time, Fig. 8 be among Fig. 7 A3-A3 to sectional view, Fig. 9 be among Fig. 7 B3-B3 to sectional view.On the substrate of finishing the said structure figure, at first using plasma strengthens chemical vapor deposition (being called for short PECVD) method, deposit gate insulation layer 3, semiconductor layer 4 and doping semiconductor layer 5 (also claiming ohmic contact layer) successively, adopt the method for magnetron sputtering or thermal evaporation then, metallic film is leaked in deposition one deck source.Gate insulation layer 3 can adopt oxide, nitride or oxynitrides, metallic film is leaked in the source can adopt metals such as Mo, Al, or adopt the low metal of Cu constant resistance rate, also can adopt the laminated film (as the Mo/Al/Mo laminated film) that constitutes by the multiple layer metal film.Adopt half rank or gray-tone mask plate to form data line 13, source electrode 6, drain electrode 7 and TFT channel region figure, as Fig. 7~shown in Figure 9 by composition technology.The present invention's composition technology for the second time is a kind of composition technology that adopts the multistep lithographic method, with form data line in four composition technologies of prior art, the source electrode, drain electrode is identical with the process of TFT channel region figure, technological process is specially: at first leak coating one deck photoresist on the metallic film in the source, adopt half rank or gray-tone mask plate that photoresist is exposed, make photoresist form complete exposure area, unexposed area and half exposure area, wherein unexposed area is corresponding to data line, source electrode and drain electrode figure region, half exposure area is corresponding to TFT channel region figure region between source electrode and the drain electrode, and complete exposure area is corresponding to the zone beyond the above-mentioned figure.After the development treatment, the photoresist thickness of unexposed area does not change, and forms the complete reserve area of photoresist, the photoresist of complete exposure area is removed fully, form photoresist and remove the zone fully, the photoresist thickness attenuation of half exposure area forms photoresist half reserve area.Leak metallic film, doping semiconductor layer and semiconductor layer by the source that the first time, etching technics etched away complete exposure area fully, form data line 13, source electrode 6 and drain electrode 7 figures.By cineration technics, remove the photoresist of half exposure area, expose this regional source and leak metallic film.Leak metallic film and doping semiconductor layer 5 by the source that the second time, etching technics etched away half exposure area fully, and etch away the semiconductor layer 4 of segment thickness, expose semiconductor layer 4, form TFT channel region figure.Peel off remaining photoresist at last, finish TFT-LCD array base palte of the present invention composition technology for the second time.After this composition technology, grid line 11 and data line 13 define pixel region, data line 13 is between two shield bars 12, one end of source electrode 6 is positioned at gate electrode 2 tops, the other end is connected with data line 13, and an end of drain electrode 7 is positioned at gate electrode 2 tops, is oppositely arranged with source electrode 6, the doping semiconductor layer 5 of TFT channel region is etched away fully between source electrode 6 and the drain electrode 7, exposes semiconductor layer 4.In addition, the below of data line 13, source electrode 6 and drain electrode 7 remains with doping semiconductor layer 5 and semiconductor layer 4.When the source was leaked metallic film and adopted the low metal of Cu constant resistance rate, because resistivity is low, the width of data line 13 can be controlled at about 5 μ m even be littler, thereby minimizes the stray capacitance that may occur.
Figure 10 is TFT-LCD array base palte of the present invention planimetric map after the composition technology for the third time, Figure 11 be among Figure 10 A4-A4 to sectional view, Figure 12 be among Figure 10 B4-B4 to sectional view.On the substrate of finishing the said structure figure, adopt PECVD method deposition one deck passivation layer 8.Passivation layer 8 can adopt oxide, nitride or oxynitrides.Adopt the normal masks plate that passivation layer is carried out composition, form passivation layer via hole 9, passivation layer via hole 9 is positioned at the top of drain electrode 7, as Figure 10~shown in Figure 12.In this composition technology, also be formed with the grid line interface via hole in grid line interface zone (grid line PAD) and the data line interface via hole figures of data line interface zone (data line PAD) simultaneously, the technology that forms grid line interface via hole and data line interface via pattern by composition technology has been widely used in repeating no more here in the present composition technology.
At last, on the substrate of finishing the said structure figure, adopt the method for magnetron sputtering or thermal evaporation, deposit transparent conductive film and shading metallic film successively, adopt half rank or gray-tone mask plate in pixel region, to form pixel electrode 14 figures by composition technology, form barrier bed 15 figures above data line 13, pixel electrode 14 is connected with drain electrode 7 by passivation layer via hole 9, as Fig. 1~shown in Figure 3.The 4th composition technology of the present invention is a kind of composition technology that adopts the multistep lithographic method, and technological process is described as follows.
Figure 13 for deposit transparent conductive film in the 4th composition technology of TFT-LCD array base palte of the present invention and shading metallic film after A1-A1 to sectional view, Figure 14 for deposit transparent conductive film in the 4th composition technology of TFT-LCD array base palte of the present invention and shading metallic film after B1-B1 to sectional view.On the substrate of finishing the said structure figure, adopt the method for magnetron sputtering or thermal evaporation, deposit transparent conductive film 21 and shading metallic film 22 successively, transparent conductive film 21 can adopt materials such as tin indium oxide (ITO), indium zinc oxide (IZO) or aluminum zinc oxide, also can adopt other metal and metal oxide, shading metallic film 22 can adopt metals such as Mo, Cr, Al, or light-proofness resin preferably, as Figure 13 and shown in Figure 14.
Figure 15 for exposure imaging in the 4th composition technology of TFT-LCD array base palte of the present invention after A1-A1 to sectional view, Figure 16 for exposure imaging in the 4th composition technology of TFT-LCD array base palte of the present invention after B1-B1 to sectional view.On shading metallic film 22, apply one deck photoresist 30, adopt the exposure of half rank or gray-tone mask plate, make photoresist form complete exposure area A, unexposed area B and half exposure area C.Unexposed area B is corresponding to barrier bed figure region, and half exposure area C is corresponding to pixel electrode figure region, and complete exposure area A is corresponding to the zone beyond the above-mentioned figure.After the development treatment, the photoresist thickness of unexposed area B does not change, form the complete reserve area of photoresist, the photoresist of complete exposure area A is removed fully, form photoresist and remove the zone fully, the photoresist thickness attenuation of half exposure area C forms photoresist half reserve area, as Figure 15 and shown in Figure 16.
Figure 17 in the 4th composition technology of TFT-LCD array base palte of the present invention for the first time behind the etching technics A1-A1 to sectional view, Figure 18 in the 4th composition technology of TFT-LCD array base palte of the present invention for the first time behind the etching technics B1-B1 to sectional view.By the first time etching technics etch away shading metallic film 22 and the transparent conductive film 21 of complete exposure area A fully, form the barrier bed figure, as Figure 17 and shown in Figure 180.In this wet method eating away technology, can adopt first etching liquid to etch away shading metallic film 22 earlier, adopt second etching liquid to etch away transparent conductive film 21 then, first etching liquid is carved the potpourri that can adopt nitric acid, acetate, phosphoric acid, and second etching liquid can adopt the potpourri of hydrochloric acid, acetate.The barrier bed figure that etching is finished is positioned at data line 13 tops.
Figure 19 for cineration technics in the 4th composition technology of TFT-LCD array base palte of the present invention after A1-A1 to sectional view, Figure 20 for cineration technics in the 4th composition technology of TFT-LCD array base palte of the present invention after B1-B1 to sectional view.By cineration technics, remove the photoresist of half exposure area C, expose this regional shading metallic film 22, as Figure 19 and shown in Figure 20.Because the thickness of unexposed area B photoresist is greater than the thickness of half exposure area C photoresist, so behind the cineration technics, unexposed area B still is coated with certain thickness photoresist.
Figure 21 in the 4th composition technology of TFT-LCD array base palte of the present invention for the second time behind the etching technics A1-A1 to sectional view, Figure 22 in the 4th composition technology of TFT-LCD array base palte of the present invention for the second time behind the etching technics B1-B1 to sectional view.By the second time etching technics etch away the shading metallic film of half exposure area C fully, expose the transparent conductive film of its below, form pixel electrode 14 figures, pixel electrode 14 is connected with drain electrode 7 by passivation layer via hole 9, as Figure 21 and shown in Figure 22.
Peel off remaining photoresist at last, finish the 4th composition technology of TFT-LCD array base palte of the present invention, as Fig. 1~shown in Figure 3.At this moment, barrier bed 15 belows remain with transparent conductive film, and promptly barrier bed and transparent conductive film are formed on the passivation layer 8.
Four composition technologies discussed above only are a kind of implementation methods of preparation TFT-LCD array base palte of the present invention, can also be by increasing or reduce composition technology number of times, selecting different material or combinations of materials to realize the present invention in actual the use.For example, TFT-LCD array base palte of the present invention composition technology for the second time can adopt the composition technology of normal masks plate to finish by two, promptly form active layer pattern, adopt the composition technology of normal masks plate to form data line, source electrode, drain electrode and TFT channel region figure by another time by the composition technology that once adopts the normal masks plate.And for example, the 4th composition technology of TFT-LCD array base palte of the present invention can adopt the composition technology of normal masks plate to finish by two, promptly form the pixel electrode figure by the composition technology that once adopts the normal masks plate, adopt the composition technology of normal masks plate to form the barrier bed figure by another time, repeat no more here.
Figure 23~Figure 26 is the synoptic diagram of another kind of the 4th the composition technology of TFT-LCD array base palte of the present invention, adopts liftoff peeling off (lift off) technology to form pixel electrode and barrier bed figure by a composition technology.Below only with B1-B1 among Fig. 1 to another kind of the 4th the composition technological process of sectional view simple declaration TFT-LCD array base palte of the present invention.
Figure 23 is the synoptic diagram behind the deposit transparent conductive film in another kind of the 4th the composition technology of TFT-LCD array base palte of the present invention.Finishing on the substrate of composition technology for the third time, adopt the method deposit transparent conductive film 21 of magnetron sputtering or thermal evaporation, as shown in figure 23.Transparent conductive film 21 can adopt materials such as tin indium oxide (ITO), indium zinc oxide (IZO) or aluminum zinc oxide, also can adopt other metal and metal oxide.
Figure 24 is the synoptic diagram behind the formation pixel electrode in another kind of the 4th the composition technology of TFT-LCD array base palte of the present invention.On transparent conductive film, apply one deck photoresist 30, adopt the exposure of normal masks plate, make photoresist form complete exposure area A and unexposed area B, unexposed area B is corresponding to pixel electrode figure region, and complete exposure area A is corresponding to the zone beyond the pixel electrode figure.After the development treatment, the photoresist thickness of unexposed area B does not change, and forms the complete reserve area of photoresist, and the photoresist of complete exposure area A is removed fully, forms photoresist and removes the zone fully.Etch away the transparent conductive film of complete exposure area A fully by etching technics, form pixel electrode 14 figures, as shown in figure 24.This etching technics is a wet etching, and etching liquid can adopt the potpourri of hydrochloric acid, acetate, and adopts the mode at quarter, etches away the transparent conductive film of photoresist fringe region below.
Figure 25 is the synoptic diagram behind the deposition shading metallic film in another kind of the 4th the composition technology of TFT-LCD array base palte of the present invention.Keep the
photoresist 30 on
pixel electrode 14 figures, adopt the method for magnetron sputtering or thermal evaporation, deposition one deck shading metallic film 22.Adopted the mode at quarter of crossing in the pixel electrode graphics art owing to form, therefore shading
metallic film 22 has been ruptured at the photoresist fringe region, as shown in figure 25.In the practical application, the thickness of shading metallic film is
In order to avoid blocked up shading metallic film is unfavorable for the stripping technology of back.
Figure 26 is the synoptic diagram behind the liftoff stripping technology in another kind of the 4th the composition technology of TFT-LCD array base palte of the present invention.Adopt liftoff stripping technology stripping photoresist, the shading metallic film on the stripping photoresist forms barrier bed 15 figures that are positioned at data line 13 tops, as shown in figure 26 simultaneously.In this technology, can heat or laser radiation, photoresist produce to be expanded or shrink, thereby the shading metallic film on it is ruptured photoresist, stripper contact lithograph glue easily like this, effect is peeled off in raising.At this moment, barrier bed 15 is formed directly on the passivation layer 8.
The invention provides a kind of TFT-LCD array base palte,, under the prerequisite that guarantees aperture opening ratio and display brightness, effectively solve the light leak defective by above data line, forming barrier bed.Because barrier bed of the present invention is arranged on the array base palte, therefore no matter be color membrane substrates and accurately contraposition of array base palte, still color membrane substrates or array base palte are subjected to external impacts, though the black matrix on the color membrane substrates lost efficacy at this moment, but barrier bed of the present invention can play the interception of black matrix, be not subjected to contraposition and shock effect, can stop the front light leak fully, effectively stop the side light leak.Further, adopt the solution that strengthens black matrix width to compare with prior art, because barrier bed of the present invention can effectively be eliminated the light leak that bit errors causes, therefore the present invention can reduce the width of black matrix on the color membrane substrates to greatest extent, even can replace black matrix on the color membrane substrates, improve aperture opening ratio and the display brightness of TFT-LCD effectively.In addition, the TFT-LCD array base palte that the present invention is formed with barrier bed still adopts existing process equipment and condition preparation, under the prerequisite that does not increase composition technology, has improved TFT-LCD performance and quality on the whole.
Though it is that example has illustrated technical solution of the present invention that foregoing is formed on the data line with barrier bed, in the practical application, barrier bed also can be formed on the grid line top, can be implemented in equally under the prerequisite that guarantees aperture opening ratio and display brightness, effectively solves the light leak defective.
Figure 27 is the process flow diagram of TFT-LCD manufacturing method of array base plate of the present invention, comprising:
Step 1, on substrate deposition grid metallic film, form the figure that comprises grid line and gate electrode by composition technology;
Step 2, on the substrate of completing steps 1, deposit gate insulation layer, semiconductor layer, doping semiconductor layer and metallic film is leaked in the source, form the figure that comprises data line, drain electrode, source electrode and TFT raceway groove by composition technology;
Step 3, on the substrate of completing steps 2 deposit passivation layer, form the figure comprise passivation layer via hole by composition technology, described passivation layer via hole is positioned at the top of drain electrode;
Step 4, on the substrate of completing steps 3 deposit transparent conductive film and shading metallic film, form the figure that comprises pixel electrode and barrier bed by composition technology, described pixel electrode is connected with drain electrode by passivation layer via hole, and described barrier bed is positioned at the top of data line.
The invention provides a kind of TFT-LCD manufacturing method of array base plate,, under the prerequisite that guarantees aperture opening ratio and display brightness, effectively solve the light leak defective by above data line, forming barrier bed.Because barrier bed of the present invention is arranged on the array base palte, therefore no matter be color membrane substrates and accurately contraposition of array base palte, still color membrane substrates or array base palte are subjected to external impacts, barrier bed all can play the interception of black matrix, be not subjected to contraposition and shock effect, stop the front light leak fully, effectively stop the side light leak.The TFT-LCD array base palte that the present invention is formed with barrier bed still adopts existing process equipment and condition preparation, under the prerequisite that does not increase composition technology, has improved TFT-LCD performance and quality on the whole.
Further specify the technical scheme of TFT-LCD manufacturing method of array base plate of the present invention below by specific embodiment.
Figure 28 is the process flow diagram of TFT-LCD manufacturing method of array base plate first embodiment of the present invention, and in technical scheme shown in Figure 27, described step 4 comprises:
Step 411, on the substrate of completing steps 3, adopt the method for magnetron sputtering or thermal evaporation, successively deposit transparent conductive film and shading metallic film;
Step 412, on described shading metallic film, apply one deck photoresist;
Step 413, employing half rank or the exposure of gray-tone mask plate, make the complete reserve area of photoresist formation photoresist, photoresist remove zone and photoresist half reserve area fully, the complete reserve area of photoresist is corresponding to barrier bed figure region, photoresist half reserve area is corresponding to pixel electrode figure region, and photoresist is removed the zone fully corresponding to the zone beyond the above-mentioned figure; After the development treatment, the photoresist thickness of the complete reserve area of photoresist does not change, and photoresist is removed the photoresist in zone fully and removed the photoresist thickness attenuation of photoresist half reserve area fully;
Step 414, by the first time etching technics etch away shading metallic film and the transparent conductive film that photoresist is removed the zone fully fully, form the barrier bed figure, described barrier bed is positioned at the top of data line;
Step 415, by cineration technics, remove the photoresist of photoresist half reserve area, expose this regional shading metallic film;
Step 416, by the second time etching technics etch away the shading metallic film of photoresist half reserve area fully, expose the transparent conductive film of its below, form the pixel electrode figure, pixel electrode is connected with drain electrode by passivation layer via hole;
Step 417, peel off remaining photoresist.
Present embodiment is that a kind of multistep lithographic method that adopts forms the technical scheme of pixel electrode and barrier bed figure simultaneously by composition technology, and its preparation process is introduced in aforementioned Figure 13~technical scheme shown in Figure 22 in detail, repeats no more here.
Figure 29 is the process flow diagram of TFT-LCD manufacturing method of array base plate second embodiment of the present invention, and in technical scheme shown in Figure 27, described step 4 comprises:
Step 421, on the substrate of completing steps 3, adopt the method for magnetron sputtering or thermal evaporation, the deposit transparent conductive film;
Step 422, on described transparent conductive film, apply one deck photoresist;
Step 423, the exposure of employing normal masks plate, make photoresist formation complete reserve area of photoresist and photoresist remove the zone fully, the complete reserve area of photoresist is corresponding to the pixel electrode region, and photoresist is removed the zone fully corresponding to the zone beyond the pixel electrode figure; After the development treatment, the photoresist thickness of the complete reserve area of photoresist does not change, and photoresist is removed the photoresist in zone fully and removed fully;
Step 424, etch away the transparent conductive film that photoresist is removed the zone fully fully by etching technics, form the pixel electrode figure, pixel electrode is connected with drain electrode by passivation layer via hole;
Step 425, remain with on the substrate of photoresist forming on pixel electrode and the pixel electrode, adopt the method for magnetron sputtering or thermal evaporation, deposition shading metallic film, described shading metallic film ruptures at the photoresist fringe region;
Step 426, the liftoff stripping technology stripping photoresist of employing, the shading metallic film on the stripping photoresist forms the barrier bed figure simultaneously, and described barrier bed figure is positioned at the top of data line.
Present embodiment is a kind ofly to adopt liftoff stripping technology to form the technical scheme of pixel electrode and barrier bed figure simultaneously by composition technology, and its preparation process is introduced in aforementioned Figure 23~technical scheme shown in Figure 26 in detail, repeats no more here.In the present embodiment, etching technics is a wet etching, and etching liquid can adopt the potpourri of hydrochloric acid, acetate, and adopts the mode at quarter, etches away the transparent conductive film of photoresist fringe region below.In addition, the thickness of shading metallic film is
In order to avoid blocked up shading metallic film is unfavorable for the stripping technology of back.
In the step 1 of the present invention, adopt the method for magnetron sputtering or thermal evaporation, go up deposition one deck grid metallic film at substrate (as glass substrate or quartz base plate), the grid metallic film can adopt metals such as Mo, Al, also can adopt the laminated film (as the Mo/Al/Mo laminated film) that is made of the multiple layer metal film.Adopt the normal masks plate that the grid metallic film is carried out composition, formation comprises gate electrode and grid line figure on substrate.Also can form the figure of shield bars in this composition technology simultaneously, and the edge of barrier bed both sides is positioned at the zone that shield bars blocks.In the practical application, also can form the public electrode line graph simultaneously in this composition technology, form memory capacitance structure of (Cs on Common) on public electrode wire.
In the step 2 of the present invention, on the substrate of finishing the said structure figure, at first adopt the PECVD method, deposit gate insulation layer, semiconductor layer and doping semiconductor layer successively, adopt the method for magnetron sputtering or thermal evaporation then, metallic film is leaked in deposition one deck source.Gate insulation layer can adopt oxide, nitride or oxynitrides, metallic film is leaked in the source can adopt metals such as Mo, Al, or adopt the low metal of Cu constant resistance rate, also can adopt the laminated film (as the Mo/Al/Mo laminated film) that constitutes by the multiple layer metal film.Adopt half rank or gray-tone mask plate to form data line, source electrode, drain electrode and TFT channel region figure by composition technology.This composition technology is a kind of composition technology that adopts the multistep lithographic method, and is identical with the process that forms data line, source electrode, drain electrode and TFT channel region figure in existing four composition technologies.
In the step 3 of the present invention, on the substrate of finishing the said structure figure, adopt PECVD method deposit thickness one deck passivation layer, passivation layer can adopt oxide, nitride or oxynitrides.Adopt the normal masks plate that passivation layer is carried out composition, form passivation layer via hole, passivation layer via hole is positioned at the top of drain electrode.In this composition technology, also be formed with grid line interface via hole and data line interface via hole figures simultaneously.
It should be noted that at last: above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although the present invention is had been described in detail with reference to preferred embodiment, those of ordinary skill in the art is to be understood that, can make amendment or be equal to replacement technical scheme of the present invention, and not break away from the spirit and scope of technical solution of the present invention.