CN101803012B - 在集成电路小片和印刷电路板之间形成低型面线结合部的方法 - Google Patents
在集成电路小片和印刷电路板之间形成低型面线结合部的方法 Download PDFInfo
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- CN101803012B CN101803012B CN2008801078701A CN200880107870A CN101803012B CN 101803012 B CN101803012 B CN 101803012B CN 2008801078701 A CN2008801078701 A CN 2008801078701A CN 200880107870 A CN200880107870 A CN 200880107870A CN 101803012 B CN101803012 B CN 101803012B
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- wire
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- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Particle Formation And Scattering Control In Inkjet Printers (AREA)
- Peptides Or Proteins (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Wire Bonding (AREA)
Abstract
Description
Claims (9)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/860,539 US7988033B2 (en) | 2007-09-25 | 2007-09-25 | Method of reducing wire bond profile height in integrated circuits mounted to circuit boards |
US11/860,539 | 2007-09-25 | ||
PCT/AU2008/000333 WO2009039554A1 (en) | 2007-09-25 | 2008-03-12 | Method of forming low profile wire bonds between integrated circuits dies and printed circuit boards |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101803012A CN101803012A (zh) | 2010-08-11 |
CN101803012B true CN101803012B (zh) | 2012-05-30 |
Family
ID=40472105
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2008801078701A Expired - Fee Related CN101803012B (zh) | 2007-09-25 | 2008-03-12 | 在集成电路小片和印刷电路板之间形成低型面线结合部的方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7988033B2 (zh) |
CN (1) | CN101803012B (zh) |
TW (1) | TWI435673B (zh) |
WO (1) | WO2009039554A1 (zh) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8233279B2 (en) * | 2010-11-04 | 2012-07-31 | Ge Intelligent Platforms, Inc. | Wedge lock for use with a single board computer and method of assembling a computer system |
JP7129304B2 (ja) * | 2018-10-03 | 2022-09-01 | Toyo Tire株式会社 | タイヤ |
US11546991B2 (en) | 2020-03-11 | 2023-01-03 | Peter C. Salmon | Densely packed electronic systems |
US10966338B1 (en) | 2020-03-11 | 2021-03-30 | Peter C. Salmon | Densely packed electronic systems |
US11393807B2 (en) | 2020-03-11 | 2022-07-19 | Peter C. Salmon | Densely packed electronic systems |
US11523543B1 (en) | 2022-02-25 | 2022-12-06 | Peter C. Salmon | Water cooled server |
US11445640B1 (en) | 2022-02-25 | 2022-09-13 | Peter C. Salmon | Water cooled server |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4595938A (en) * | 1983-06-10 | 1986-06-17 | Ing. C. Olivetti & C., S.P.A. | Ink jet print head |
US5863488A (en) * | 1995-09-22 | 1999-01-26 | Japan Gore-Tex Inc. | Molded article of liquid crystal polymer |
US6291884B1 (en) * | 1999-11-09 | 2001-09-18 | Amkor Technology, Inc. | Chip-size semiconductor packages |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5468999A (en) * | 1994-05-26 | 1995-11-21 | Motorola, Inc. | Liquid encapsulated ball grid array semiconductor device with fine pitch wire bonding |
US5577319A (en) * | 1995-03-31 | 1996-11-26 | Motorola, Inc. | Method of encapsulating a crystal oscillator |
US5962810A (en) * | 1997-09-09 | 1999-10-05 | Amkor Technology, Inc. | Integrated circuit package employing a transparent encapsulant |
US6022583A (en) * | 1997-12-16 | 2000-02-08 | Nordson Corporation | Method of encapsulating a wire bonded die |
US6329709B1 (en) * | 1998-05-11 | 2001-12-11 | Micron Technology, Inc. | Interconnections for a semiconductor device |
TW434850B (en) * | 1998-12-31 | 2001-05-16 | World Wiser Electronics Inc | Packaging equipment and method for integrated circuit |
US6274927B1 (en) * | 1999-06-03 | 2001-08-14 | Amkor Technology, Inc. | Plastic package for an optical integrated circuit device and method of making |
CN1525910A (zh) | 2001-07-09 | 2004-09-01 | 诺德森公司 | 真空辅助底部填充电子元件的方法及装置 |
US20030160311A1 (en) * | 2002-02-28 | 2003-08-28 | Aminuddin Ismail | Stacked die semiconductor device |
US6885093B2 (en) * | 2002-02-28 | 2005-04-26 | Freescale Semiconductor, Inc. | Stacked die semiconductor device |
US20040241906A1 (en) * | 2003-05-28 | 2004-12-02 | Vincent Chan | Integrated circuit package and method for making same that employs under bump metalization layer |
US7475802B2 (en) * | 2004-04-28 | 2009-01-13 | Texas Instruments Incorporated | Method for low loop wire bonding |
US7091581B1 (en) * | 2004-06-14 | 2006-08-15 | Asat Limited | Integrated circuit package and process for fabricating the same |
US7745944B2 (en) * | 2005-08-31 | 2010-06-29 | Micron Technology, Inc. | Microelectronic devices having intermediate contacts for connection to interposer substrates, and associated methods of packaging microelectronic devices with intermediate contacts |
US20070273023A1 (en) * | 2006-05-26 | 2007-11-29 | Broadcom Corporation | Integrated circuit package having exposed thermally conducting body |
US20080237887A1 (en) * | 2007-03-29 | 2008-10-02 | Hem Takiar | Semiconductor die stack having heightened contact for wire bond |
US20090032926A1 (en) * | 2007-07-31 | 2009-02-05 | Advanced Micro Devices, Inc. | Integrated Support Structure for Stacked Semiconductors With Overhang |
-
2007
- 2007-09-25 US US11/860,539 patent/US7988033B2/en not_active Expired - Fee Related
-
2008
- 2008-03-12 WO PCT/AU2008/000333 patent/WO2009039554A1/en active Application Filing
- 2008-03-12 CN CN2008801078701A patent/CN101803012B/zh not_active Expired - Fee Related
- 2008-09-25 TW TW097136901A patent/TWI435673B/zh active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4595938A (en) * | 1983-06-10 | 1986-06-17 | Ing. C. Olivetti & C., S.P.A. | Ink jet print head |
US5863488A (en) * | 1995-09-22 | 1999-01-26 | Japan Gore-Tex Inc. | Molded article of liquid crystal polymer |
US6291884B1 (en) * | 1999-11-09 | 2001-09-18 | Amkor Technology, Inc. | Chip-size semiconductor packages |
Also Published As
Publication number | Publication date |
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CN101803012A (zh) | 2010-08-11 |
WO2009039554A1 (en) | 2009-04-02 |
TWI435673B (zh) | 2014-04-21 |
US7988033B2 (en) | 2011-08-02 |
US20090081832A1 (en) | 2009-03-26 |
TW200938031A (en) | 2009-09-01 |
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