CN101794264A - Interface signal design method of image sensor used for wireless terminal - Google Patents
Interface signal design method of image sensor used for wireless terminal Download PDFInfo
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- CN101794264A CN101794264A CN201010119413A CN201010119413A CN101794264A CN 101794264 A CN101794264 A CN 101794264A CN 201010119413 A CN201010119413 A CN 201010119413A CN 201010119413 A CN201010119413 A CN 201010119413A CN 101794264 A CN101794264 A CN 101794264A
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Abstract
The invention relates to an interface signal design method of an image sensor used for a wireless terminal. An interface signal of the image sensor comprises a main clock, frame synchronization and a serial command bus and an image data output bus. The invention is characterized in that the interface signal of the image sensor also comprises a chip selection/reading input signal, the image data output bus is connected on the data bus of the wireless terminal, the chip selection/reading input signal is generated by an address decoding circuit, further, a line buffer memory is arranged inside the image sensor, the interface signal of the image sensor also comprises a buffer ready output signal, preferably, the line buffer memory and a memory arranged in an internal DSP of the image sensor are in multiplex use, and more further, an index used for indicating the positions of each line of data of the current buffer region in the image is arranged in the line buffer memory. The invention can reduce the system cost and the system complicity, and in addition, the interface structure is simple.
Description
Technical field
The invention belongs to the image sensor technologies field, be specifically related on wireless handheld terminal, connect the method for designing of cmos image sensor.
Background technology
Imageing sensor (being commonly called as camera) mainly is divided into two classes according to principle of work and manufacturing process: ccd image sensor and cmos image sensor.Because power consumption and cost advantage are very obvious, so the application of cmos image sensor (hereinafter to be referred as CIS:CMOS Image Sensor) in embedded system increases sharply, CIS has substantially become standard configuration on wireless handheld terminal.
Except power supply, clock, signal such as synchronous connected, current CIS and the master controller in the system (hereinafter to be referred as MCU) communicated to connect and mainly contain following two parts interface:
(1) I2C bus interface: be used for the control register/status register of CIS inside is provided with and reads.
(2) image data interface: be used to export the view data that CIS collects.
The image data interface of current standard in the industry comprises following signal: the 1. data line Y0-Y7 of 8 bit widths; 2. pixel clock PCLK.PCLK is driven by CIS, and each PCLK exports the view data of a byte on Y0-Y7.
Above-mentioned designing requirement needs receiving end to have the interface of coupling to connect the image data interface of CIS, to receive the view data that CIS transmits.
The prior art scheme mainly contains following several:
(1) ISP of built-in special use (Image Sensor Processor: image processor)
A lot of MCU are built-in, and special-purpose ISP is used for connecting CIS.The shortcoming of this scheme is the cost height, and advantage is the performance height, and development difficulty is low.
(2) increase special-purpose coprocessor
Have a large amount of low side MCU not have built-in ISP, and equally also there is the demand that connects CIS in the system that uses these low sides MCU, has to increase extra coprocessor for this reason and connect CIS in such system, has so just increased the complexity and the cost of system.Usually the system that uses low side MCU exactly all be to cost and the construction cycle highstrung system, so existing C IS data-interface just becomes a contradiction focus how supporting CIS on low side MCU.
Summary of the invention
Technology of the present invention is dealt with problems and is: overcome the deficiencies in the prior art, a kind of interface signal design method that is used for the imageing sensor of wireless terminal is provided.
Technical solution of the present invention is: the interface signal design method that is used for the imageing sensor of wireless terminal, the interface signal of described imageing sensor comprises major clock, frame synchronization, serial order bus and view data output bus, it is characterized in that, the interface signal of described imageing sensor comprises that also sheet selects/read input signal, and described view data output bus is connected on the data bus of wireless terminal master controller.
Described is selected/reads signal to be produced by address decoding circuitry.The preferred I2C bus of described serial order bus.
Further, described imageing sensor inside is provided with line buffer memory, and the interface signal of described imageing sensor also comprises the ready output signal of buffering.
Preferably, the storer among the inner DSP of the line buffer memory of described imageing sensor inside and described imageing sensor is multiplexing.
Again further, be provided with the index that is used to refer to the position of each row of data in image in the current buffer zone in the described line buffer memory, the width range of this index is 1～16 byte.
Described imageing sensor is a cmos image sensor.
The present invention compared with prior art has following advantage:
(1) the present invention has defined a kind of brand-new connecting interface, substantially do not increasing on the data bus (hereinafter to be referred as EMI:External MemoryInterface external memory interface) that CIS can be connected to MCU under the CIS condition of cost, because data bus is the basic interface that all MCU possess, do not connect CIS so just can on end systems, not increase extra cost, can guarantee the performance of CIS simultaneously by the cooperation of software.
(2) contrast of the present invention and prior art scheme is as shown in the table
| Scheme | Cost | Performance | Development difficulty |
| (1) the built-in ISP of MCU | High | High | Low |
| (2) the external coprocessor of MCU | Medium | Medium | Medium |
| The present invention: EMI expands CIS | Low | Medium | Medium |
As seen from the above table, the present invention realizes medium-performance with minimum cost, becomes the implementation of tool cost performance in the low-end platform.
(3) method for designing of the present invention makes the complexity of system reduce, and interface structure is simple.
(4) the present invention promptly increases sheet and selects/read input signal by changing the CIS data-interface into the EMI interface, makes CIS become passive output data from the active output data.That is to say that CIS only selects the data of just exporting a byte effective the time at sheet, sheet select invalid in view data D[7:0] keep high-impedance state.Make the image data bus behavior of CIS meet the requirement of MCU data bus interface like this, can directly dock, thereby save the cost of special purpose interface part and keep higher performance.
(5) in order to guarantee the efficient of EMI bus reads image data, CIS of the present invention inside has row buffering mechanism, and promptly at the inner line buffer memory that increases of CIS, the corresponding increase of the interface of CIS cushions ready output signal.
(6) in order to guarantee that MCU intactly reads all data under regular situation, and MCU can (burst such as radio protocol stack is handled) discern the loss of data that the timely reading of data of failing causes under extreme case, the present invention also is provided with the index that is used to refer to the position of each row of data in image in the current buffer zone in line buffer memory, line index is sent in every row beginning at first.
Description of drawings
Below with reference to accompanying drawing the specific embodiment of the present invention is described.
Fig. 1 is that imageing sensor is connected block diagram with the interface of master controller in the prior art.
Fig. 2 is that imageing sensor is connected block diagram with the interface of master controller among the present invention.
Fig. 3 is the realization block diagram of imageing sensor in the prior art.
Fig. 4 is the realization block diagram of imageing sensor among the present invention.
Embodiment
Be connected with the interface of master controller about imageing sensor, the contrast of the present invention and prior art as shown in Figure 1, 2.Data-interface D[7:0 among the figure] pixel data of output image sensor.
By the contrast of two figure as can be seen: (1) the present invention changes the CIS data-interface into EMI interface (the EM I interface general reference external memory interface here), makes CIS become passive output data from the active output data.Specifically, CIS increases sheet and selects/read (CS/RD) input signal, and the CS/RD signal is produced by address decoding circuitry; The data-out bus D[7:0 of while CIS] be connected on the data bus of master controller.(2) CIS inside is provided with row buffering and line index.
Address decoding circuitry is connected on the address bus and control bus of master controller among Fig. 2, and the master controller here is the master controller of wireless terminal.Address decoding circuitry also can be built in CIS inside, or other circuit structure.
Realize about the interface of imageing sensor, the present invention and prior art to such as shown in Fig. 3,4.
In the prior art of Fig. 3, PCLK is the output of pixel data clock.The PCLK signal is the CIS output signal, is used to indicate D[7:0] output image data, CIS is initiatively outwards continuous output data.Such behavior causes CIS can't be operated on the EMI bus, because connected a lot of devices on the bus, this active output of CIS can destroy the work of other equipment on the bus.
In Fig. 4, CIS of the present invention increases sheet and selects/read (CS/RD) input signal, and the CS/RD signal is produced by the external address decoding scheme.CIS only just exports the data of a byte when this signal is effective, sheet select invalid in view data D[7:0] keep high-impedance state.Such behavior meets the requirement of EMI bus, can coexist with other bus apparatus.
Increase the packaging cost raising that pin brings for reducing, the present invention preferably changes to input signal CS/RD with PCLK pin of the prior art, thereby keeps the number of pins sum constant.
Further, in order to guarantee the efficient of EMI bus reads image data, CIS of the present invention inside has row buffering mechanism, and promptly at the inner line buffer memory that increases of CIS, the corresponding increase of the interface of CIS cushions ready output signal.Line buffer memory can hold delegation or the multirow pixel data in the two field picture.It is ready that the buffering ready signal is used to refer to the internal rows memory buffer, and MCU can reading of data.
Increase the packaging cost raising that pin brings for reducing, the present invention preferably changes to the buffering ready transport indicator with line synchronizing signal of the prior art, thereby keeps the number of pins sum constant.
Each CS/RD signal is effectively sent a byte, in order to guarantee that MCU intactly reads all data under regular situation, and MCU can (burst such as radio protocol stack is handled) discern the loss of data that the timely reading of data of failing causes under extreme case, the present invention also is provided with the index that is used to refer to the position of each row of data in image in the current buffer zone in line buffer memory, line index is sent in every row beginning at first.
Index embodies the position of each row of data in image, can add up continuously, overflows the back zero clearing, also can be designed as every frame and makes zero at first, adds up after each row of data is ready.
The width range of index is looked line buffer memory space situation and be can be designed as 0 byte (no index) to 16 bytes.Preferable width is 2 bytes, and this moment can index 300,000 and above pixel (the imaging line number surpasses 255 row).
In order to reduce the CIS cost, the BUFFER of DSP in the multiplexing CIS of line buffer memory.Storer among Fig. 4 promptly is BUFFER multiplexing of line buffer memory and DSP.
Memory bus interface design of the present invention can make MCU link CIS under the situation that does not increase special purpose interface, and the access speed of EMI bus is higher simultaneously, can fetch view data at high speed, thereby effectively promote the serviceability of CIS.The row buffering of CIS indoor design and index can guarantee that MCU intactly reads all data under the regular situation, and simultaneously can the recognition image data under extreme case lose and guarantees to offer user's picture quality by software interpolation scheduling algorithm.
The above; it only is preferred embodiment of the present invention; be not that the present invention is done any pro forma restriction, every foundation technical spirit of the present invention all still belongs to the protection domain of technical solution of the present invention to any simple modification, equivalent variations and modification that above embodiment did.
Claims (8)
1. the interface signal design method that is used for the imageing sensor of wireless terminal, the interface signal of described imageing sensor comprises major clock, frame synchronization, serial order bus and view data output bus, it is characterized in that: the interface signal of described imageing sensor comprises that also sheet selects/read input signal, and described view data output bus is connected on the data bus of wireless terminal master controller.
2. the interface signal design method that is used for the imageing sensor of wireless terminal according to claim 1 is characterized in that: described imageing sensor inside is provided with line buffer memory, and the interface signal of described imageing sensor also comprises the ready output signal of buffering.
3. the interface signal design method that is used for the imageing sensor of wireless terminal according to claim 2 is characterized in that: the storer among the inner DSP of the line buffer memory of described imageing sensor inside and described imageing sensor is multiplexing.
4. according to claim 2 or the 3 described interface signal design methods that are used for the imageing sensor of wireless terminal, it is characterized in that: be provided with the index that is used to refer to the position of each row of data in image in the current buffer zone in the described line buffer memory, the width range of this index is 1～16 byte.
5. the interface signal design method that is used for the imageing sensor of wireless terminal according to claim 4 is characterized in that: the width range of this index is 2 bytes.
6. according to claim 1 or the 2 or 3 described interface signal design methods that are used for the imageing sensor of wireless terminal, it is characterized in that: described imageing sensor is a cmos image sensor.
7. according to claim 1 or the 2 or 3 described interface signal design methods that are used for the imageing sensor of wireless terminal, it is characterized in that: described is selected/reads signal to be produced by address decoding circuitry.
8. according to claim 1 or the 2 or 3 described interface signal design methods that are used for the imageing sensor of wireless terminal, it is characterized in that: described serial order bus is the I2C bus.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4916642A (en) * | 1981-07-31 | 1990-04-10 | O-Com, Inc. | Environmental control with multiple zone central processor means |
| CN2539984Y (en) * | 2002-03-28 | 2003-03-12 | 深圳职业技术学院 | Numerical control processing real-time monitor |
| CN2845007Y (en) * | 2005-07-11 | 2006-12-06 | 中国水利水电科学研究院 | High speed data collecting card |
| CN101292279A (en) * | 2005-10-14 | 2008-10-22 | 三星电子株式会社 | Improved memory structures for image processing |
| CN201191888Y (en) * | 2008-04-15 | 2009-02-04 | 北京思比科微电子技术有限公司 | Image transmission device |
-
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- 2010-03-08 CN CN201010119413A patent/CN101794264A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4916642A (en) * | 1981-07-31 | 1990-04-10 | O-Com, Inc. | Environmental control with multiple zone central processor means |
| CN2539984Y (en) * | 2002-03-28 | 2003-03-12 | 深圳职业技术学院 | Numerical control processing real-time monitor |
| CN2845007Y (en) * | 2005-07-11 | 2006-12-06 | 中国水利水电科学研究院 | High speed data collecting card |
| CN101292279A (en) * | 2005-10-14 | 2008-10-22 | 三星电子株式会社 | Improved memory structures for image processing |
| CN201191888Y (en) * | 2008-04-15 | 2009-02-04 | 北京思比科微电子技术有限公司 | Image transmission device |
Non-Patent Citations (1)
| Title |
|---|
| 《半导体技术》 20041031 黄全平等 基于I2C总线的CMOS图像传感器接口电路设计 第29卷, 第10期 2 * |
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