CN101780436A - Digital signal processor (DSP) embedded controller for electric dust-removing three-phase high-voltage direct-current power supply - Google Patents
Digital signal processor (DSP) embedded controller for electric dust-removing three-phase high-voltage direct-current power supply Download PDFInfo
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Abstract
The invention relates to a digital signal processor (DSP) embedded controller for an electric dust-removing three-phase high-voltage direct-current power supply, comprising a hardware system and a software system. The DSP embedded controller is characterized in that the hardware system comprises a control core unit of a DSP, a synchronizing signal circuit, a trigger pulse circuit, a digital quantity output circuit, a digital quantity input circuit, an analog quantity collecting circuit, a communication connector, a man-machine display, an operative keyboard, a power supply module and an photoelectric isolator; and the software system is started to normally run by electric resetting or keyboard resetting on the system, and then a software interrupting module, a hardware interrupting module and a task module in the control software are managed and controlled by a DSP/basic input/output system (BIOS) operating system after the software system is initialized. The invention solves the problems existing in the three-phase thyristor voltage-regulating high-voltage direct-current power supply for electric dust removal and increases the reliability of the system, and can improve the effect of electric dust removal after integrally optimizing an electric dust removing system, thereby achieving the requirement of environmental protection.
Description
Technical field
The present invention is a kind of embedded Control management system that is used for electric precipitation, be specifically related to a kind of digital signal processor (DSP) embedded controller for electric dust-removing three-phase high-voltage direct-current power supply, it is based on three-phase thyristor Regulation Control high-voltage DC power supply, optimize secondary high-pressure output, optimize rapping output, monitoring deduster real-time working state is the electric precipitation control and management, reaches the most crucial parts of dedusting environment friendly requirement.
Background technology
Electric precipitation has advantages such as power supply balance, utilization rate of electrical height, the big ripple coefficient of secondary power output are little with three-phase thyristor pressure regulation high-voltage DC power supply, be a kind of power supply that can effectively improve efficiency of dust collection, can be used for the upgrading of the existing two-phase electric dust-removing power supply of the overwhelming majority.Simultaneously it also has secondary side flashover strength of discharge height, energy big, produces strong double sampling interfering signal; Primary side has also produced many higher hamonic waves in three-phase thyristor amplitude modulation process, make power source voltage waveform generation disadvantage of distorted.Existing controller is based on the simple feedback control of the single electric field signal of electric precipitation, is difficult to satisfy the increasingly stringent environmental requirement.Existing controller is connected with the host computer management system, adopts nonstandard self-defined communications protocol, realizes the configuration complexity, and difficulty is big.The control core adopts singlechip chip, the disposal ability of single-chip microcomputer, speed a little less than, digital quantity IO and analog channel interface are few, the ubiquity complex structure, the problem that causes poor anti jamming capability, poor reliability, poor expandability, be subjected to the restriction of single-chip microcomputer disposal ability, be difficult to realize the global optimization of electric dust removing system.So, need to adopt new control system, solved the existing problems of electric precipitation with three-phase thyristor pressure regulation high-voltage DC power supply, increase the control system reliability, add the global optimization of electric dust removing system, just can make and improve the electric precipitation effect, reach environmental requirement.
Summary of the invention
In order to overcome above-mentioned defective, the invention provides a kind of digital signal processor (DSP) embedded controller for electric dust-removing three-phase high-voltage direct-current power supply.
To achieve these goals, the present invention adopts following technical scheme:
Digital signal processor (DSP) embedded controller for electric dust-removing three-phase high-voltage direct-current power supply is made up of hardware system and software systems.Hardware system designs by modularization, and the control core cell is based on the DSP2812 chip, does not have expansion, and single-chip is finished analog quantity, digital quantity, communication function, has greatly reduced the peripheral expansion circuit, has reduced the complexity of system, has improved the reliability of system.Control core cell DSP2812, clock frequency can reach 150MHZ, has disposal ability at a high speed, and the ability of the real-time acquisition process data of system is greatly improved, and accuracy, the reliability of system's control improve.Software systems, the programming of employing C Plus Plus, by function program code is divided into several program modules, software kernels is based on the DSP/BIOS operating system of DSP2812 control chip, DSP/BIOS operating system is finished the management of dispatching between software interrupt service routine, hardware interrupts service routine, different task and the initialization of internal hardware module, after adopting DSP/BIOS operating system, software systems each several part functional module structure clear, soft, hard interruption simultaneously, task management complexity greatly reduce, and the stability of a system of software strengthens.Power module in the hardware system for each functional module of embedded controller provides the power supply that works alone, improves system's antijamming capability.Hardware system peripheral interface circuit and the scheme that all adopts photoelectricity to isolate being connected of DSP key control unit, stopped the interference of peripheral interface fully to the DSP key control unit, when particularly secondary side high pressure flashover discharges, secondary analog acquisition circuit is isolated fully to the impact of DSP key control unit, and system's antijamming capability obtains greatly to improve.The liquid crystal display software interrupt of the man-machine display of hardware system, operation keyboard and software systems, keyboard scan software interrupt realize the human interface function, adopt industrial wide temperature range type 320X240 liquid crystal display, can conveniently check real time execution parameter, setup parameter, check real time execution curve waveform, history curve waveform, the convenient electric precipitation ruuning situation of analyzing; The digital quantity input of hardware system, digital quantity output and digital quantity I/O software interrupt are finished outside input digit amount and are gathered and digital quantity output control; The analog acquisition circuit of hardware system and the analog acquisition hardware interrupts of software systems are finished the collection of external analog amount feedback signal, system becomes oil temperature, flue gas turbidity, boiler load feedback signal according to the three-phase alternating current input voltage of gathering in real time, three-phase alternating current input current, secondary voltage, secondary current, rectification, regulate the angle of flow of three-phase thyristor, regulate output, realize the little closed-loop control of separate unit controller.Synchronous signal circuit, trigger impulse circuit and synchronizing signal hardware interrupts are finished the three-phase thyristor Regulation Control, and synchronizing signal provides the isolation conversion output of finishing three-phase thyristor fiducial time, trigger impulse circuit controller pulse signal control.Communication interface circuit and communication interface hardware interrupt realizing the communication function of controller, and the COM1 communication port is supported the MODBUS communications protocol, realize at a distance with upper machine communication be connected.The COM2 communication port is realized the data sharing of each controller in the passage, realizes big closed loop feedback control.The initialization of control parameter of program and the configuration of dsp chip specific function are finished in the initialization of software systems.The exception management of software systems when software anomaly, produces the watchdog reset signal, makes software restart operation.
The major function that hardware components of the present invention is realized:
1, three-phase A, B, C three tunnel two-stage photoelectricity are isolated synchronizing signal,
2, six tunnel two-stage photoelectricity of complete separate band LED indication are isolated IGCT amplitude-modulated pulse signal,
3,8 road photoelectricity isolation strip LED indicator cock digital quantity state input letter points,
4, seven road photoelectricity isolation strip LED indication adds relay isolation passive contact switch digital quantity output point,
5, band LED communication indication photoelectricity is isolated the R485 communication interface,
6, band LED communication indication photoelectricity is isolated the R422 communication interface,
7, photoelectricity is isolated three-phase alternating current input voltage analog measurement,
8, photoelectricity is isolated three-phase alternating current input current analog measurement,
9, photoelectricity isolating transformer secondary DC analogue quantity is measured,
10, the warm analog measurement of photoelectricity isolating transformer oil,
11, photoelectricity is isolated the 4-20mA analog measurement,
12,320X240 liquid crystal display man-machine display interface,
13, machine operation keyboard.
Software systems have extremely simple structure, the normal operation startup of software systems is brought into operation by system power-on reset or keyboard clearance, through transferring to DSP/BIOS operating system management control software interrupt module, hardware interrupts module, task module after the initialization.When software anomaly, produce the watchdog reset signal, make software restart operation.
Software systems of the present invention are mainly finished function:
1, based on the three-phase thyristor trigger impulse outgoing management program of sync break, can make the electric precipitation electric field be in best operating point according to the output of feedback signal quick adjustment electric precipitation secondary.
2,, be convenient to the connection of user's master system based on the slave station function of R485MODBUS communications protocol.
3,, realize the electric Field Optimization management in the electric precipitation passage based on the master function of R485MODBUS communications protocol.
4, liquid crystal display adopts human oriented design, provides text parameter to show and the demonstration of graph curve display text, and real time dynamic tracing shows electric precipitation secondary current curve, secondary voltage curve, secondary volt-ampere curve and log history operation curve.
5, Hommization keyboard scanning and handling procedure, liquid crystal shows current keyboard state in real time, the prompt position.
6, improve the error protection handling procedure.
7, have the setup parameter outage and preserve memory function.
The invention solves the existing problems of electric precipitation, increase the control system reliability, add the global optimization of electric dust removing system, just can make and improve the electric precipitation effect, reach environmental requirement with three-phase thyristor pressure regulation high-voltage DC power supply.
Description of drawings
Fig. 1: hardware system block diagram;
Fig. 2: three-phase synchronous signal circuit;
Fig. 3: three-phase pulse signal circuit;
Fig. 4: digital quantity input switching circuit;
Fig. 5: digital quantity output switch circuit;
Fig. 6: analog quantity two light-coupled isolation linear amplifiers;
Fig. 7: transformer input three-phase alternating voltage Acquisition Circuit;
Fig. 8: transformer input three-phase alternating current Acquisition Circuit;
Fig. 9: transformer output secondary voltage current acquisition circuit;
Figure 10: temperature of oil in transformer observation circuit;
Figure 11: 4-20mA analog acquisition circuit;
Figure 12: communication interface circuit;
Figure 13: man-machine interface operation keyboard interface circuit;
Figure 14: man-machine display interface circuit;
Figure 15: DSP controls core cell;
Figure 16: DSP control core power supply;
Figure 17: the external interface circuit power supply is seen figure;
Figure 18: lock-out pulse and circuits for triggering power supply;
Figure 19: software systems figure;
Figure 20: software main-process stream;
Figure 21: initialization flow process;
Figure 22: read the operational factor of preserving in the EEPROM;
Figure 23: the parameter calendar software is interrupted;
Figure 24: digital quantity I/O keyboard scan software interrupt;
Figure 25: digital quantity output point control output;
Figure 26: error protection process chart;
Figure 27: liquid crystal display software interrupt;
Figure 28: host function communication management software interrupt;
Figure 29: serial ports COM2 sends interruption;
Figure 30: serial ports COM2 receives interruption, serial ports COM2 communication is regularly interrupted;
Figure 31: the COM1 communication interface interrupts;
Figure 32: DI11 sync break;
Figure 33: DI12 sync break;
Figure 34: DI13 sync break;
Figure 35: analog acquisition hardware interrupts;
The specific embodiment
The present invention is further described below in conjunction with accompanying drawing:
Hardware system
Hardware system is seen shown in Figure 1: the hardware system of digital signal processor (DSP) embedded controller for electric dust-removing three-phase high-voltage direct-current power supply comprises the control core cell 1 of DSP, and synchronizing signal 2, trigger impulse 3, digital quantity output 4, digital quantity input 5, analog acquisition 6, communication connection 7, man-machine display 8, operation keyboard 9, power module 10, photoelectricity isolate 11.System adopts modularized design, and peripheral digital quantity input and output, analog signals collection, communication connect all adopts the photoelectricity isolation scheme, has stopped peripheral interface circuit the control core cell is disturbed, and has improved the stability of system.Man-machine display interface, operation keyboard directly are connected with the control core cell of DSP.Wherein photoelectricity isolates 11, is applied in each concrete module, and non-independent circuits provides.Below be the detailed description of each system function module:
The three-phase synchronous signal circuit theory is seen Fig. 2: belong to Fig. 1 hardware system-synchronizing signal 2 module section circuit three-phase AC380V 50HZ power supply AC_A, AC_B, AC_C directly introduce the three-phase synchronous signal generator, after transforming, produce three and pass by zero square wave three-phase synchronous signal.The A phase synchronization signal inserts first order photoelectric isolated chip U2 (A unit) through resistance R 55, again through resistance R 56, inserts second level photoelectric isolated chip U3 (A unit), and last signaling point on resistance R 57 inserts DSP_D_INPUT numeral input pin DI11.The B phase synchronization signal inserts first order photoelectric isolated chip U2 (B unit) through resistance R 65, again through resistance R 66, inserts second level photoelectric isolated chip U3 (B unit), and last signaling point on resistance 67 inserts DSP_D_INPUT numeral input pin DI12.The C phase synchronization signal inserts first order photoelectric isolated chip U2 (C unit) through resistance R 75, again through resistance R 66, inserts second level photoelectric isolated chip U3 (C unit), and last signaling point on resistance R 57 inserts DSP_D_INPUT numeral input pin DI13.U_TB, GND_TB can insert DC12V for the operation APS amplifier power supply.
DSP_D_INPUT numeral input pin:
See Figure 15 DSP control core cell three tunnel synchronizing signals input DI11 DI12 DI13
Three-phase pulse signal circuit principle is seen Fig. 3: belong to Fig. 1 hardware system-trigger impulse 3 module section circuit
This circuit produces six tunnel separate fully two-stage photoelectricity and isolates IGCT amplitude-modulated pulse signal.
The VT1 pulse theory: during DSP_D_OUTPUT digital quantity output pin DO13 output high level, through resistance R 115, the conducting of U112 first order photoisolator, U111 second level photoisolator is through light emitting diode D112, resistance R 114 conductings, Light-Emitting Diode D112 lights, and indication VT1 has pulse output.Resistance R 113, R112 and Q111 PNP triode are formed signal amplification circuit, and during the U111 conducting, the Q111 base stage has electric current to flow through, the Q111 conducting, and electric current is through resistance R 111, and the trigger electrode G1 from VT1 flows to negative electrode K1, the VT1 conducting.When the CPU output low level, pulse-free signal output.U_VT1 circuits for triggering power supply is DC+12V.
The VT2 pulse theory: during DSP_D_OUTPUT digital quantity output pin DO14 output high level, through resistance R 125, the conducting of U122 first order photoisolator, U121 second level photoisolator is through light emitting diode D122, resistance R 124 conductings, Light-Emitting Diode D122 lights, and indication VT2 has pulse output.Resistance R 123, R122 and Q121 PNP triode are formed signal amplification circuit, and during the U121 conducting, the Q121 base stage has electric current to flow through, the Q121 conducting, and electric current is through resistance R 121, and the trigger electrode G2 from VT2 flows to negative electrode K2, the VT2 conducting.When the CPU output low level, pulse-free signal output.U_VT2 circuits for triggering power supply is DC+12V.
The VT3 pulse theory: during DSP_D_OUTPUT digital quantity output pin DO15 output high level, through resistance R 135, the conducting of U132 first order photoisolator, U131 second level photoisolator is through light emitting diode D132, resistance R 134 conductings, Light-Emitting Diode D132 lights, and indication VT1 has pulse output.Resistance R 133, R132 and Q131 PNP triode are formed signal amplification circuit, and during the U131 conducting, the Q131 base stage has electric current to flow through, the Q131 conducting, and electric current is through resistance R 131, and the trigger electrode G3 from VT3 flows to negative electrode K3, the VT3 conducting.When the CPU output low level, pulse-free signal output.U_VT3 circuits for triggering power supply is DC+12V.
The VT4 pulse theory is during DSP_D_OUTPUT digital quantity output pin DO16 output high level, through resistance R 145, the conducting of U142 first order photoisolator, U141 second level photoisolator be through light emitting diode D142, resistance R 144 conductings, Light-Emitting Diode D142 lights, and indication VT1 has pulse output.Resistance R 143, R142 and Q141 PNP triode are formed signal amplification circuit, and during the U131 conducting, the Q141 base stage has electric current to flow through, the Q141 conducting, and electric current is through resistance R 141, and the trigger electrode G4 from VT4 flows to negative electrode K4, the VT4 conducting.When the CPU output low level, pulse-free signal output.U_VT4 circuits for triggering power supply is DC+12V.
The VT5 pulse theory: during DSP_D_OUTPUT digital quantity output pin DO17 output high level, through resistance R 155, the conducting of U152 first order photoisolator, U151 second level photoisolator is through light emitting diode D152, resistance R 154 conductings, Light-Emitting Diode D152 lights, and indication VT1 has pulse output.Resistance R 153, R152 and Q151 PNP triode are formed signal amplification circuit, and during the U131 conducting, the Q151 base stage has electric current to flow through, the Q151 conducting, and electric current is through resistance R 151, and the trigger electrode G5 from VT5 flows to negative electrode K5, the VT5 conducting.When the CPU output low level, pulse-free signal output.U_VT5 circuits for triggering power supply is DC+12V.
The VT6 pulse theory: during DSP_D_OUTPUT digital quantity output pin DO18 output high level, through resistance R 165, the conducting of U162 first order photoisolator, U161 second level photoisolator is through light emitting diode D162, resistance R 164 conductings, Light-Emitting Diode D162 lights, and indication VT1 has pulse output.Resistance R 163, R162 and Q161 PNP triode are formed signal amplification circuit, and during the U131 conducting, the Q161 base stage has electric current to flow through, the Q161 conducting, and electric current is through resistance R 161, and the trigger electrode G6 from VT6 flows to negative electrode K6, the VT6 conducting.When the CPU output low level, pulse-free signal output.U_VT6 circuits for triggering power supply is DC+12V.
Capacitance-resistance absorbs: R110, C110 constitutes VT1, VT2 capacitance-resistance absorption circuit.R130, C130 constitutes VT3, VT4 capacitance-resistance absorption circuit.R150, C150 constitutes VT5, VT6 capacitance-resistance absorption circuit.Main effect is to carrying out overvoltage protection in the thyristor switch process.
DSP_D_OUTPUT digital quantity output pin:
See Figure 15 DSP control core cell six road trigger impulses output DO13 DO14 DO15 DO16 DO17 DO18
Digital quantity input switching circuit principle is seen Fig. 4: belong to Fig. 1 hardware system-digital quantity and import 5 module section circuit
This circuit can be for the input of 8 way word switch amount signals, with the power supply of DC24V power supply.
I0.0 is the input of major loop combined floodgate digital quantity, its operation principle: when major loop KM1 adhesive, electric current is through resistance R 301, (D302 lights light emitting diode D302, the indication input state), the conducting of U301 photoisolator, electric current are crossed resistance R 303 and are produced high level at DSP_D_INPUT numeral input pin DI01.During high level, the external switch closing of contact, promptly major loop closes a floodgate, and during low level, the external switch tip side is opened, and promptly major loop disconnects.Resistance R 302 mainly plays the dividing potential drop amplitude limit, and diode D301 prevents that electric power polarity from connecing instead.
I0.1, I0.2, I0.3, I0.4, I0.5, I0.6, I0.7 are respectively that isolating switch closes a floodgate, heavy gas, light gas/low oil level, long-range start and stop, sun are beaten state, cloudyly beat state, standby digital quantity is imported.
I0.1, I0.2, I0.3, I0.4, I0.5, I0.6, the identical I0.0 of I0.7 digital quantity input principle.
DSP_D_NPUT numeral input pin:
See Figure 15 DSP control core cell 8 road digital quantity switching signals input DI01 DI02 DI03 DI04 DI05 DI06DI07 DI08
Digital quantity output switch circuit principle is seen Fig. 5: belong to Fig. 1 hardware system-digital quantity and export 4 module section circuit
This circuit connects 7 way word switch amounts control output, and being output as all is passive contact.
When the operation principle of Q0.1 digital quantity output: DSP need control the outside closure, DSP_D_OUTPUT digital quantity output pin output high level, through resistance R 201, the conducting of U201 photoisolator, electric current produces high level by R202, U311 high-voltage great-current Darlington transistor array B1 pin high level, the Darlington transistor conducting, pin/C1 low level, the energising of K1 relay coil, the K1 adhesive, the Q0.1 closure.Simultaneously, electric current flows through light emitting diode D201 through resistance R 203, and D201 lights, and indication Q0.1 is current to be attracting state.
The output of Q0.2 alarm signal, the output of Q0.3 fault-signal, Q0.4 running status are exported, the Q0.5 sun is beaten and started output, cloudy startup output, the standby output principle identical device of the Q0.7 start and stop output Q0.1 of beating of Q0.6
DSP_D_OUTPUT digital quantity output pin:
See Figure 15 DSP control core cell two road digital quantity switching signals output DO06 DO07; Five road digital quantity switching signals output DO01 DO02 DO03 DO04 DO05
Analog quantity two light-coupled isolation linear amplifiers are seen Fig. 6: belong to Fig. 1 hardware system-analog acquisition-photoelectricity and isolate the photoelectrical coupler input series connection that the core of 11 modular circuits is two same models of employing, form the difference negative-feedback, with the non-linear current transmission coefficient of compensation optocoupler.Though two photo-couplers itself are non-linear, its nonlinear degree is identical, so produce the effect of cancelling out each other.In order to obtain linear characteristic, adopt single chip integrated couple of photoelectrical coupler TLP521-2 or four photoelectrical coupler TLP521-4, photoelectrical coupler is integrated in the chip, can guarantee its characteristic basically identical.
Analog quantity after the conditioning inserts AI_INPUT, and through the end of oppisite phase of resistance R 1 access operational amplifier U1, operational amplifier output terminal is connected with the input of two unit U2A, U2B in the photoelectrical coupler chip, and inserts current-limiting resistance R4.Photoelectrical coupler U2B, potentiometer RX1, resistance R 3, R2 form the operational amplifier negative-feedback.The position of regulator potentiometer RX1 can increase or reduce negative-feedback voltage, the conditioning signal magnification ratio.Signal through resistance R 5, R6 dividing potential drop, inserts the A/D ALT-CH alternate channel of CPU after photoelectrical coupler U2A isolates.Capacitor C 1 improves the stability that amplifier is amplified.Diode D1, main effect is a polarity protection, when input analog amount is timing, diode D1 conducting forms negative-feedback.
All analog circuits of this interface circuit all adopt this scheme to isolate sampling.
Transformer input three-phase alternating voltage Acquisition Circuit is seen Fig. 7: belong to Fig. 1 hardware system-analog acquisition 6 modular circuits
This circuit is mainly finished transformer input three-phase voltage U
AB, U
BC, U
CASampling, specific implementation is as follows:
Voltage U
ABChange into the 4-20mA current signal through the AM11 transmitting module, change into 0.2V-1V voltage by 50 ohm of R402 resistance, through by after U11A, R403, the conditioning of R404 inverting amplifier, after optical isolation amplifier is isolated amplification, send into DSP analog quantity pin AIW01 again.The D401 transient voltage suppressor, the C401 filter capacitor plays the anti-interference effect of protection.
Voltage U
BCChange into the 4-20mA current signal through the AM12 transmitting module, change into 0.2V-1V voltage by 50 ohm of R412 resistance, through by after U11B, R413, the conditioning of R414 inverting amplifier, after optical isolation amplifier is isolated amplification, send into DSP analog quantity pin AIW02 again.The D411 transient voltage suppressor, the C411 filter capacitor plays the anti-interference effect of protection.
Voltage U
CAChange into the 4-20mA current signal through the AM13 transmitting module, change into 0.2V-1V voltage by 50 ohm of R422 resistance, through by after U11C, R423, the conditioning of R424 inverting amplifier, after optical isolation amplifier is isolated amplification, send into DSP analog quantity pin AIW03 again.The D421 transient voltage suppressor, the C421 filter capacitor plays the anti-interference effect of protection.
DSP analog quantity pin: see Figure 15 DSP control core cell three-phase input voltage AIW01 AIW02 AIW03
Transformer input three-phase alternating current Acquisition Circuit is seen Fig. 8: belong to Fig. 1 hardware system-analog acquisition 6 modular circuits
This circuit is mainly finished transformer input three-phase current I
A, I
B, I
CSampling, specific implementation is as follows:
A phase current I
ABy the resistance R 520 of no-load voltage ratio for 2 ohm of 1A current transformer accesses, current signal is transformed into the voltage signal that 0-2V changes, after resistance R 521, R522 dividing potential drop, (be made up of amplifier U21A, U21B, R523, R524, R525, R526, D522, D523, C522 by absolute value circuit through absolute value circuit for signal, amplification coefficient 1) after the transformation, after nursing one's health by U21C, R527, R528 inverting amplifier, after optical isolation amplifier is isolated amplification, send into DSP analog quantity pin AIW04 again.The two-way transient voltage suppressor of D521, the C521 filter capacitor, the VR521 piezo-resistance plays the anti-interference effect of protection.
B phase current I
BBy the resistance R 530 of no-load voltage ratio for 2 ohm of 1A current transformer accesses, current signal is transformed into the voltage signal that 0-2V changes, after resistance R 531, R532 dividing potential drop, (be made up of amplifier U31A, U31B, R533, R534, R535, R536, D532, D533, C532 by absolute value circuit through absolute value circuit for signal, amplification coefficient 1) after the transformation, after nursing one's health by U31C, R537, R538 inverting amplifier, after optical isolation amplifier is isolated amplification, send into DSP analog quantity pin AIW05 again.The two-way transient voltage suppressor of D531, the C531 filter capacitor, the VR523 piezo-resistance plays the anti-interference effect of protection.
C phase current I
CBy the resistance R 540 of no-load voltage ratio for 2 ohm of 1A current transformer accesses, current signal is transformed into the voltage signal that 0-2V changes, after resistance R 541, R542 dividing potential drop, after signal changes through the absolute value circuit of being made up of amplifier U41A, U41B, R543, R544, R545, R546, D542, D543, C542, after nursing one's health by U41C, R547, R548 inverting amplifier, after optical isolation amplifier is isolated amplification, send into DSP analog quantity pin AIW06 again.The two-way transient voltage suppressor of D541, the C541 filter capacitor, the VR541 piezo-resistance plays the anti-interference effect of protection.
DSP analog quantity pin: see Figure 15 DSP control core cell three-phase input current AIW04 AIW05 AIW06
Transformer output secondary voltage current acquisition circuit is seen Fig. 9: belong to Fig. 1 hardware system-analog acquisition 6 modular circuits
Secondary current I2 sample circuit: the scope 0-3V voltage of secondary current I2 sampling input (gets by secondary current sample resistance R12 conversion, R12 is an ohm level, be connected in parallel on the last loop resistance of R12 and be kilo-ohm level, it is constant that voltage on the R12 keeps substantially), electric current flows through secondary current table PA2, adjustable potentiometer RXI2, resistance R 501, resistance R 502, change RXU2 correcting potential device resistance, the internal resistance of gauge outfit loop increases or reduces, under the same voltage, the electric current that gauge outfit flows through increases or reduces, secondary current table show value changes, and D501 is the diode of protection gauge outfit; The voltage of resistance R 502 inserts by after U24A, R503, the conditioning of R504 inverting amplifier, after optical isolation amplifier is isolated amplification, sends into DSP analog quantity pin AIW08 again.The D502 transient voltage suppressor, the C501 filter capacitor, the VR501 piezo-resistance, the D503 transient voltage suppressor, the C502 filter capacitor plays the anti-interference effect of protection.
Secondary voltage U2 sample circuit: after high-tension resistive R11 and resistance R 12 dividing potential drops are passed through in secondary voltage U2 sampling, receive secondary voltage table PV2, adjustable potentiometer RXU2, resistance R 511, resistance R 512, change RXU2 correcting potential device resistance, gauge outfit circuit and shunt resistance R510 flow through electric current and change, secondary voltage table show value changes, and D511 is the diode of protection gauge outfit; The voltage of resistance R 512 inserts by after U24C, R513, R514, the conditioning of R515 in-phase amplifier, after optical isolation amplifier is isolated amplification, sends into DSP analog quantity pin AIW07 again.The D512 transient voltage suppressor, the C511 filter capacitor, the VR511 piezo-resistance, the D513 transient voltage suppressor, the C512 filter capacitor plays the anti-interference effect of protection.DSP analog quantity pin: see Figure 15 DSP control core cell secondary voltage, secondary current AIW07 AIW08
The temperature of oil in transformer observation circuit is seen Figure 10: belong to Fig. 1 hardware system-analog acquisition 6 modular circuits
The temperature of oil in transformer observation circuit utilizes U27MAX6325EPA to produce accurate reference voltage, C561, C562, C563, C564 is a filter capacitor, reference voltage source is by precision resistance (R551, R552, R553), the bridge for measuring temperature power supply that RTD (PT100 thermal resistance) forms, circuit adopts the three-wire system interface to reduce the error that the RTD lead connects generation, electric bridge is through R555, C551, R556, after the C552 filtering, access is by R557, R558, U26A, R559, the differential amplifier that R560 forms amplifies, insert again by U26B, R561, the conditioning of R562 inverting amplifier, after optical isolation amplifier is isolated amplification, send into DSP analog quantity pin.D551, D552 transient voltage suppressor, C553, C554 amplifier power filter.
DSP analog quantity pin: see Figure 15 DSP control core cell temperature of oil in transformer AIW11
4-20mA analog acquisition circuit is seen Figure 11: belong to Fig. 1 hardware system-analog acquisition 6 modular circuits
Flue gas turbidity signal: 4-20mA flue gas turbidity signal changes into 0.2V-1V voltage by 50 ohm of R432 resistance, after nursing one's health by U12A, R433, R434 inverting amplifier, after optical isolation amplifier is isolated amplification, send into DSP analog quantity pin AIW12 again.The D431 transient voltage suppressor, the C431 filter capacitor plays the anti-interference effect of protection.
DSP analog quantity pin: see Figure 15 DSP control core cell flue gas turbidity AIW12
The boiler load signal: 4-20mA boiler load signal changes into 0.2V-1V voltage by 50 ohm of R442 resistance, after nursing one's health by U12B, R443, R444 inverting amplifier, after optical isolation amplifier is isolated amplification, send into DSP analog quantity pin AIW13 again.The D441 transient voltage suppressor, the C441 filter capacitor plays the anti-interference effect of protection.
DSP analog quantity pin: see Figure 15 DSP control core cell boiler load AIW13
The standby 1:4-20mA signal of analog quantity changes into 0.2V-1V voltage by 50 ohm of R452 resistance, through by after U12C, R453, the conditioning of R454 inverting amplifier, after optical isolation amplifier is isolated amplification, sends into DSP analog quantity pin AIW14 again.The D451 transient voltage suppressor, the C451 filter capacitor plays the anti-interference effect of protection.
DSP analog quantity pin: see standby 1 AIW14 of Figure 15 DSP control core cell analog quantity
The standby 2:4-20mA signal of analog quantity changes into 0.2V-1V voltage by 50 ohm of R462 resistance, through by after U12D, R463, the conditioning of R464 inverting amplifier, after optical isolation amplifier is isolated amplification, sends into DSP analog quantity pin AIW15 again.The D461 transient voltage suppressor, the C461 filter capacitor plays the anti-interference effect of protection.
DSP analog quantity pin: see standby 2 AIW15 of Figure 15 DSP control core cell analog quantity
The communication interface circuit is seen Figure 12: belong to Fig. 1 hardware system-communication and connect 7 module section circuit
The COM1R422 communication port: this communication interface adopts four-wire system RX-, RX+, TX-, TX+ to add GND signal ground mode, U622 chip RS422 communication interface chip.The DSP communication sends pin PTXA, communication sends enable pin EA, at first carries out 3.3V and the conversion of 5V level by U600 SN74LVC4245DB.When transmission allows to enable to export high level, light D612 LED through resistance R 614 and send the permission indicator lamp, formed the photoelectricity isolated loop and ended by resistance R 615, R616, optocoupler U611B simultaneously, the transmission of U622 allows to enable 4 pin high level, sends to allow.When sending pin output high level signal when not sending data, the D611 LED light is extinguished.D611 LED sends indicator lamp and lights through resistance R 611 at ordinary times when sending data and for low, and indicator lamp flicker, indication have data transmitting.Resistance R 612, R613, optocoupler U611A are that photoelectricity is every sending output.When optocoupler U611A ends, the output of data high level; During optocoupler U611A conducting, the output of data low level.Do not receive data, be received as high level D613 indicator lamp and extinguish, optocoupler U611D ends.Receive data and D613 sends indicator lamp and lights through resistance R 617 at ordinary times for low, indicator lamp flicker, indication have data receiving.When optocoupler U611D ends, the PRXA pin high level that R618 is connected with DSP.During optocoupler U611D conducting, the PRXA pin low level that R618 is connected with DSP.
The DSP pin connects: see Figure 15 DSP control core cell serial ports COM1 PRTXA PRXA EA
The COM2R485 communication port: this communication interface adopts two-wire system A+, B-to add GND signal ground mode, U622 chip RS485 communication interface chip.The DSP communication sends pin PTXB, communication sends enable pin EB, at first carries out 3.3V and the conversion of 5V level by U600SN74LVC4245DB.When transmission allows to enable to export high level, light D622LED through resistance R 624 and send the permission indicator lamp, formed the photoelectricity isolated loop and ended by resistance R 625, R626, optocoupler U621B simultaneously, the transmission of U622 allows to enable 4 pin high level, sends to allow.When sending pin output high level signal when not sending data, the D621 LED light is extinguished.D621 LED sends indicator lamp and lights through resistance R 621 at ordinary times when sending data and for low, and indicator lamp flicker, indication have data transmitting.Resistance R 622, R623, optocoupler U621A are that photoelectricity is every sending output.When optocoupler U621A ends, the output of data high level; During optocoupler U621A conducting, the output of data low level.Do not receive data, be received as high level D623 indicator lamp and extinguish, optocoupler U621D ends.Receive data and D623 sends indicator lamp and lights through resistance R 627 at ordinary times for low, indicator lamp flicker, indication have data receiving.When optocoupler U621D ends, the PRXB pin high level that R628 is connected with DSP.During optocoupler U621D conducting, the PRXA pin low level that R628 is connected with DSP.
The DSP pin connects: see Figure 15 DSP control core cell serial ports COM2 PRTXB PRXB EB
Man-machine interface operation keyboard interface circuit is seen Figure 13: belong to Fig. 1 hardware system-keyboard operation 9 module section circuit
Key " resets ": reinitialize program, start-up system.
" open/stop " key: shutdown system when open system or system move during system-down.
" modification " key: revise setup parameter.
" function " key: the button specific function is selected to switch.
" ▲ " key: roll up one page, or increase parameter.
The man-machine interface operation keyboard is connected with the DSP pin: see Figure 15 DSP control core cell keyboard interface JP01 JP02 JP03JP04 JP05; The RESET system digits that resets signal ground
The man-machine display interface circuit is seen Figure 14: belong to Fig. 1 hardware system-man-machine display 8 module section circuit
The man-machine display interface circuit has been selected wide temperature LCDs for use, and operating temperature is-20-+70 ℃; Display size 320X240 cun; Inner integrated temperature compensating module and liquid crystal drive voltage module; The LED-backlit system of high life.Liquid crystal is the 5V power supply, and DSP is the 3.3V power supply, and all data wires of liquid crystal, control line are isolated the conversion back through U640, U641 chip level and be connected with dsp chip MB0-MB7 and KB0-KB7 pin.Liquid crystal drive power supply, LCD backlight power supply are powered with independent current source respectively.After DSP pin DO11 level is isolated conversion through the U640 chip, connect resistance R 641 and drive high-power optocoupler U643, open and close LCD backlight, R642 is a current-limiting resistance.When system switched on, power supply was lighted D642 LED power supply indicator through resistance R 644.When system moved, DSP pin DO12 level connected resistance R 643 and lights D641 LED run indicator after isolating conversion through the U640 chip.
The DSP pin connects: see Figure 15 DSP control core cell liquid crystal display man-machine interface MB10 MB1 MB2 MB3MB4 MB5 MB7 KB0 KB1 KB2 KB3 KB4 KB5; LCD backlight control output DO11; System boot stops LED indication output DO12.
DSP control core cell is seen Figure 15: belong to Fig. 1 hardware system-DSP control core cell 1 module section circuit
DSP control core cell such as lower part are formed:
Clock: provide programming port by 30M crystal oscillator Y1, capacitor C 2, capacitor C 3 with inner phase-locked loop circuit: form the JTAG mouth by JP01, pull-up resistor R2, R3 up to 150MHz clock frequency JTAG, be mainly used in dsp system configuration, the programming of Flash holder, the software systems real-time simulation.
Random access memory: U02 is the random access memory ram that DSP expands 256KB.
Parameter calendar EEPROM: real-time timepiece chip U03 is connected with DSP by the I2C bus, is mainly used in setup parameter and preserves, provides system current running time, calendar.Reserve battery BT1 is chip U03 power supply when system cut-off, crystal oscillator Y2 is an I2C bus pull-up resistor for real-time timepiece chip U03 provides reference frequency, R5, R6.
ADC reference power supply: provide reference power supply for analog quantity transforms digital quantity by biasing resistor R4, shunt capacitance C4, C5 and DSP internal circuit.
Filter capacitor: C6, C7, C8, C9 provide filter capacitor for system core power supply.
Reset circuit: by R1, C1, D1, form, system initialization is reruned with the keyboard key that " resets ".
The keyboard key that " resets " is seen Figure 13 man-machine interface operation keyboard interface circuit.
The analog input channel: resistance R 7, adjustable potentiometer RX1 form the range initialization circuit.Chip U4 integrated temperature voltage conversion module is used for the monitoring control system operating ambient temperature.
Three-phase input voltage: see Fig. 7 transformer input three-phase alternating voltage Acquisition Circuit.
Three-phase input current: see Fig. 8 transformer input three-phase alternating current Acquisition Circuit.
Secondary voltage, secondary current: see Fig. 9 transformer output secondary voltage current acquisition circuit.
Temperature of oil in transformer: see Figure 10 temperature of oil in transformer observation circuit.
LCD backlight control output, system boot stop LED indication output: see Figure 14 man-machine display interface circuit.
Liquid crystal display man-machine interface: see Figure 14 man-machine display interface circuit.
Keyboard interface: see Figure 15 man-machine interface operation keyboard interface circuit.
Six road trigger impulses output: see Fig. 3: the three-phase pulse signal circuit.
Three tunnel synchronizing signals input: see Fig. 2 three-phase synchronous signal circuit.
8 road digital quantity switching signals input: see Fig. 4 digital quantity input switching circuit.
The output of five road digital quantity switching signals, the output of two road digital quantity switching signals: see Fig. 5 digital quantity output switch circuit.
Serial ports COM1:R422 serial ports COM1 connects, and sees Figure 12 communication interface circuit.
Serial ports COM2:R485 serial ports COM2 connects, and sees Figure 12 communication interface circuit.
DSP control core power supply is seen Figure 16: belong to Fig. 1 hardware system-power supply 10 modules
For DSP control core cell provides two-way separate power supply: digital display circuit power supply, simulation system power supply.
Digital display circuit power supply: export one road 1.8V power supply, output one road 3.3V power supply after the 30V AC power transforms through the AC/DC power module respectively, inductance L 831, capacitor C 833, C834 are the 1.8V power filter, and inductance L 832, capacitor C 835, C836 are the 3.3V power filter.
Simulation system power supply: export one road 1.8V power supply, output one road 3.3V power supply after the 30V AC power transforms through the AC/DC power module respectively, inductance L 841, capacitor C 843, C844 are the 1.8V power filter, and inductance L 842, capacitor C 845, C846 are the 3.3V power filter.
The external interface circuit power supply is seen Figure 17: belong to Fig. 1 hardware system-power supply 10 modules
The communication interface power supply: after the 8V AC power is piled rectification through the ZL711 bridge, capacitor C 711, C712 filtering, regulator block U711 voltage stabilizing, capacitor C 713, C714 output DC+5V power supply.
The LCD backlight power supply: after the 8V AC power is piled rectification through the ZL721 bridge, capacitor C 721, C722 filtering, regulator block U721 voltage stabilizing, capacitor C 723, C724 output DC+5V power supply.
The liquid crystal drive power supply: after the 8V AC power is piled rectification through the ZL731 bridge, capacitor C 731, C732 filtering, regulator block U731 voltage stabilizing, capacitor C 733, C734 output DC+5V power supply.
Input and output IO power supply: after the 8V AC power is piled rectification through the ZL741 bridge, capacitor C 741, C742 filtering, regulator block U741 voltage stabilizing, capacitor C 743, C744 output DC+5V power supply.
The amplifier power supply: the 18V AC power that end two-way of the same name is opposite, export by diode D751, D752 during positive half-wave, after capacitor C 751, C752 filtering, regulator block U761 voltage stabilizing, capacitor C 753, C754 output DC+15V power supply.Export by diode D753, D754 when bearing half-wave, after capacitor C 755, C756 filtering, regulator block U771 voltage stabilizing, capacitor C 757, C758 output DC-15V power supply.+ 15V power supply ,-the 15V power supply is the integrated operational amplifier power supply.
Lock-out pulse and circuits for triggering power supply are seen Figure 18: belong to Fig. 1 hardware system-power supply 10 modules
The VT1 pulse power: after the 8V AC power is piled rectification through the D811 bridge, capacitor C 811, C812 filtering, the power supply of VT1 pulsed triggering circuit, GND VT1 is independent, does not link to each other with other any ground connection.
The VT2 pulse power: after the 8V AC power is piled rectification through the D821 bridge, capacitor C 821, C822 filtering, the power supply of VT2 pulsed triggering circuit, GND_VT2 is independent, does not link to each other with other any ground connection.
The VT3 pulse power: after the 8V AC power is piled rectification through the D831 bridge, capacitor C 831, C832 filtering, the power supply of VT3 pulsed triggering circuit, GND_VT3 is independent, does not link to each other with other any ground connection.
The VT4 pulse power: after the 8V AC power is piled rectification through the D841 bridge, capacitor C 841, C842 filtering, the power supply of VT4 pulsed triggering circuit, GND_VT4 is independent, does not link to each other with other any ground connection.
The VT5 pulse power: after the 8V AC power is piled rectification through the D851 bridge, capacitor C 851, C852 filtering, the power supply of VT5 pulsed triggering circuit, GND_VT5 is independent, does not link to each other with other any ground connection.
The VT6 pulse power: after the 8V AC power is piled rectification through the D861 bridge, capacitor C 861, C862 filtering, the power supply of VT6 pulsed triggering circuit, GND_VT6 is independent, does not link to each other with other any ground connection.
Sync comparator power supply: only provide power supply for the three-phase synchronous signal comparator.After the 15V AC power is piled rectification through the D871 bridge, capacitor C 871, C872 filtering, regulator block U871 voltage stabilizing, capacitor C 873, C874 output DC+12V power supply.
GND_TB is independent, does not link to each other with other any ground connection.
Software systems
The general flow chart of software systems (seeing Figure 20) from the software general flow chart as can be seen, software systems have extremely simple structure, the normal operation startup of software systems is brought into operation by system power-on reset or keyboard clearance, through transferring to DSP/BIOS operating system management control software interrupt module, hardware interrupts module, task module after the initialization.When software anomaly, produce the watchdog reset signal, make software restart operation.
Software systems are seen shown in Figure 19: the software systems of digital signal processor (DSP) embedded controller for electric dust-removing three-phase high-voltage direct-current power supply, based on DSP/BIOS operating system 1., 1. provide the utility function interface of DSP2812 chip controls bottom by DSP/BIOS operating system, the thread management of finishing the work, dispatcher software interruption, periodic function and idle (running background function) and external hardware interrupt and various peripheral equipment managements.The system management hardware interrupts have the synchronizing signal hardware interrupts 5., 6. communication interface hardware interrupt, the analog acquisition hardware interrupts 4..Square wave rising edge, trailing edge that 5. the synchronizing signal hardware interrupts mainly produces hardware system three-phase synchronous signal circuit (see figure 2) are caught, produce and interrupt, according to interrupting and other analog quantity, the output of digital quantity feedback signal control three-phase pulse circuit (see figure 3) IGCT trigger impulse, regulate the IGCT angle of flow, change the three-phase input voltage of transformer, thereby change the secondary high-pressure of electric precipitation input.Communication interface hardware interrupts that 6. COM1 communicating interrupt and COM2 communicating interrupt are arranged, and communication interface circuit (seeing Figure 12) is managed.The COM1 communicating interrupt realizes the MODBUS agreement communication of COM1, host computer slave function.8. COM2 communicating interrupt and host function communication management software interrupt realize the MODBUS main frame slave communication function of COM2, realize data sharing between each controller in the passage, realize the big closed-loop control of controller.Analog acquisition interrupts 4. finishing that three-phase input voltage (see figure 7), three-phase input current (see figure 8), secondary voltage, secondary current (see figure 9), temperature of oil in transformer (see figure 10), turbidity signal, boiler load, analog quantity are standby 1, collection, the calculating of analog quantity standby 2 (seeing Figure 11).Systems soft ware interrupts, and is mainly produced the software interrupt of a timing by the system cycle function.The parameter calendar software interrupts 10. mainly reading real-time clock signal, the time on refresh controller date, when having parameter modification to finish, operational factor is write EEPROM preserve simultaneously.9. the liquid crystal display software interrupt mainly finishes man-machine display interface circuit (seeing Figure 14) control, exports operational factor, operation real-time curve, history curve, the state of keyboard, the state of parameter modification etc. on LCDs.7. digital quantity I/O, keyboard scan software interrupt are mainly finished keyboard state scanning, are finished relative keypad function, and the control output of the status scan of digital quantity input switching circuit (see figure 4), digital quantity output switch circuit (see figure 5).2. initialization finishes the initialization of control parameter of program and the configuration of dsp chip specific function.3. exception management when software anomaly, produces the watchdog reset signal, makes software restart operation.Each is soft, hardware interrupts is according to the priority work of the operating system of DSP/BIOS configuration.
The initialization flow process: see Figure 21 belong to Figure 19 software systems 2.-initialization
Initialize routine is mainly finished following work: chip configuration is finished address space configuration, house dog configuration, the clock register configuration of the visit of external RAM; Working method, the analog acquisition clock of analog acquisition, the configuration of the width of sampling are finished in the analog acquisition configuration; Communication interface configuration finish COM1, COM2 baud rate, stop, the initialization of data bit; The selection of the multi-functional I/O of resetting, the initialization of digital quantity output state are finished in the configuration of I/O digital quantity; Liquid crystal control configuration shows the pin of control, data, control chip in the initialization liquid crystal display; The operational factor (seeing Figure 22) of preserving in the EEPROM is read in the operational factor configuration; Interrupt configuration enables the useful interruption of software systems, the no interruption of shielding harness.The parameter calendar software is interrupted: see that 10. Figure 23 belongs to Figure 19 software systems
The parameter calendar software interrupts being produced by DSP/BIOS operating system periodic function, and the cycle is 500ms fixedly.Regularly read real-time timepiece chip, the time on updating system date, when operational factor is modified, preserve the operational factor of current modification to EEPROM simultaneously.
Digital quantity I/O keyboard scan software interrupt: see that 7. Figure 24 belongs to Figure 19 software systems
Digital quantity I/O keyboard scan software interrupt parameter is produced by DSP/BIOS operating system periodic function, and the cycle is 20ms fixedly.The key-press status of timing scan keyboard interface circuit when keyboard is pressed, is carried out the power function of keyboard correspondence, finishes as functions such as display screen page turning, operation shutdown, parameter modifications.Digital quantity input scan major loop switching signal I0.0, isolating switch switching signal I0.1, heavy Gas Signal I0.2, light gas/low oil level signal I0.3, long-range start stop signal I0.4, sun are beaten status signal I0.5, the cloudy state of beating status signal I0.6, standby digital quantity input signal I0.7, change digital quantity input state corresponding in the RAM memory block according to the state that scans.
Digital quantity output point control output (seeing Figure 25): equipment start-stop Q0.1, according to system's start stop signal output, Q0.1 disconnects when Q0.1 closure, stopping signal when keyboard or host computer signal send starting-up signal, is mainly used in the control A.C. contactor.Running status output Q0.4, show operation Q0.4 closure when system running state, LED light is bright during the operation of man-machine display interface, stops Q0.4 and disconnects, man-machine display interface operation LED light is gone out, and Q0.4 output is mainly used in control system and moves outside indicator lamp.Sun is beaten start and stop output Q0.5, mainly make motor in the control sun, play button state work according to sun, Q0.5 disconnects during disconnection, Q0.5 disconnects closed in the time of manually, automatically set by sun the time and decide dwell time, working time operation, T1, T2 preserve dwell time timing address, working time timing address, each clocking value that interrupts refreshing T1, T2 in the software.The cloudy start and stop output Q0.6 that beats, mainly in the cloudy motor of beating of control, play button state work according to the moon, Q0.6 disconnects during disconnection, Q0.6 closure in the time of manually, automatically set by the moon the time and decide dwell time, working time operation, T3, T4 preserve dwell time timing address, working time timing address, each clocking value that interrupts refreshing T3, T4 in the software.Sun is beaten button state, cloudy to beat button state be the variable that defines in the software, has nothing to do with actual button.Standby output Q0.7 is only as standby.LCD backlight is control here also, when the LCD backlight state is lighted, and DSP output pin DO11 closure, when the LCD backlight state extinguished, DSP output pin DO11 disconnected.
(error protection process chart Figure 26) seen in the output of Q0.2 alarm signal, Q0.3 fault-signal output control.System provides comprehensive failure protection function: input pull-down, low oil level detect, weigh gas detection, output short-circuit detection, output open circuit detection, three-phase current limit value, three-phase balance, three-phase voltage balance, dangerous oil temperature, critical oil temperature.Except critical oil temperature was only exported the Q0.2 alarm signal, other all fault alarms were all exported Q0.2 alarm signal, Q0.3 fault-signal simultaneously.
Liquid crystal display software interrupt: see that 9. Figure 27 belongs to Figure 19 software systems
The liquid crystal display software interrupt is produced by DSP/BIOS operating system periodic function, and the cycle is 300ms fixedly, the content of periodic refreshing LCDs.When the liquid crystal display software interrupt produces, at first judge the page number of current demonstration, call corresponding real time execution parameter page or leaf handling procedure, setup parameter prescription page or leaf handling procedure, volt-ampere real-time curve page or leaf handling procedure, history run curve page or leaf handling procedure, failure logging query page handling procedure, systematic parameter configuration page handling procedure according to the page number, convert content displayed the data format of liquid crystal display correspondence to, deposit liquid crystal display data storage RAM in.The current state of keyboard, revise writing liquid crystal display data RAM again.Call the data that the liquid crystal control program stores data in the RAM and output to liquid crystal display, finish the liquid crystal display Refresh Data.After Refresh Data finishes, also will open the cursor of closing liquid crystal according to the state of parameter modification, the corresponding parameter region color of liquid crystal is anti-white.
Host function communication management software interrupt: see that 8. Figure 28 belongs to Figure 19 software systems
Host function communication management software interrupt is produced by DSP/BIOS operating system periodic function, cycle is 100ms fixedly, sharing of state in the realization passage between the different controllers, data, the separate unit controller can be according to other controller ruuning situation in the passage, and the output of self is adjusted and optimized.When interrupt producing, at first judging whether to be Host Status, is not that Host Status withdraws from interruption, just judges whether just to withdraw from interruption in communication in communication again.Not when communication, judge whether write Data Labels is 1, writing Data Labels is 0 o'clock, read data to each electric field, number carrying out poll by electric field reads, read the parameter communication identification code by electric field number generation at every turn, write first data to communication and send buffer memory, and just putting 1 at communication symbol, prevent the repeated trigger communication, the process that specifically reads is transferred to COM2 hardware transmission reception and is interrupted finishing, the communication electric field number of next time is set simultaneously, each electric field that interrupts number adds 1, until greater than maximum field number, reads end of polling(EOP).Writing Data Labels is 1, each controller state that reads by electric field number and poll, data generate channels share parameter communication identification code, write first data to communication and send buffer memory, and just putting 1 at communication symbol, prevent the repeated trigger communication, specifically writing the channels share parametric procedure transfers to COM2 hardware and send to receive interrupts finishing, the communication electric field number of next time is set simultaneously, each electric field that interrupts number adds 1, until greater than maximum field number, write the channels share parameter and finish, writing Data Labels is 0, restart poll and read the state of each electric field, data enter circulation next time.
The COM2 communication interface interrupts: see Figure 29 Figure 30 belong to Figure 19 software systems 6.-communication interface hardware interrupts
The COM2 communication interface interrupts mainly comprising: serial ports COM2 receives hardware interrupts, and serial ports COM2 sends hardware interrupts, and serial ports COM2 is software interrupt regularly.
COM2 supports the MODBUS-RTU communications protocol, mainly realizes the data sharing between the passage internal controller, realizes main website and slave station function.The MODBUS-RTU communications protocol is determined the beginning of the data of communication and end blanking time by detecting character.System manages with serial ports COM2 timing software interrupt.
Serial ports COM2 send to interrupt (seeing Figure 29) serial ports COM2 when being host mode, and host function communication management software interrupt regularly triggers the COM2 communication and sends and interrupt, the data read that sends to the passage internal controller or write shared data command.When serial ports COM2 is slave mode,, send return data according to the host communication order.Send when interrupting producing, at first judge to send end mark, do not send data counts and subtract one, be not equal to zero, get the transmission data, calculate the CRC16 check code again, send data to the transmission buffer area, interrupt returning.The transmission data counts equals zero, and CRC16 check code to communication sends buffer area, puts end mark.When communication sends end, settle accounts bundle flag, send pin disabled, open to receive and interrupt, interrupt returning.
Serial ports COM2 receives and interrupts (seeing Figure 30), when communication reception buffer area has data, produces COM2 and receives hardware interrupts, at first judges whether receiving communication data according to data accepted flag.Not to be in the state that receives data, judge the address detected sign, do not interrupt returning.It is the address detected state, also need to judge the main frame slave status of this controller, during slave status, the electric field that receives data and this machine number compares, during Host Status, receive data and the electric field that sends communication and number compare, mistake interrupts returning, correctly put data accepted flag, communication is regularly interrupted opening.When being when being in the state that receives data, zero clearing during the communication timing ga(u)ge is shifted and is preserved communication and receives data in buffer, and data counts adds one, interrupts returning.
(seeing Figure 30) regularly interrupted in serial ports COM2 communication, and the communication character pitch produces the COM2 communication and regularly interrupts greater than 3.5 characters during the time, after communication is regularly interrupted producing, forbids that communication receives, forbids that communication regularly interrupts.Whether the comparing data count value is less than the MODBUS minimum data, less than being miscommunication; The data counts value is correct, receives data CRC16 verification, during check errors, i.e. and miscommunication.During miscommunication, be slave status, open again to receive and interrupt, put the address detected sign, interrupt returning.During miscommunication, be Host Status, send pin enabled, corresponding current communication electric field number is put miscommunication, simultaneously just in the communication symbol zero clearing.The CRC16 verification is correct, after receiving data and handling, during slave status, generate and send return data, send pin enabled, get first and send data, write and send buffer area (trigger to send when sending the buffer memory sky and interrupt), interruption is returned, Host Status sends pin enabled, and corresponding current communication electric field number is put the communication success, just in the communication symbol zero clearing, interrupt returning simultaneously.
The COM1 communication interface interrupts: see that 6. Figure 31 belongs to Figure 19 software systems
The COM1 communication interface interrupts mainly comprising: serial ports COM1 receives hardware interrupts, and serial ports COM1 sends hardware interrupts, and serial ports COM1 is software interrupt regularly.
COM1 supports the MODBUS-RTU communications protocol equally, mainly carries out communication with host computer and is connected, and realizes the slave station function, and host computer carries out integrated control ﹠ management by COM1 to controller.The MODBUS-RTU communications protocol is determined the beginning of the data of communication and end blanking time by detecting character.System manages with serial ports COM1 timing software interrupt.
When communication reception buffer area has data, produce COM1 and receive hardware interrupts, at first judge whether receiving communication data according to data accepted flag.Not being to be in the state that receives data, judging the address detected sign, otherwise interrupt returning, is the address detected state, receives data and current device address relatively, and mistake interrupts returning, and correctly puts data accepted flag, and communication is regularly interrupted opening.When being when being in the state that receives data, zero clearing during the communication timing ga(u)ge is shifted and is preserved communication and receives data in buffer, and data counts adds one, interrupts returning.
The communication character pitch produces the COM1 communication and regularly interrupts greater than 3.5 characters during the time, after communication is regularly interrupted producing, forbids that communication receives, forbids that communication regularly interrupts.Whether the comparing data count value less than the MODBUS minimum data, interrupts less than opening again to receive, and puts the address detected sign, interrupts returning.The data counts value is correct, receives data CRC16 verification, and check errors is opened again to receive and interrupted, and puts the address detected sign, interrupts returning.The CRC16 verification is correct, carries out data and handles, and generation sends return data, sends pin enabled, and this machine address writes and sends buffer area (trigger to send when sending the buffer memory sky and interrupt), and regularly interruption is returned.
When sending the buffer area sky, trigger the COM1 communication and send interruption.Send when interrupting producing, at first judge to send end mark, do not send data counts and subtract one, be not equal to zero, get the transmission data, calculate the CRC16 check code again, send data to the transmission buffer area, interrupt returning.The transmission data counts equals zero, and CRC16 check code to communication sends buffer area, puts end mark.When communication sends end, settle accounts bundle flag, send pin disabled, open to receive and interrupt, interrupt returning.
Synchronizing signal hardware interrupts: see that 5. Figure 32, Figure 33, Figure 34 belong to Figure 19 software systems
The synchronizing signal hardware interrupts, interrupted producing by the task manager input capture, the input of three tunnel synchronizing signals DI11, DI12, DI13 be corresponding DI11 sync break (seeing Figure 32), DI12 sync break (seeing Figure 33), three hardware interrupts of DI13 sync break (seeing Figure 34) respectively.When rising edge saltus step or trailing edge saltus step take place the input of every road, all will trigger corresponding sync break, simultaneously according to rising edge saltus step or trailing edge saltus step sign, the IGCT pulse output that control is corresponding.The zero crossing of the respectively corresponding three-phase alternating current input of sync break power supply A phase, B phase, C phase.At zero crossing, according to analog quantity, digital quantity parameter feedback signal, calculate and adjust the output time of optimizing IGCT six road trigger impulses, promptly change the angle of flow of IGCT, regulate the input voltage of three-phase transformer, the output of control high-voltage secondary side.When system mode is shutdown, close all DSP IGCT trigger impulses control pins.When system mode is operation, at first select working method, working method is actual to be the parameter group of system definition, promptly by parameter compositing formulas such as dutycycle, amplitude ratio, flashover frequency, flashover blockade, flashover recovery values, spark, intermittently, pulse is the system default prescription, self-defined n User Defined prescription.When firm start, be initial ascent stage, the IGCT angle of flow slowly increases, and changes steadily.When detecting flashover, for flashover recovers the stage, carry out flashover and recover to handle, the IGCT angle of flow increases fast, and the utmost point rises near the flashover point in the short time.When working, be the step-down rapping stage as electric motor of shaker,, help the vibrated system operation by the step-down rapping setup parameter control IGCT angle of flow.When detecting anti-corona state, reduce the IGCT angle of flow, make electric field withdraw from anti-corona state.When system moves just often, according to concentration of emission, boiler load, regulate the IGCT angle of flow, when the concentration of emission superelevation, increase the IGCT angle of flow, increase power output.When the little discharge standard of concentration of emission, reduce the IGCT angle of flow, reduce power output, saves energy.
Analog acquisition hardware interrupts: see that 4. Figure 35 belongs to Figure 35 software systems
By DSP2812 task manager general purpose timer, as the timing cycle of analog acquisition, timing cycle 312us regularly finishes the collection of all 16 road analog quantity channels of DSP2812, produces the analog acquisition hardware interrupts after collection is finished.After the analog acquisition hardware interrupts produces, at first the data of ADC sampled result register are shifted, preserve sampled value to corresponding RAM parameter region; Secondary voltage, secondary current sampled instantaneous value are pressed into real-time waveform U2, I2 formation, for liquid crystal screen real-time curve figure partly provides video data, in the fixed cycle, screen secondary voltage, the maximum of secondary current sampled instantaneous value, minimum of a value, finish secondary voltage, secondary current peak, valley collection; Again divided by times of collection, finish secondary voltage, the output of secondary current mean value calculation after secondary voltage, the secondary current sampled instantaneous value of fixed cycle added up; Press the angle of flow and preserve secondary voltage, secondary current mean value, generate secondary voltage, secondary current volt-ampere curve correspondence table.Press historical time and preserve secondary voltage, secondary current mean value, generate the history curve database; Calculate output three-phase alternating voltage, three-phase alternating current, temperature of oil in transformer, turbidity signal, boiler load, controller environment temperature, controller range mean value at last.
Claims (2)
1. digital signal processor (DSP) embedded controller for electric dust-removing three-phase high-voltage direct-current power supply, form by hardware system and software systems, it is characterized in that: the hardware system of digital signal processor (DSP) embedded controller for electric dust-removing three-phase high-voltage direct-current power supply comprises the control core cell of DSP, and synchronous signal circuit, trigger impulse circuit, digital quantity output circuit, digital quantity input circuit, analog acquisition, communication connection, man-machine display, operation keyboard, power module, photoelectricity are isolated; Hardware system peripheral interface circuit and the scheme that all adopts photoelectricity to isolate being connected of DSP key control unit; The analog acquisition circuit of hardware system and the analog acquisition hardware interrupts of software systems are finished the collection of external analog amount feedback signal, system is according to the three-phase alternating current input voltage of gathering in real time, the three-phase alternating current input current, secondary voltage, secondary current, rectification becomes the oil temperature, the flue gas turbidity, the boiler load feedback signal, synchronous signal circuit, trigger impulse circuit and synchronizing signal hardware interrupts are finished the three-phase thyristor Regulation Control, synchronizing signal provides three-phase thyristor fiducial time, the trigger impulse circuit is finished the isolation conversion output control of controller pulse signal, communication interface circuit and communication interface hardware interrupt realizing the communication function of controller, and power module provides power supply to whole system.
2. digital signal processor (DSP) embedded controller for electric dust-removing three-phase high-voltage direct-current power supply according to claim 1, it is characterized in that: the normal operation startup of software systems is brought into operation by system power-on reset or keyboard clearance, through transferring to DSP/BIOS operating system management control software interrupt module, hardware interrupts module, task module after the initialization; Provide the utility function interface of DSP2812 chip controls bottom by DSP/BIOS operating system, the thread management of finishing the work, dispatcher software interruption, periodic function and idle and external hardware interrupt and various peripheral equipment managements.The system management hardware interrupts has synchronizing signal hardware interrupts, communication interface hardware interruption, analog acquisition hardware interrupts; The synchronizing signal hardware interrupts is mainly caught square wave rising edge, trailing edge that hardware system three-phase synchronous signal circuit produces, produce and interrupt, according to interrupting and other analog quantity, the output of digital quantity feedback signal control three-phase pulse circuit IGCT trigger impulse, regulate the IGCT angle of flow, change the three-phase input voltage of transformer, thereby change the secondary high-pressure of electric precipitation input.Communication interface hardware interrupts that COM1 communicating interrupt and COM2 communicating interrupt are arranged, and the communication interface circuit is managed; The COM1 communicating interrupt realizes the MODBUS agreement communication of COM1, host computer slave function.COM2 communicating interrupt and host function communication management software interrupt, the MODBUS main frame slave communication function of realization COM2 realizes data sharing between each controller in the passage, realizes the big closed-loop control of controller; Analog acquisition interrupts finishing that three-phase input voltage, three-phase input current, secondary voltage, secondary current, temperature of oil in transformer, turbidity signal, boiler load, analog quantity are standby 1, collection, the calculating of analog quantity standby 2.Systems soft ware interrupts, and is mainly produced the software interrupt of a timing by the system cycle function; The liquid crystal display software interrupt is mainly finished the control of man-machine display interface circuit, exports operational factor, operation real-time curve, history curve, the state of keyboard, the state of parameter modification etc. on LCDs.Digital quantity I/O, keyboard scan software interrupt are mainly finished keyboard state scanning, are finished relative keypad function, and the control output of the status scan of digital quantity input switching circuit, digital quantity output switch circuit; The initialization of control parameter of program and the configuration of dsp chip specific function are finished in initialization; Exception management when software anomaly, produces the watchdog reset signal, makes software restart operation.
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