CN103412785A - Multi-speed telemetering time synchronizing method - Google Patents
Multi-speed telemetering time synchronizing method Download PDFInfo
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- CN103412785A CN103412785A CN2013103033430A CN201310303343A CN103412785A CN 103412785 A CN103412785 A CN 103412785A CN 2013103033430 A CN2013103033430 A CN 2013103033430A CN 201310303343 A CN201310303343 A CN 201310303343A CN 103412785 A CN103412785 A CN 103412785A
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Abstract
The invention provides a multi-speed telemetering time synchronizing method which achieves time synchronization of three peripheral devices. The three peripheral devices comprise a device A, a device B and a device C, wherein the device A is only controlled by a system in an electric reset mode; the device B is controlled by the system in an electric reset and CPU software reset mode; the device C is controlled by the system in an electric reset and CPU software reset mode and needs speed regulation. The method comprises the steps that (1) interrupt intervals of the three devices are structured; (2) electric time interrupt of the three devices is synchronized; (3) when CUP software reset is conducted on the device B and the device C, the release time of CPU software reset of the device B and the device C is controlled so that interrupt can be synchronized again; (4) when speed switching is conducted on the device C, interrupt synchronization is kept through three-level speed synchronization. The multi-speed telemetering time synchronizing method resolves the problems of interrupt source synchronization of the peripheral devices.
Description
Technical field
The invention belongs to the aerospace electron technical field, relate to a kind of many speed remote measurement method for synchronizing time.
Background technology
The growth requirement of, miniaturization integrated according to satellite, China's satellite platform electronic system is just experiencing the transitional period from traditional data handling subsystem to the evolution of integrated electronics subsystem.Take the integrated electronics subsystem as the satellite platform electronic system function synthesized of sign the several functions of original data handling subsystem and other a plurality of subsystems.Except completing traditional remote measuring and controlling function, also needed the various functions such as autonomous management on star, mission planning, the calculating of task level data, unit faces the difficult problem that task is many, pattern is many, and design complexities sharply increases.At present, satellite platform CPU frequency of operation is generally lower than 60MHZ.Due to the increase of satellite electron systemic-function, the raising of index, the kind that interrupt at unit software and hardware interface place, quantity, frequency increase.
When traditional CPU hardware adaptor designs, each function peripheral hardware works alone, interrupt proposing frequency different, each module also can face switching rate pattern at any time, the operations such as software reset occur at any time, in long-term use procedure, the phase relation utmost point between different the interruption is unfixing, estimates to bring difficulty and uncertainty to Software for Design and cpu load.The faults such as interruption, processing delay appear losing in the software and hardware combined debug process of unit.Investigation by analysis, most of due to hardware interrupts too much, excessively frequent, excessively concentrated, software processing power deficiency causes.
For effective head it off, need to be in design during hardware adaptor, make difference in functionality module interruption frequency as far as possible low, interrupt phase relation and fix.Be conducive to Software for Design and estimate the processing time of each task, optimally arrange interrupt priority level, software can have a definite timetable when task scheduling, be convenient to design scheduling strategy, and the time relationship between different task can be determined.
Summary of the invention
The problem that the present invention solves is: overcome the deficiencies in the prior art, a kind of many speed remote measurement method for synchronizing time is provided, solved the synchronous problem in many peripheral interrupts source, being CPU carried out under the local software reset, speed switch instances of peripheral hardware in any possible moment, still can keep the interrupt source of many peripheral hardwares synchronously to reach the synchronous of time, the relative phase relation is constant.
Technical solution of the present invention is:
A kind of many speed remote measurement method for synchronizing time, described method realizes the time synchronized of three kinds of peripheral hardwares, three kinds of equipment comprise: A equipment: the peripheral hardware that controlled by system power-on reset; B equipment: the peripheral hardware that controlled by system power-on reset and CPU software reset; C equipment: be subjected to system power-on reset, CPU software reset to control and need to adjust the peripheral hardware of speed;
Step is as follows:
(1) interrupt interval of regular described three kinds of peripheral hardwares;
(2) make described three kinds of equipment interrupt in the moment powered on synchronous;
(3) when B equipment and C equipment generation CPU software reset, control the CPU software reset's of B equipment and C equipment the release moment, make its interruption again synchronous;
(4), when C equipment generation rate switches, synchronously make C equipment when speed is switched, keep interrupting synchronous by three stage speeds.
The interrupt interval of the regular described three kinds of peripheral hardwares of described step (1) is specially: the interruption frequency of the peripheral hardware that selected interruption frequency is minimum is benchmark, by adjusting the interruption frequency of other peripheral hardware, divide each and interrupt corresponding data length, make each outer interruption frequency be located under various remote measurement speed and mode of operation be reference frequency 2 power doubly, the adjustable value of the speed of remote measurement simultaneously be the minimum remote measurement speed of this peripheral hardware 2 power doubly.
Described step (2) makes described three kinds of equipment interrupt synchronously being specially in the moment powered on: the working time of choosing an A equipment is reference time, other each peripheral hardwares arrange special reset values, the working time that this special reset values makes each peripheral hardware translation on the reference time axle, after guaranteeing to power on, first of each peripheral hardware interrupts proposing constantly consistent.
In described step (3), control the CPU software reset's of B equipment and C equipment the release moment, its interruption synchronously be specially again:
Make the A equipment that the working time is set to reference time produce a control signal, this control signal produces the moment that constantly comes back to the previous clock period of its reset mode for described A equipment, to guarantee for B equipment and C equipment, the soft of CPU sees that the release that resets discharges constantly consistent with electrification reset constantly.
In described step (4), synchronously make C equipment when speed is switched, keep interrupting synchronously being specially by three stage speeds:
First order speed holding register is controlled by electrification reset and speed switching command only, during electrification reset, register value is reverted to initial silent rate value, when the speed switching command arrives, changes the rate value of wherein preserving;
Second level speed holding register is controlled by electrification reset and CPU software reset, when the CPU software reset is effective, register value is reverted to initial silent rate value, receive simultaneously a speed synchronizing signal that makes A equipment that the working time is set to reference time produce, this signal is than next T pre-set time in the moment that interrupts of described A equipment, and time T is less than C equipment minimal disruption gap periods, simultaneously, time T is greater than the moment of third level speed holding register from renewal rate settings the speed holding register of the second level, when described speed synchronizing signal is effective, the rate value that first order speed holding register is preserved is updated in the speed holding register of the second level,
Third level speed holding register is for directly controlling the frequency divider in C equipment, thereby the speed of C equipment is set, third level speed holding register is controlled by electrification reset and CPU software reset, when the CPU software reset is effective, register value is reverted to initial silent rate value, receive simultaneously the control signal that a C equipment produces, this control signal is the speed lead-in signal.Described speed lead-in signal interrupts the rear proposition at once of proposition at every turn in C equipment, guaranteeing when in C equipment, next interruption proposes to be carved into the current interruption proposition time interval constantly is the corresponding cycle of speed after switching.
The present invention's beneficial effect compared with prior art is:
The invention solves the multiple interrupt stationary problem under many peripheral hardwares kind, many remote measurements speed mode of operation, for the CPU Software for Design provides the upper interrupting input of determining of time, the optimizing scheduling that is conducive to software task, avoid waiting not in time problem because the time randomness between multiple interrupt causes losing interruption, interrupt response.
The accompanying drawing explanation
Fig. 1 is many speed remote measurement method for synchronizing time process flow diagram of the present invention;
Fig. 2 interrupts proposing the alignment relation schematic diagram between the many peripheral hardwares of the present invention.
Embodiment
Spaceborne computer need to polymorphic type remote measurement, remote control and communications peripheral interaction data, simultaneously the frequency of operation of each peripheral hardware can change along with user's request.This scheduling that will cause the task of CPU software to be processed faces larger uncertainty.Many speed remote measurement scheduling time synchronous method, when solving many peripheral interrupts of satellite source and descending remote measurement rate variation and peripheral module local reset, interrupt phase place and change, the problem of multitask time lock-out between the multitask that CPU faces.For CPU provides the interruption phase-locking of multitask, guarantee, as Fig. 2, many peripheral interrupts phase alignment wherein, avoid being occurred by the outage of losing that unknown interruption gathering situation causes, and reduces the Software for Design difficulty.
The invention provides a kind of many speed remote measurement method for synchronizing time, as shown in Figure 1, the method realizes the time synchronized of three kinds of peripheral hardwares, and three kinds of equipment comprise: A equipment: the peripheral hardware that controlled by system power-on reset; B equipment: the peripheral hardware that controlled by system power-on reset and CPU software reset; C equipment: be subjected to system power-on reset, CPU software reset to control and need to adjust the peripheral hardware of speed;
Step is as follows:
(1) interrupt interval of regular described three kinds of peripheral hardwares;
In spacecraft platform electronic system, the data communication in CPU and external load, outside unit, machine between the peripheral hardware chip needs coordinating of various abundant functional interface peripheral hardwares.These function peripheral hardwares have comprised that the ML data send, the DS amount gathers and data transmit-receive interface various standards or the model customization.Due to the realization of functions difference, data that each functional module is processed are also different.Some speed is fast, and some speed is slow.Some packets are larger, and some packets are smaller.Realize the synchronous or phase-locking of many signals, its frequency should be identical so, or is the power times of certain frequency 2.Therefore, the first step of the present invention is exactly by Functional Design, by the interrupt interval Regularization of each function peripheral hardware.
The method of the interrupt interval Regularization of each function peripheral hardware is: the interruption frequency of the peripheral hardware that selected interruption frequency is minimum is benchmark, by adjusting the interruption frequency of other peripheral hardware, divide each and interrupt corresponding data length, make each outer interruption frequency be located under various remote measurement speed and mode of operation be reference frequency 2 power doubly, the adjustable value of the speed of remote measurement simultaneously be the minimum remote measurement speed of this peripheral hardware 2 power doubly.
(2) make described three kinds of equipment interrupt in the moment powered on synchronous;
In electronic system design, during electrification reset, often each register is reset to full 0 or complete 1.But due to each peripheral hardware realization of functions difference, if according to conventional reset mode, after electrification reset, during each peripheral hardware proposed, the turn-off time delay discharged that resets must be not quite similar.For addressing this problem, the working time that second step of the present invention just need to be chosen an A equipment is reference time, other each peripheral hardwares arrange special reset values, the working time that this special reset values makes each peripheral hardware translation on the reference time axle, after guaranteeing to power on, first of each peripheral hardware interrupts proposing constantly consistent.Concrete each peripheral hardware initial value that resets, should carry and interrupt proposing calculating constantly according to each peripheral functionality demand.Such as: certain peripheral hardware, due to functional restraint, proposes first interruption after the 1600th clock after powering on, and after the 1024th clock, proposes first interruption after the A device power.So just need to be when electrification reset discharges, buffer status during (1600-1024) individual clock after each buffer status of this peripheral hardware is set to powered and resets, after applying so new reset values, after this device power, namely propose to interrupt after the 1024th clock, realized synchronizeing with A equipment.
(3) the 3rd step in the present invention is to control the release of CPU warm reset, the software reset that this technical finesse CPU may send at any time and discharge, because it discharges randomness constantly, will inevitably upset synchronized relation between each peripheral hardware of being set up by electrification reset.When B equipment and C equipment generation CPU software reset, control the CPU software reset's of B equipment and C equipment the release moment, make its interruption again synchronous; Make the A equipment that the working time is set to reference time produce a control signal, this control signal produces the moment that constantly comes back to the previous clock period of its reset mode for described A equipment, to guarantee for B equipment and C equipment, the soft of CPU sees that the release that resets discharges constantly consistent with electrification reset constantly.Its principle is to discharge constantly by the software reset who controls CPU, under the prerequisite that does not affect the work of A equipment, again reappeared the process of electrification reset, modules has stood on the consistent starting line of electrification reset again, B equipment and C equipment from this constantly, start oneself time counting, after guaranteeing that thus warm reset occurs, all peripheral hardwares, as electrification reset, obtain again synchronous again.
(4), when C equipment generation rate switches, synchronously make C equipment when speed is switched, keep interrupting synchronous by three stage speeds.
For need to be according to the C equipment of direct instruction switching rate (interruption frequency also thereupon switching).Random switching between speed, will affect the interruption alignment relation.Such as, but originally be operated in higher rate, interrupting proposing frequency is 16HZ, and it is 1HZ that the time reference module interrupts proposing frequency, after supposing to reset, two modules have been recovered synchronized relation, in a certain second, when this module is mentioned the 15th interruption, its frequency switching is reduced to 8 times, its interruption frequency is reduced to 2HZ so, just always poor 1/16 second between so latter two interrupts.Last step of the present invention, in order to address this problem.
First order speed holding register is controlled by electrification reset and speed switching command only, during electrification reset, register value is reverted to initial silent rate value, when the speed switching command arrives, changes the rate value of wherein preserving;
Second level speed holding register is controlled by electrification reset and CPU software reset, when the CPU software reset is effective, register value is reverted to initial silent rate value, receive simultaneously a speed synchronizing signal that makes A equipment that the working time is set to reference time produce, this signal is than next T pre-set time in the moment that interrupts of described A equipment, and time T is less than C equipment minimal disruption gap periods, simultaneously, time T is greater than the moment of third level speed holding register from renewal rate settings the speed holding register of the second level, when described speed synchronizing signal is effective, the rate value that first order speed holding register is preserved is updated in the speed holding register of the second level,
Third level speed holding register is for directly controlling the frequency divider in C equipment, thereby the speed of C equipment is set, third level speed holding register is controlled by electrification reset and CPU software reset, when the CPU software reset is effective, register value is reverted to initial silent rate value, receive simultaneously the control signal that a C equipment produces, this control signal is the speed lead-in signal, speed lead-in signal each interruption in C equipment proposes after proposition at once, guaranteeing when in C equipment, next interruption proposes to be carved into the current interruption proposition time interval constantly is the corresponding cycle of speed after switching.
Claims (6)
1. the method for synchronizing time of speed remote measurement more than a kind, it is characterized in that: described method realizes the time synchronized of three kinds of peripheral hardwares, three kinds of equipment comprise: A equipment: the peripheral hardware that controlled by system power-on reset; B equipment: the peripheral hardware that controlled by system power-on reset and CPU software reset; C equipment: be subjected to system power-on reset, CPU software reset to control and need to adjust the peripheral hardware of speed;
Step is as follows:
(1) interrupt interval of regular described three kinds of peripheral hardwares;
(2) make described three kinds of equipment interrupt in the moment powered on synchronous;
(3) when B equipment and C equipment generation CPU software reset, control the CPU software reset's of B equipment and C equipment the release moment, make its interruption again synchronous;
(4), when C equipment generation rate switches, synchronously make C equipment when speed is switched, keep interrupting synchronous by three stage speeds.
2. a kind of many speed remote measurement method for synchronizing time according to claim 1, it is characterized in that: the interrupt interval of the regular described three kinds of peripheral hardwares of described step (1) is specially: the interruption frequency of the peripheral hardware that selected interruption frequency is minimum is benchmark, by adjusting the interruption frequency of other peripheral hardware, divide each and interrupt corresponding data length, make each outer interruption frequency be located under various remote measurement speed and mode of operation be reference frequency 2 power doubly, the adjustable value of the speed of remote measurement simultaneously be the minimum remote measurement speed of this peripheral hardware 2 power doubly.
3. a kind of many speed remote measurement method for synchronizing time according to claim 1, it is characterized in that: described step (2) makes described three kinds of equipment interrupt synchronously being specially in the moment powered on: the working time of choosing an A equipment is reference time, other each peripheral hardwares arrange special reset values, the working time that this special reset values makes each peripheral hardware translation on the reference time axle, after guaranteeing to power on, first of each peripheral hardware interrupts proposing constantly consistent.
4. a kind of many speed remote measurement method for synchronizing time according to claim 1 is characterized in that: in described step (3), control B equipment and C equipment the CPU software reset release constantly, its interruption synchronously is specially again:
Make the A equipment that the working time is set to reference time produce a control signal, this control signal produces the moment that constantly comes back to the previous clock period of its reset mode for described A equipment, to guarantee for B equipment and C equipment, the soft of CPU sees that the release that resets discharges constantly consistent with electrification reset constantly.
5. a kind of many speed remote measurement method for synchronizing time according to claim 1 is characterized in that: by three stage speeds, synchronously make C equipment when speed is switched, keep interrupting synchronously being specially in described step (4):
First order speed holding register is controlled by electrification reset and speed switching command only, during electrification reset, register value is reverted to initial silent rate value, when the speed switching command arrives, changes the rate value of wherein preserving;
Second level speed holding register is controlled by electrification reset and CPU software reset, when the CPU software reset is effective, register value is reverted to initial silent rate value, receive simultaneously a speed synchronizing signal that makes A equipment that the working time is set to reference time produce, this signal is than next T pre-set time in the moment that interrupts of described A equipment, and time T is less than C equipment minimal disruption gap periods, simultaneously, time T is greater than the moment of third level speed holding register from renewal rate settings the speed holding register of the second level, when described speed synchronizing signal is effective, the rate value that first order speed holding register is preserved is updated in the speed holding register of the second level,
Third level speed holding register is for directly controlling the frequency divider in C equipment, thereby the speed of C equipment is set, third level speed holding register is controlled by electrification reset and CPU software reset, when the CPU software reset is effective, register value is reverted to initial silent rate value, receive simultaneously the control signal that a C equipment produces, this control signal is the speed lead-in signal.
6. a kind of many speed remote measurement method for synchronizing time according to claim 5, it is characterized in that: described speed lead-in signal interrupts the rear proposition at once of proposition at every turn in C equipment, and guaranteeing when in C equipment, next interruption proposes to be carved into the current interruption proposition time interval constantly is the corresponding cycle of speed after switching.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106292256A (en) * | 2016-08-10 | 2017-01-04 | 北京空间飞行器总体设计部 | The correction device that a kind of second interrupt interval is controlled |
| CN107608331A (en) * | 2017-08-24 | 2018-01-19 | 北京龙鼎源科技股份有限公司 | The diagnostic method and device of nonrandom interruption |
| CN108377265A (en) * | 2018-02-07 | 2018-08-07 | 南京南瑞继保电气有限公司 | The real-time synchronization method of control protection distributed system in a kind of electric system |
| CN111352648A (en) * | 2018-12-21 | 2020-06-30 | 核动力运行研究所 | Anti-interference output method for switching multiple kinds of software |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106292256A (en) * | 2016-08-10 | 2017-01-04 | 北京空间飞行器总体设计部 | The correction device that a kind of second interrupt interval is controlled |
| CN106292256B (en) * | 2016-08-10 | 2018-12-18 | 北京空间飞行器总体设计部 | The controllable correction device of a kind of second interrupt interval |
| CN107608331A (en) * | 2017-08-24 | 2018-01-19 | 北京龙鼎源科技股份有限公司 | The diagnostic method and device of nonrandom interruption |
| CN108377265A (en) * | 2018-02-07 | 2018-08-07 | 南京南瑞继保电气有限公司 | The real-time synchronization method of control protection distributed system in a kind of electric system |
| CN108377265B (en) * | 2018-02-07 | 2020-10-16 | 南京南瑞继保电气有限公司 | Real-time synchronization method for control protection distributed system in power system |
| CN111352648A (en) * | 2018-12-21 | 2020-06-30 | 核动力运行研究所 | Anti-interference output method for switching multiple kinds of software |
| CN111352648B (en) * | 2018-12-21 | 2023-09-08 | 核动力运行研究所 | Anti-interference output method for switching multiple software |
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