CN101753117B - Delay unit in ring oscillator and correlation method thereof - Google Patents
Delay unit in ring oscillator and correlation method thereof Download PDFInfo
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- CN101753117B CN101753117B CN 200810183418 CN200810183418A CN101753117B CN 101753117 B CN101753117 B CN 101753117B CN 200810183418 CN200810183418 CN 200810183418 CN 200810183418 A CN200810183418 A CN 200810183418A CN 101753117 B CN101753117 B CN 101753117B
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Abstract
The invention discloses a delay unit in a ring oscillator and a correlation method thereof, so as to lead a voltage controlled oscillator to provide fixed frequency adjustment constant. The delay unit comprises a differential amplifier, a switching capacitor bank and a frequency adjustment parameter equalizer, wherein the differential amplifier comprises a transistor differential pair, a first load and a second load; the switching capacitor bank is provided with a plurality of controlled capacitor paths and selectively connects the controlled capacitor paths on an anode output end or a cathode output end according to a capacitor control signal; and the frequency adjustment parameter equalizer comprises an adjustable current source and can adjust the adjustable current source according to a current control signal so as to control the frequency adjustment parameter equalizer to compensate the current of the first load and the second load.
Description
Technical field
The present invention relates to a kind of delay cell and correlation technique, refer to delay cell and correlation technique in a kind of ring oscillator especially.
Background technology
Please with reference to Fig. 1, it is a convention phase-locked loop sketch map.The phase-locked loop comprises phase frequency detector (Phase Frequency Detector) 10, charge pump (Charge Pump) 20, loop filter (Loop Filter) 30, voltage-controlled oscillator (VCO) (Voltage Controlled Oscillator) 40, frequency elimination unit (Frequency Dividing Unit) 45.Wherein, have the reference signal of a reference frequency Fref, for example produce with reference to oscillator (not illustrating), and the frequency elimination signal that this reference signal and frequency elimination unit 45 are exported is imported this phase frequency detector 10 simultaneously by one.This phase frequency detector 10 can be detected phase place and the difference of frequency between this reference signal and this frequency elimination signal, afterwards, exports a phase signal (Phase Difference Signal) to this charge pump 20.Then, charge pump 20 produces according to the size of this phase signal and is relevant to one of this phase signal and outputs current to this loop filter 30.Then, these loop filter 30 mild (smooth) these output currents, and convert a voltage control signal into to this voltage-controlled oscillator (VCO) 40.This voltage-controlled oscillator (VCO) 40 produces a voltage-controlled output signal (voltage controlled signal) according to this voltage control signal, and this voltage-controlled output signal has a voltage controlled frequency Fvco.Then, this frequency elimination unit 45 receives this voltage-controlled output signals, and will this voltage-controlled output signal carry out with voltage controlled frequency Fvco divided by the action of N after generation frequency elimination signal, wherein, N is integer and Fvco=N*Fref.
In general, the type of voltage-controlled oscillator (VCO) 40 can be divided into LC oscillator and ring oscillator (ringoscillator).The advantage of LC oscillator is for having low phase noise (low phase noise), and shortcoming is big, the narrow frequency adjustment range (tuning range) of layout (layout) area.The advantage of ring oscillator is little, the wide frequency adjustment range of layout area, and shortcoming is to have bigger phase noise.For IC design person, the voltage controlled oscillator in the phase-locked loop utilizes ring oscillator to realize.If IC design person will realize with the LC oscillator, then must increase pin position (pin) separately in order to connect Inductive component.
Please with reference to Fig. 2, it is the ring oscillator circuit diagram.The delay cell that ring oscillator comprises multistage (stage) (delay cell); The delay cell of each grade voltage control signal all capable of using comes the phase shift (phase shift) between control input end and the output, produces the frequency of wanting via the adjustment voltage control signal; And the output of previous stage delay cell is connected to the input of next stage delay cell.
Can know that by Fig. 2 delay cell 102,104,106 can be for constructing identical differential amplifier (differential amplifier), and be connected to the phase shift that a voltage control signal (Vc) comes control lag unit 102,104,106.The cathode output end (Vo+) of delay cell 102,104,106 is connected to the electrode input end (Vin+) of its next stage delay cell respectively, and the cathode output end (Vo-) of delay cell 102,104,106 is connected to the negative input (Vin-) of its next stage respectively; At last, the cathode output end of delay cell 106 (Vo+) is connected to the negative input (Vin-) of delay cell 102, and the cathode output end of delay cell 106 (Vo-) is connected to the electrode input end (Vin+) of delay cell 102.
Certainly; Above-mentioned delay cell is not limited to differential amplifier; The circuit of single input, the for example anti-phase refining (inverter chain) formed of inverter (inverter) also can be used as the delay cell of voltage controlled oscillator and utilizes voltage control signal to come the phase shift of control lag unit.
In general, voltage controlled oscillator is a frequency adjustment constant (Kvco) with its voltage controlled frequency scope and the constant definition of controlling voltage (Δ f/ Δ V).And the voltage controlled frequency of convention voltage controlled oscillator can't provide the frequency adjustment constant of a fixed value; That is to say that frequency adjustment constant (Kvco) can change with the change of control voltage, in designer's angle; When frequency adjustment constant can change along with the variation of control voltage; The circuit design of whole phase-locked loop can be very complicated, especially is connected in the previous stage circuit unit of voltage controlled oscillator in the phase-locked loop, and the design meeting of loop filter just is very complicated.That is when frequency adjustment constant can't be kept fixed value, the noise of loop filter can improve.Therefore, a delay cell that is used in the ring oscillator is provided, makes voltage controlled oscillator can provide fixing frequency adjustment constant (Kvco) to be the main purpose of the present invention.
Summary of the invention
Technical problem to be solved by this invention provides delay cell and the correlation technique in a kind of ring oscillator, makes voltage controlled oscillator that fixing frequency adjustment constant can be provided.
In order to solve above technical problem, the invention provides following technical scheme:
The present invention provides the delay cell in a kind of ring oscillator, comprising: differential amplifier, in order to produce differential output; The switch-capacitor storehouse is coupled to differential amplifier, in order to according to capacitance control signal capacitance to be provided; And frequency adjustment equalization parameter device is coupled to differential amplifier, in order to produce adjustable electric current according to current controling signal.
The present invention more provides a kind of method of adjusting the frequency of operation of ring oscillator, comprising: the coarse adjustment frequency of operation is on a plurality of frequency bands; Deng a plurality of frequency adjustment constants of changing on those frequency bands; And, the fine setting frequency of operation.
Delay cell in the ring oscillator that the present invention adopts and correlation technique utilize differential amplifier that the N transistor npn npn realizes and collocation switch-capacitor storehouse and frequency adjustment equalization parameter device to move, and make voltage controlled oscillator that fixing frequency adjustment constant can be provided.
Description of drawings
Fig. 1 is the phase-locked loop sketch map.
Fig. 2 is the ring oscillator circuit diagram.
The ring oscillator circuit diagram of Fig. 3 (a) for having broadband rate adjusting range.
Fig. 3 (b) is for having the frequency adjustment figure of broadband rate adjusting range ring oscillator.
Fig. 4 (a) is the delay cell in the ring oscillator of the specific embodiment of the invention.
Fig. 4 (b) is for utilizing the frequency adjustment figure of the ring oscillator that delay cell of the present invention realizes.
Fig. 5 is according to the adjustable current source circuit figure of the specific embodiment of the invention.
Fig. 6 is according to specific embodiment of the invention switch-capacitor storehouse circuit diagram.
Fig. 7 is for adjust the method flow diagram of the frequency of operation of ring oscillator according to an embodiment of the invention.
[primary clustering symbol description]
Each assembly that is comprised during this case is graphic is listed as follows:
10 phase frequency detectors, 20 charge pumps
30 loop filters, 40 voltage controlled oscillators
45 frequency elimination unit, 102,104,106 delay cells
110 ring oscillators, 112,122,132 differential amplifiers
114,124,134 switch-capacitor storehouses
Embodiment
Please with reference to Fig. 3 (a), it is the ring oscillator circuit diagram with broadband rate adjusting range.Ring oscillator 110 comprises multistage delay cell (delay cell); Each delay cell comprises: a differential amplifier and switches electric capacity storehouse (switched capacitance bank), and the delay cell of each grade voltage control signal all capable of using (Vc) comes the phase shift between control input end and the output.Comprise a plurality of electric capacity in the switch-capacitor storehouse, and capacitance control signal control capacitance device is connected between differential amplifier cathode output end and the earth terminal, perhaps between differential amplifier cathode output end and the earth terminal.
First differential amplifier 112 in three delay cell, second differential amplifier 122, the 3rd differential amplifier 132 all are connected to the phase shift that a voltage control signal (Vc) comes the control lag unit.
The cathode output end of first differential amplifier 112 is connected to the electrode input end of second differential amplifier 122, and the cathode output end of first differential amplifier 112 is connected to the negative input of second differential amplifier 122; The cathode output end of second differential amplifier 122 is connected to the electrode input end of the 3rd differential amplifier 132, and the cathode output end of second differential amplifier 122 is connected to the negative input of the 3rd differential amplifier 132; At last, the cathode output end of the 3rd differential amplifier 132 is connected to the negative input of first differential amplifier 112, and the cathode output end of the 3rd differential amplifier 132 is connected to the electrode input end of first differential amplifier 112.
Switch-capacitor storehouse 114,124,134 in three delay cell has identical structure.For instance, comprise four capacitor C1, C2, C3, C4 in the first electric capacity storehouse 114, wherein, first switch SW 1 can be controlled the first capacitor C1 and be connected in differential amplifier cathode output end and earth terminal; Second switch SW2 can control the second capacitor C2 and be connected in differential amplifier cathode output end and earth terminal; The 3rd switch SW 3 can be controlled the 3rd capacitor C3 and be connected in differential amplifier cathode output end and earth terminal; And the 4th switch SW 4 can be controlled the 4th capacitor C4 and be connected in differential amplifier cathode output end and earth terminal.Three switch-capacitor storehouses 114,124,134 receive capacitance control signals, and for instance, when capacitance control signal was controlled first switch SW 1 and closed (close), first switch SW 1 in three switch-capacitor storehouses 114,124,134 all was closed.
In general, in delay cell, adding the switch-capacitor storehouse can be so that ring oscillator has broadband rate adjusting range.Please with reference to Fig. 3 (b), it is the frequency adjustment figure with broadband rate adjusting range ring oscillator, and the longitudinal axis is the frequency of operation of ring oscillator, and transverse axis is voltage control signal (Vc).By knowing among the figure, when the equivalent capacitance of delay cell output is big more (number of capacitor C1, C2, C3, C4 parallel connection more for a long time), the phase shift between delay cell input and the output is big more.Therefore, the number that utilizes control capacitance device C1, C2, C3, C4 parallel connection promptly can coarse adjustment (coarse tune) ring oscillator frequency of operation.As shown in the figure, when the switch-capacitor storehouse provided different capacitance, ring oscillator can be gone up the adjustment frequency of operation at different frequency band (band).Control the switch-capacitor storehouse via capacitance control signal and carry out after the frequency band of ring oscillator selects, voltage control signal (Vc) can carry out the fine setting (fine tine) of ring oscillator frequency of operation.
The ring oscillator of above-mentioned Fig. 3 (a) has broadband rate adjusting range, yet the frequency of ring oscillator adjustment constant (Kvco) is not a definite value, and the frequency adjustment constant (Kvco) that each frequency band provided is neither together, can cause the noise of loop filter to improve.
Please with reference to Fig. 4 (a), it is the delay cell in the ring oscillator according to a preferred embodiment of the present invention, can be applied to ring oscillator, comprises multistage delay cell, and each delay cell has the structure of Fig. 4 (a).Delay cell comprises: differential amplifier, switch-capacitor storehouse and frequency adjustment equalization parameter device (Kvco equalizer).
Differential amplifier comprises that transistor is differential to (differential pair), the first load R1 and the second load R2.Transistor is differential to comprising: the first current source Iss1, a PMOS transistor M1, the 2nd PMOS transistor M2 and the 3rd PMOS transistor M3.The first current source Iss1 is connected between voltage source (Vdd) and the 3rd PMOS transistor M3 source electrode; The gate of the 3rd PMOS transistor M3 can be imported the voltage control signal
or a bias voltage of an anti-phase; The 3rd PMOS transistor M3 drain is connected to the source electrode of a PMOS transistor M1 and the 2nd PMOS transistor M2; The one PMOS transistor M1 gate is the differential right electrode input end of transistor (Vin+); The gate of the 2nd PMOS transistor M2 is the differential right negative input of transistor (Vin-); The one PMOS transistor M1 drain is the differential right cathode output end of transistor (Vo+); The 2nd PMOS transistor M2 drain is the differential right cathode output end of transistor (Vo-).Moreover the first load R1 is connected between differential right cathode output end of transistor (Vo+) and the ground connection; The second load R2 is connected between differential right cathode output end of transistor (Vo-) and the ground connection.
Switch-capacitor comprises plurality of capacitors in the storehouse, for example four capacitor C1, C2, C3, C4, and first switch SW 1 can be controlled the first capacitor C1 and be connected in differential amplifier cathode output end and earth terminal; Second switch SW2 can control the second capacitor C2 and be connected in differential amplifier cathode output end and earth terminal; The 3rd switch SW 3 can be controlled the 3rd capacitor C3 and be connected in differential amplifier cathode output end and earth terminal; And the 4th switch SW 4 can be controlled the 4th capacitor C4 and be connected in differential amplifier cathode output end and earth terminal.Moreover, utilize capacitance control signal optionally to close or open four switch SW 1, SW2, SW3, SW4.
Frequency adjustment equalization parameter device comprises an adjustable current source Iss2, the 4th PMOS transistor M4, the 5th PMOS transistor M5, the 6th PMOS transistor M6.Adjustable current source Iss2 is connected between voltage source (Vdd) and the node a, and the 6th PMOS transistor M6 source electrode is connected to node a; The gate of the 6th PMOS transistor M6 can input voltage control signal (Vc); The 6th PMOS transistor M6 drain is connected to the source electrode of the 4th PMOS transistor M4 and the 5th PMOS transistor M5; The 4th PMOS transistor M4 gate is connected to the 5th PMOS transistor M5 drain and the differential right cathode output end of transistor (Vo-); The 5th PMOS transistor M5 gate is connected to the 4th PMOS transistor M4 drain and the differential right cathode output end of transistor (Vo+).
In this embodiment; When the equivalent capacitance of delay cell output is big more (number of capacitor C1, C2, C3, C4 parallel connection more for a long time), the adjustable current source Iss2 in the frequency adjustment equalization parameter device can provide the big more current compensation first load R1 and the second load R2.That is to say that the current controling signal of control capacitance control signal and adjustable current source Iss2 makes that the electric current of the adjustable current source Iss2 in the frequency adjustment equalization parameter device was also big more when switch-capacitor storehouse output capacitance value was big more simultaneously.
Please with reference to Fig. 4 (b), it is the frequency adjustment figure that uses the ring oscillator of delay cell of the present invention, and the longitudinal axis is the frequency of operation of ring oscillator, and transverse axis is voltage control signal (Vc).By can knowing among the figure, because the capacitance of delay cell output equivalence is when big more (number of capacitor C1, C2, C3, C4 parallel connection more for a long time), the electric current of the adjustable current source Iss2 in the frequency adjustment equalization parameter device is big more.When the switch-capacitor storehouse provided different capacitance, ring oscillator can adjusted frequency of operation on the frequency band arbitrarily, and adjustment offset current (Iss2) makes the frequency adjustment constant (Kvco) of the ring oscillator of all frequency bands maintain definite value substantially.Therefore; The ring oscillator that delay cell of the present invention is formed has fixing frequency adjustment constant (Kvco); For example, can utilize circuit simulation to obtain the design load of size of current and capacitance, can make the noise of loop filter and circuit complexity reduce effectively in circuit design stage.
Please with reference to Fig. 5, it is the adjustable current source Iss2 of a present invention circuit diagram.Comprise among the adjustable current source Iss2 and decide electric current feed lines (Ir1) and a plurality of controlled current flow paths (Ir2～Ir4) be connected between voltage source (Vdd) and the node a.Deciding has one first resistance r1 on the electric current feed lines (Ir1), make that deciding electric current feed lines (Ir1) can provide and decide electric current.(respectively there are one second resistance r2, one the 3rd resistance r3, one the 4th resistance r4 in a plurality of controlled current flow paths on the Ir2～Ir4), utilize transistor switch SWIR2, SWIR3, SWIR4 to control a plurality of controlled current flow paths (Ir2～Ir4) be connected between voltage source (Vdd) and the node a.That is to say the output current that current controling signal can oxide-semiconductor control transistors switch SW IR2, SWIR3, SWIR4 control adjustable current source Iss2; For instance, as three transistor switch SWIR2, SWIR3, when SWIR4 closes, the output current of adjustable current source Iss2 is Iss2=Ir1+Ir2+Ir3+Ir4.Preferably, resistance r1, r2, r3, r4 system utilize the P transistor of long-channel (long channel) to realize that P transistor gate and source electrode interconnect, and source electrode and drain then form two ends of resistance.
Please with reference to Fig. 6, it is a switch-capacitor of the present invention storehouse circuit diagram.The switch-capacitor storehouse comprises a plurality of controlled capacitance path; Wherein, there are first capacitor C 1, the 3rd capacitor C 3 to utilize transistor switch SW1, SW3 to control controlled capacitance path and be connected between differential right cathode output end of transistor (Vo+) and the earth terminal on the first and the 3rd controlled capacitance path; And, have second capacitor C 2, the 4th capacitor C 4 to utilize transistor switch SW2, SW4 to control controlled capacitance path and be connected between differential right cathode output end of transistor (Vo-) and the earth terminal on the second and the 4th controlled capacitance path.Utilize capacitance control signal can oxide-semiconductor control transistors switch SW 1, SW2, SW3, SW4 control the capacitance of switch capacitor output; For instance, as four transistor switch SW1, SW2, SW3, when SW4 all closes, the capacitance of switch-capacitor storehouse output is C1+C2+C3+C4.Preferably, capacitor C 1, C2, C3, C4 system utilize the N transistor npn npn to realize, its source electrode and drain interconnect, and gate and drain then form two ends of electric capacity.
Fig. 7 is for adjust the method flow diagram of the frequency of operation of ring oscillator according to an embodiment of the invention; Ring oscillator comprises a plurality of delay cells, and this flow process is from step 700 beginning, in step 720; The coarse adjustment frequency of operation; For example, utilize the switch-capacitor storehouse that different capacitances is provided, make ring oscillator on different frequency bands, adjust frequency of operation; In step 740; Deng the frequency adjustment constant of changing on the different frequency bands, make that the frequency adjustment constant (Kvco) on each frequency band is identical substantially, for example; Frequency adjustment constant on the electric current that affords redress makes each frequency band in the switch-capacitor storehouse is identical substantially; Preferably, when capacitance was big more, offset current was also big more; In step 760, the fine setting frequency of operation, for example, the position standard of control voltage control signal (Vc) is carried out the fine setting of ring oscillator frequency of operation.
The delay cell of above embodiment is to utilize differential amplifier that the P transistor npn npn realizes and collocation switch-capacitor storehouse and frequency adjustment equalization parameter device to describe.Yet the personage who is familiar with this skill also can utilize differential amplifier that the N transistor npn npn realizes and collocation switch-capacitor storehouse and frequency adjustment equalization parameter device to move.
In sum, though the present invention discloses as above with preferred embodiment, so it is not in order to limit the present invention; Anyly have the knack of this art; Do not breaking away from the spirit and scope of the present invention, when can doing various changes and retouching, so protection scope of the present invention should with claim the person of being defined be as the criterion.
Claims (13)
1. the delay cell in the ring oscillator is characterized in that it comprises:
One differential amplifier is in order to produce a differential output;
One switches the electric capacity storehouse, is coupled to this differential amplifier, in order to according to a capacitance control signal one capacitance to be provided; And
One frequency adjustment equalization parameter device; Be coupled to this differential amplifier; In order to produce an adjustable electric current according to a current controling signal; Comprise an adjustable current source in this frequency adjustment equalization parameter device, in order to produce this adjustable electric current according to this current controling signal and to control the size of current that this frequency adjustment equalization parameter device compensates first load and second load;
Said current controling signal is related with said capacitance control signal; Said frequency adjustment constant etc. is changed in a plurality of frequency bands; Control this capacitance control signal and this current controling signal simultaneously; Make when this switch-capacitor storehouse output capacitance value is big more that this adjustable electric current that this frequency adjustment equalization parameter device is produced is also big more.
2. the delay cell in the ring oscillator as claimed in claim 1 is characterized in that, this differential amplifier comprises that a transistor is differential to, this first load and this second load; Wherein, this transistor is differential to having an electrode input end, a negative input, a cathode output end and a cathode output end, and this first load is connected in this cathode output end, and this second load is connected in this cathode output end.
3. the delay cell in the ring oscillator as claimed in claim 1; It is characterized in that; Comprise a plurality of controlled capacitance path in this switch-capacitor storehouse, this switch-capacitor storehouse can optionally be connected in this cathode output end or this cathode output end with those controlled capacitance path according to this capacitance control signal.
4. the delay cell in the ring oscillator as claimed in claim 2 is characterized in that, this transistor is differential to comprising:
One first current source;
One the one PMOS transistor;
One the 2nd PMOS transistor; And
One the 3rd PMOS transistor;
Wherein, this first current source is connected between a voltage source and the 3rd PMOS transistor source; The transistorized gate of the 3rd PMOS can be imported the voltage control signal or a bias voltage of an anti-phase; The 3rd PMOS transistor drain is connected to the transistorized source electrode of a PMOS transistor AND gate the 2nd PMOS; The one PMOS transistor gates is this electrode input end very; The transistorized gate of the 2nd PMOS is this negative input; The one PMOS transistor drain is that this cathode output end and the 2nd PMOS transistor drain are this cathode output end.
5. the delay cell in the ring oscillator as claimed in claim 3 is characterized in that, each controlled capacitance path comprises a transistor switch and an electric capacity, and this transistor switch can be according to optionally parallelly connected this electric capacity of this capacitance control signal to this switch-capacitor storehouse.
6. the delay cell in the ring oscillator as claimed in claim 5 is characterized in that, this transistor switch and this electric capacity system are made up of the N transistor npn npn.
7. the delay cell in the ring oscillator as claimed in claim 1 is characterized in that, this frequency adjustment equalization parameter device comprises an adjustable current source, one the 4th PMOS transistor, one the 5th PMOS transistor, one the 6th PMOS transistor; Wherein, this adjustable current source is connected between a voltage source and the node, and the 6th PMOS transistor source is connected to this node; The transistorized gate of the 6th PMOS can be imported a voltage control signal; The 6th PMOS transistor drain is connected to the transistorized source electrode of the 4th PMOS transistor AND gate the 5th PMOS; The 4th PMOS transistor gate is connected to the 5th PMOS transistor drain and this cathode output end; The 5th PMOS transistor gate is connected to the 4th PMOS transistor drain and this cathode output end.
8. the delay cell in the ring oscillator as claimed in claim 1 is characterized in that, this adjustable current source comprises that certain electric current feed lines and a plurality of controlled current flow paths are connected in a voltage source.
9. the delay cell in the ring oscillator as claimed in claim 8; It is characterized in that; Should decide the electric current feed lines certain electric current can be provided; And a resistance is respectively arranged on a plurality of controlled current flow paths, and optionally decide the electric current feed lines in this in those controlled current flow paths of parallel connection via a current controling signal.
10. the delay cell in the ring oscillator as claimed in claim 9 is characterized in that, this resistance system is a long-channel PMOS transistor.
11. a method of adjusting the ring oscillator frequency of operation is characterized in that it comprises:
This frequency of operation of coarse adjustment is on a plurality of frequency bands, and this coarse steps system utilizes one to switch the electric capacity storehouse one capacitance is provided, with this frequency of operation of coarse adjustment on those frequency bands;
Deng a plurality of frequencies adjustment constants of changing on those frequency bands, these change steps system provides the frequency adjustment constant of an offset current on making each frequency band in this switch-capacitor storehouse identical substantially, and when this capacitance was big more, this offset current was also big more; And
Finely tune this frequency of operation, the position of this trim step system control one voltage control signal is accurate with the fine setting frequency of operation.
12. the method for adjustment ring oscillator frequency of operation as claimed in claim 11 is characterized in that, these change step systems etc. change the frequency adjustment constant on those frequency bands, make that the frequency adjustment constant system on each frequency band is identical substantially.
13. the method for adjustment ring oscillator frequency of operation as claimed in claim 11 is characterized in that this ring oscillator comprises a plurality of delay cells.
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| CN 200810183418 CN101753117B (en) | 2008-12-16 | 2008-12-16 | Delay unit in ring oscillator and correlation method thereof |
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| CN 200810183418 CN101753117B (en) | 2008-12-16 | 2008-12-16 | Delay unit in ring oscillator and correlation method thereof |
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| CN101753117B true CN101753117B (en) | 2012-07-25 |
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| US9081398B2 (en) * | 2012-03-23 | 2015-07-14 | Fairchild Semiconductor Corporation | Adaptive startup control for boost converter |
| DE102013204272A1 (en) * | 2013-03-12 | 2014-09-18 | Robert Bosch Gmbh | Method for detecting a correlation |
| WO2015094374A1 (en) * | 2013-12-20 | 2015-06-25 | Intel Corporation | Apparatus for charge recovery during low power mode |
| US20150346037A1 (en) * | 2014-05-29 | 2015-12-03 | Infineon Technologies Ag | Integrated temperature sensor |
| US10332960B2 (en) * | 2016-12-06 | 2019-06-25 | Globalfoundries Inc. | Digitally controlled varactor structure for high resolution DCO |
| CN106603039B (en) * | 2016-12-19 | 2021-01-01 | 湖南国科微电子股份有限公司 | Delay unit and annular voltage-controlled oscillator comprising same |
| US10313165B2 (en) * | 2017-03-08 | 2019-06-04 | Credo Technology Group Limited | Finite impulse response analog receive filter with amplifier-based delay chain |
| CN108155891B (en) * | 2017-12-22 | 2021-08-31 | 中国电子科技集团公司第五十四研究所 | Clock generating circuit |
| CN109728799B (en) * | 2019-04-01 | 2019-06-18 | 荣湃半导体（上海）有限公司 | A kind of High Speed Analog latch |
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| WO2000070766A1 (en) * | 1999-05-19 | 2000-11-23 | Parthus Technologies Plc | Method and apparatus for pll with improved jitter performance |
| CN101102110A (en) * | 2007-07-10 | 2008-01-09 | 中国人民解放军国防科学技术大学 | Differential circuit delay unit for high-speed voltage control oscillator |
| US7400183B1 (en) * | 2005-05-05 | 2008-07-15 | Cypress Semiconductor Corporation | Voltage controlled oscillator delay cell and method |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2000070766A1 (en) * | 1999-05-19 | 2000-11-23 | Parthus Technologies Plc | Method and apparatus for pll with improved jitter performance |
| US7400183B1 (en) * | 2005-05-05 | 2008-07-15 | Cypress Semiconductor Corporation | Voltage controlled oscillator delay cell and method |
| CN101102110A (en) * | 2007-07-10 | 2008-01-09 | 中国人民解放军国防科学技术大学 | Differential circuit delay unit for high-speed voltage control oscillator |
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