CN101746714A - Preparation method for metal Nano structure array - Google Patents
Preparation method for metal Nano structure array Download PDFInfo
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- CN101746714A CN101746714A CN200910226780A CN200910226780A CN101746714A CN 101746714 A CN101746714 A CN 101746714A CN 200910226780 A CN200910226780 A CN 200910226780A CN 200910226780 A CN200910226780 A CN 200910226780A CN 101746714 A CN101746714 A CN 101746714A
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Abstract
The invention discloses a preparation method for a metal Nano structure array. The preparation method adopts a silicon slice as a substrate, and silica Nano spheres are coated on the surface of the substrate of the silicon slice in a rotary manner after being uniformly dispersed so as to form a single-layer sequential silica Nano sphere compact array; a single-layer sequential silica Nano sphere non-compact array is formed by adopting an induction coupling plasma etching method; a metal layer is deposited on the non-compact array and the silica Nana spheres are removed, so as to obtain a metal Nano hole array reticle mask; corrosion is carried out on the silicon slice by combining different corroding properties of different silicon slices, so as to obtain Nano structure array templates with different characteristics in shape and appearance after the reticle mask is removed; finally, different metal materials are deposited on the templates, and the multi-material metal Nano structure array with diversified characteristics in shape and appearance can be obtained after the templates are separated. With the advantages of low cost, high efficiency, good compatibility and the like, the preparation method provides convenience for studying the optical nature, magnetic performance, catalytic property and the like of the metal Nano structure array.
Description
Technical field
The present invention relates to a kind of Ultrastructural preparation method, relate in particular to a kind of preparation method of metal Nano structure.
Background technology
In recent years, metal Nano structure array (noble metal nano array of structures particularly, for example gold, silver etc.) is because its unique physics, chemical property are just causing increasing concern.Because the plasma resonance that surperficial free electron collective excitation produced makes metal Nano structure arrays such as gold, silver, copper have good optical characteristics, and can effectively be regulated by the change of monomer size, pattern and array combination state thereof, therefore they strengthen to compose on optical light filter, phasmon fiber waveguide, biological/chemical sensor, surface has using value very widely with fields such as backing materials, and the controlled preparation of two-dimensional metallic nano-structure array will be the key in this field.
At present, nano-structure array prepares by " from top to bottom " or " from bottom to top " technology usually." from top to bottom " technology mainly refers to realize that by technology such as photoetching figure shifts, and realizes the manufacturing of nanostructured by process meanses such as etchings, but this method is subject to the size of photoetching resolution, and price is also relatively more expensive; " from bottom to top " technology mainly contains self assembly, nano-manipulation, gene control growing technology etc., adopt these method costs lower, but it is also low to make efficient, and is difficult to realize the controllable growth of nanostructured.
For two-dimensional metallic nano-structure array and The Study of Manufacturing Technology and improvement, how to solve the problem such as shape characteristic diverse problems, dimensional problem, array homogeneity question, array local defect of metal nano monomer particle, have important in theory and realistic meaning, this also is the huge challenge that those skilled in the art face simultaneously.
Summary of the invention
The technical problem to be solved in the present invention is to overcome the deficiencies in the prior art, provides a kind of highly versatile, wide adaptability, compatibility is good, efficient is high, cost is low and the preparation method of the metal Nano structure array that can facilitate for research metal Nano structure array characteristic.
For solving the problems of the technologies described above, the technical scheme that the present invention proposes is a kind of preparation method of metal Nano structure array, may further comprise the steps:
(1) the fine and close arrangement of the orderly silica nanosphere of preparation individual layer: prepare the silica nanosphere sol system earlier, this sol system is spun on a silicon chip surface, form the fine and close arrangement of the orderly silica nanosphere of individual layer at silicon chip surface;
(2) non-fine and close arrangement of the orderly silica nanosphere of preparation individual layer: little quarter by adopting inductively coupled plasma (ICP) etching method will form described pycnomorphous silica nanosphere, obtain non-fine and close arrangement of the orderly silica nanosphere of individual layer at silicon chip surface;
(3) preparation metal nano-void array mask: depositing metallic films on non-fine and close arrangement of the orderly silica nanosphere of described individual layer, metal film deposition thickness is less than described silica nanosphere particle diameter, the corrode silicon dioxide nanosphere obtains the metal nano-void array mask at silicon chip surface then;
(4) preparation nano-structure array masterplate: as etching mask, utilize the etching characteristic of silicon chip that described silicon chip is corroded with described metal nano-void array mask, remove the metal nano-void array mask then, obtain the nano-structure array masterplate;
(5) preparation metal Nano structure array: will be shaped is deposited on the described nano-structure array masterplate with metal, and described nano-structure array masterplate is separated with the metals deposited layer, obtains metal Nano structure array.
The technical scheme that the invention described above proposes combines the silicon etching process of maturation and emerging nanosphere photoetching technique, this technical scheme can be utilized the etching characteristic of different crystal orientations silicon chip dexterously, produce the nano-structure array masterplate of different-shape feature, deposit is with the metal material of unlike material again, with the metal Nano structure array that can prepare multiple shape characteristic, various material after masterplate separates.
As the optimization to technique scheme, in the described silica nanosphere sol system, the average grain diameter D of silica nanosphere is preferably 10nm～5000nm, and monodispersity is preferably less than 5%.
As the optimization to technique scheme, described silicon chip is meant (111) crystal orientation, (110) crystal orientation or (100) crystal orientation silicon chip; Described nano-structure array masterplate is meant the octahedra array masterplate of nanometer, nanoprisms volume array masterplate, nanometer pyramid array masterplate, nanometer cap array masterplate, nanometer array of cylinders masterplate or nanometer cone array masterplate;
In described preparation nano-structure array masterplate step, utilize the etching characteristic of silicon chip that described silicon chip is corroded specifically and be meant: the octahedra array masterplate of described nanometer, nanoprisms volume array masterplate, nanometer pyramid array masterplate are to utilize the anisotropic wet etching process respectively described (111) crystal orientation, (110) crystal orientation, (100) crystal orientation silicon chip to be prepared after corroding; Described nanometer cap array masterplate is to prepare after utilizing the isotropism wet corrosion technique that described (100) crystal orientation silicon chip is corroded; Described nanometer array of cylinders masterplate or nanometer cone array masterplate are to prepare after utilizing the inductively coupled plasma dry corrosion process that described (100) crystal orientation silicon chip is corroded.
Among the preparation method of above-mentioned metal Nano structure array, the solvent of described silica nanosphere sol system is preferably the mixture of ethanol or deionized water or ethanol and deionized water, and the volume ratio of described silica nanosphere and described solvent is preferably 0.2～0.4.Evaporation rate when selecting for use suitable solvent composition and concentration can regulate the viscosity of silica nanosphere sol system and spin coating is convenient to follow-up spin coating and is prepared that the orderly silica nanosphere of individual layer is fine and close to be arranged.
As optimization to technique scheme, in the fine and close alignment step of the orderly silica nanosphere of preparation individual layer, rotating speed is 1500rpm～6000rpm (general difference according to silica nanosphere particle diameter and solvent composition in the concrete practice is selected different rotating speeds for use) during described spin coating, and rotational time is 10min～20min.
As the optimization to technique scheme, in the non-fine and close alignment step of the preparation orderly silica nanosphere of individual layer, described inductively coupled plasma etching method specifically is meant: in inductive couple plasma etching vacuum chamber, with fluoroform (CHF
3) and argon gas (Ar
2) for source of the gas described silica nanosphere is carried out selective etch, the volume flow of described fluoroform is 40sccm～60sccm, the volume flow of described argon gas is 30sccm～50sccm, the vacuum degree control of described vacuum chamber is at 0.01 ± 0.003Pa, radio-frequency power 38W～60W in the described etching process, etch period is generally 5min～15min.The granular size by controlling above-mentioned silica nanosphere and the technological parameter of ICP dry etching silica, can realize control better to silica nanosphere array particle diameter and spacing, thereby realize better the monomer size of follow-up nano-structure array masterplate and the control of array arrangement, for the research and the array overall characteristic of nanostructured monomer size, array arrangement parameter correlation are provided convenience.
As the optimization to technique scheme, in described preparation metal nano-void array mask step, described metal film is the chromium film, and the deposition process of described chromium film is vacuum vapour deposition or magnetron sputtering method.
As optimization to technique scheme, in described preparation metal Nano structure array step, described shaping metal is gold, silver, copper, aluminium or other transition metal, the deposition process of described gold, silver, copper, aluminium or other transition metal is vacuum vapour deposition or magnetron sputtering method, and the concrete operations that described nano-structure array masterplate is separated with the metals deposited layer make the two separation or use stickum to uncover the metals deposited layer from described silicon chip for the wet etching silicon chip and make the two separation.
As the optimization to technique scheme, described vacuum vapour deposition specifically is meant: in the working chamber of electron beam evaporation deposition system, be warming up to 100 ℃～150 ℃ after being evacuated to 1e-1Pa～1Pa earlier, continue to be evacuated to 4 * 10
-4Pa～7 * 10
-4Pa, voltage rises to 6000V～8000V and begins evaporation behind the preheating gun filament, and evaporation speed is controlled at
When thickness of coating reaches
In time, closes baffle plate and stops plated film, finishes evaporation.
As optimization to technique scheme, described magnetron sputtering method specifically is meant: will be evacuated to 1e-4Pa～5e-3Pa in the magnetic control sputtering system working chamber earlier, preheating radio-frequency power supply 5min～15min, with the logical argon gas of the volume flow of 40sccm～120sccm, regulating the chamber internal gas pressure is to finish plated film behind 0.1Pa～100Pa to prepare, open dc source adjusting power and begin plated film, close dc source after plated film finishes, finish plated film to 200w～500w.
As the optimization to technique scheme, in described preparation metal nano-void array mask step, the corrosive liquid of described corrode silicon dioxide nanosphere is the mixed liquor that 3: 10 HF solution of mass ratio and water are formed, and the mass fraction of described HF solution is 40%.
In described preparation nanometer hole array masterplate step, the described corrosive liquid that is used for corrosion of silicon can be the mixed liquor of TMAH (TMAH) solution, plasma water (DI) and cleaning agent NCW1001 composition, and the mass ratio of described TMAH, plasma water and cleaning agent NCW1001 is 100: 55: 5.
Compared with prior art, the invention has the advantages that: at the characteristics of metal nano material manufacturing, advantage in conjunction with " from top to bottom " in the prior art and " from bottom to top " two kinds of technologies, develop novel two-dimensional nanostructure array mass preparation method towards metal, and prepare large tracts of land by this method, high density, the two-dimensional nano metal structure array of multiform looks feature, be research and metal Nano structure pattern, size, the optical property that array arrangement is relevant, magnetic property, catalysis characteristics, thermodynamic property, characteristics such as electron transport are provided convenience, and store in information, flat-panel monitor, quantum dot laser, all there is wide application prospect aspects such as biochemical sensor.
Secondly, technical scheme after the optimization of the present invention by utilizing the different crystal orientations silicon chip etching characteristic and to the related process parameter control, successfully realized the making of the metal Nano structure array of different-shape features such as the nanometer octahedral bodily form, the nanoprisms bodily form, nanometer pyramid, nanometer hat, nanometer are cylindrical, nanometer taper shape, can facilitate for the research overall characteristic relevant with nanostructured monomer pattern.
Once more, technical scheme of the present invention can be used for making the sequential 2 D metal Nano structure array of unlike materials such as gold, silver, copper and other transition metal, can facilitate for the research array overall characteristic relevant with the nanostructured material.
At last, the main technique (comprising spin coating proceeding, ICP dry etch process, metal depositing technics, silicon etching process etc.) that the present invention adopts is ripe microelectromechanical systems (MEMS) technology, monodispersity also directly outsourcing of silica nanosphere preferably, characteristics such as therefore technical scheme of the present invention has highly versatile, wide adaptability, compatibility is good, easy to operate, efficient is high, cost is low, can make full use of existing equipment and resource, to also significant to the conversion of nano-device from the nanoscale effect.
Description of drawings
The structural representation (overlook) that be covered with individual layer orderly silica nanosphere fine and close arrangement silicon chip of Fig. 1 for preparing in the embodiment of the invention 1;
The structural representation (overlook) that be covered with individual layer orderly silica nanosphere non-fine and close arrangement silicon chip of Fig. 2 for preparing in the embodiment of the invention 1;
The silicon chip structural representation (overlook) that be coated with chromium film of Fig. 3 for preparing in the embodiment of the invention 1;
The silicon chip structural representation (analyse and observe) that be covered with chromium plating nanohole array mask of Fig. 4 for preparing in the embodiment of the invention 1;
Fig. 5 has the silicon chip structural representation (analysing and observe) of nanometer hole array for the preceding etching of the film that dechromises in the embodiment of the invention 1;
The nanoprisms volume array stencil structure schematic diagram (analyse and observe) of Fig. 6 for preparing in the embodiment of the invention 1;
The Gold plated Layer silicon chip structural representation (analyse and observe) of Fig. 7 for preparing in the embodiment of the invention 1;
The gold nano prism structure array structure schematic diagram (section) of Fig. 8 for preparing in the embodiment of the invention 1;
The gold nano prism structure array structure schematic diagram (stereogram) of Fig. 9 for preparing in the embodiment of the invention 1;
The copper nanometer cylindrical structure array structure schematic diagram (stereogram) of Figure 10 for preparing in the embodiment of the invention 2;
The aluminium nanometer cap array structure schematic diagram (stereogram) of Figure 11 for preparing in the embodiment of the invention 3;
Figure 12 is the metal nano pyramid structure array structure schematic diagram (stereogram) of the inventive method preparation;
Figure 13 is the metal nano conical structure array structure schematic diagram (stereogram) of the inventive method preparation;
Figure 14 is the metal nano octahedral structure array structure schematic diagram (stereogram) of the inventive method preparation.
The specific embodiment
Embodiment 1:
Utilize the gold nano prism structure array (quadrangular) of preparation method's manufactured size of the present invention less than 100nm, it specifically may further comprise the steps:
1, the orderly silica nanosphere of preparation individual layer is fine and close arranges
1.1 preparation silicon chip: at first choose be of a size of 25mm * 25mm * 0.5mm (110) crystal orientation silicon chip as substrate, and silicon chip put into acetone, ethanol, difference ultrasonic cleaning 30min in the deionized water, the washing lotion that the concentrated sulfuric acid of hydrogen peroxide and 98% is made into is heated to 80 ℃ then, silicon chip after the ultrasonic cleaning put into wherein soak 1h, wash repeatedly after the immersion and remove acidic materials, again silicon chip is put into ammoniacal liquor, soak 1h in 80 ℃ the washing lotion that hydrogen peroxide and water are made into, flushing repeatedly after the taking-up, obtain cleaning and silicon chip surface that have excellent hydrophilic, place absolute ethyl alcohol standby;
1.2 prepare the silica nanosphere sol system: be averaged particle diameter D and be 150nm, monodispersity less than 5% silica nanosphere, and with its ultrasonic being scattered among the absolute ethyl alcohol, disperse back room temperature in ultra-clean chamber to leave standstill volatilization fully, obtaining volume ratio is the silica nanosphere sol system of 0.3 (volume ratio of silica nanosphere and solvent absolute ethyl alcohol);
1.3 fine and close arrangement of the orderly silica nanosphere of preparation individual layer: the silicon chip through hydrophilic treated in the step 1.1 is dried up with nitrogen, place on the sol evenning machine sucker and fix, get the silica nanosphere sol system 200 μ L that prepare in the step 1.2 again and evenly drop in silicon chip surface, wait 30s, make the silicon chip surface complete wetting; Rotating speed with 1500rpm at the uniform velocity rotates 15min then, takes off silicon chip, and toasts 1h under 80 ℃ of temperature, prepares fine and close arrangement of the orderly silica nanosphere of individual layer as shown in Figure 1.
2, non-fine and close arrangement of the orderly silica nanosphere of preparation individual layer
The pycnomorphous silicon chip of the orderly silica nanosphere of individual layer that is attached with that step 1.3 obtains is put into ICP etching vacuum chamber, with CHF
3(volume flow is 40sccm) and Ar
2(volume flow is 30sccm) carries out selective etch for source of the gas to the silica nanosphere on the silicon chip, vacuum degree control is at 0.01 ± 0.003Pa in the etching process, radio-frequency power is 38W, etch period is 8min, silica nanosphere is carved little back (carving little degree requires to decide according to real concrete practice), on silicon chip, form non-fine and close arrangement of the orderly silica nanosphere of individual layer as shown in Figure 2.
3, preparation metal nano-void array mask
3.1 deposition chromium film: will be through the working chamber that the non-pycnomorphous silicon chip of the orderly silica nanosphere of individual layer is put into the electron beam evaporation deposition system that is attached with of above-mentioned steps 2 processing, be warming up to 100 ℃ after being evacuated to 1Pa, continue to be evacuated to 7 * 10
-4Pa, voltage rises to 6000V behind the preheating gun filament 3min, beginning chromium plating, evaporation speed remains on
Thicknesses of layers reaches
In time, closes baffle plate and stops plated film, takes out after being warming up to 200 ℃ of baking 20min again, obtains chromium plating film silicon chip as shown in Figure 3;
3.2 corrode silicon dioxide nanosphere: the chromium plating film silicon chip that makes in the above-mentioned steps 3.1 is put into silicon dioxide etching liquid, and (corrosive liquid is HF solution and the H by 3: 10
2O forms, and wherein the mass concentration of HF solution is 40%) the middle 3min that soaks, erode silica nanosphere, make the silicon chip that is covered with chromium plating nanohole array mask as shown in Figure 4.
4, preparation nanoprisms volume array masterplate
4.1 corrosion forms nanometer hole: (silicon etch solution is that 100: 55: 5 TMAH solution, DI and cleaning agent NCW1001 forms by mass ratio to the prepare silicon etchant solution, wherein the mass fraction of TMAH solution is 25%), be warming up to after 45 ℃ silicon slice corrosion 5min, under chromium plating nanohole array mask, form sequential 2 D nanometer hole array as shown in Figure 5 the chromium plating nanohole array mask that makes in the step 3.2;
4.2 shaping nano-structure array masterplate: (the chromium corrosive liquid is to be 10: 5: 100 NH by mass ratio to preparation chromium corrosive liquid
4CeNO
2, CH
3COOH and H
2O forms), the silicon chip that obtains in the above-mentioned steps 4.1 is put into this chromium corrosive liquid, the about 60s of corrosion removes the chromium film under the room temperature, and then shaping obtains nanoprisms volume array masterplate as shown in Figure 6.
5, preparation gold nano array of structures
5.1 being shaped, deposit uses metallic gold: the nanoprisms volume array masterplate that makes in the above-mentioned steps 4.2 is put into the working chamber of electron beam evaporation deposition system, be warming up to 100 ℃ after being evacuated to 1Pa, continue to be evacuated to 4 * 10
-4Pa, voltage rises to 8000V behind the preheating gun filament 3min, begins to be plated to shape and uses metallic gold, and evaporation speed remains on
When golden layer thickness reaches
In time, closes baffle plate and stops gold-platedly, takes out after being warming up to 300 ℃ of baking 20min, obtains Gold plated Layer silicon chip as shown in Figure 7;
5.2 separation silicon chip and gold layer: the gold-plated silicon chip that above-mentioned steps 5.1 makes is put into the silicon etchant solution of step 4.1 preparation, be warming up to 45 ℃ and corrode, promptly obtain as Fig. 8 and gold nano prism structure array shown in Figure 9 to silicon chip and the disengaging of golden film.
Embodiment 2:
Utilize preparation method of the present invention to make diameter and be the copper nanometer array of cylinders of 80nm for 120nm～180nm, height, it specifically may further comprise the steps:
1, the orderly silica nanosphere of preparation individual layer is fine and close arranges
1.1 preparation silicon chip: at first choose be of a size of 25mm * 25mm * 0.5mm (100) crystal orientation silicon chip as substrate, and silicon chip put into acetone, ethanol, difference ultrasonic cleaning 30min in the deionized water, the washing lotion that the concentrated sulfuric acid of hydrogen peroxide and 98% is made into is heated to 80 ℃ then, silicon chip after the ultrasonic cleaning put into wherein soak 1h, wash repeatedly after the immersion and remove acidic materials, again silicon chip is put into ammoniacal liquor, soak 1h in 80 ℃ the washing lotion that hydrogen peroxide and water are made into, flushing repeatedly after the taking-up, obtain cleaning and silicon chip surface that have excellent hydrophilic, place absolute ethyl alcohol standby;
1.2 prepare the silica nanosphere sol system: be averaged particle diameter D and be 250nm, monodispersity less than 5% silica nanosphere, and with its ultrasonic being scattered among the absolute ethyl alcohol, disperse back room temperature in ultra-clean chamber to leave standstill volatilization fully, obtain volume ratio and be 0.25 silica nanosphere sol system;
1.3 fine and close arrangement of the orderly silica nanosphere of preparation individual layer: the silicon chip through hydrophilic treated in the step 1.1 is dried up with nitrogen, place on the sol evenning machine sucker and fix, get the silica nanosphere sol system 200 μ L that prepare in the step 1.2 again and evenly drop in silicon chip surface, wait 30s, make the silicon chip surface complete wetting; Rotating speed with 2000rpm at the uniform velocity rotates 12min then, takes off silicon chip, and toasts 1h under 80 ℃ of temperature, prepares the fine and close arrangement of the orderly silica nanosphere of individual layer.
2, non-fine and close arrangement of the orderly silica nanosphere of preparation individual layer
The pycnomorphous silicon chip of the orderly silica nanosphere of individual layer that is attached with that present embodiment step 1.3 obtains is put into ICP etching vacuum chamber, with CHF
3(volume flow is 40sccm) and Ar
2(volume flow is 30sccm) carries out selective etch for source of the gas to the silica nanosphere on the silicon chip, vacuum degree control is at 0.01 ± 0.003Pa in the etching process, radio-frequency power is 38W, etch period is 5min～10min, silica nanosphere is carved little back (carving little degree requires to decide according to real concrete practice), on silicon chip, form non-fine and close arrangement of the orderly silica nanosphere of individual layer.
3, preparation metal nano-void array mask
This step is identical with the step 3 of embodiment 1.
4, preparation nanometer array of cylinders masterplate
4.1 dry etching forms nanometer hole: on the metal nano-void array mask that present embodiment step 3 makes, with SF
6(80sccm) and Ar
2(60sccm) for source of the gas silicon chip is carried out etching, vacuum degree control is at 0.01 ± 0.003Pa in the etching process, and radio-frequency power is 80W, and etch period is 10min～20min;
4.2 shaping nano-structure array masterplate: preparation chromium corrosive liquid, the silicon chip that obtains in the present embodiment step 4.1 is put into this chromium corrosive liquid, the about 60s of corrosion removes the chromium film under the room temperature, and then obtains nanometer array of cylinders masterplate.
5, preparation copper nano-structure array
5.1 being shaped, deposit uses metallic copper: the working chamber of the nanometer array of cylinders masterplate that makes in the present embodiment step 4.2 being put into magnetic control sputtering system, to be evacuated to 5e-4Pa in the magnetic control sputtering system working chamber, select the copper target position, preheating radio-frequency power supply 5min～15min, with the logical argon gas of volume flow 90sccm, regulating the chamber internal gas pressure is to finish plated film behind the 10Pa to prepare, and opens dc source and regulates power and begin plated film to 350W, close dc source behind the 3min, finish the copper deposit;
5.2 separate silicon chip and copper film: the copper-plated silicon chip that present embodiment step 5.1 makes is put into (100) crystal orientation silicon slice corrosion solution (HNO
3(70%): H
2O: NH
4F=126: 60: 5) in, is warming up to 45 ℃ and corrodes, promptly obtain copper nanometer cylindrical structure array as shown in figure 10 to silicon chip and copper film disengaging.
Embodiment 3:
Utilize preparation method of the present invention make diameter for 300nm about, the height be the aluminium nanometer cap array about 100nm, it specifically may further comprise the steps:
1, the orderly silica nanosphere of preparation individual layer is fine and close arranges
1.1 preparation silicon chip: at first choose be of a size of 25mm * 25mm * 0.5mm (100) crystal orientation silicon chip as substrate, and silicon chip put into acetone, ethanol, difference ultrasonic cleaning 30min in the deionized water, the washing lotion that the concentrated sulfuric acid of hydrogen peroxide and 98% is made into is heated to 80 ℃ then, silicon chip after the ultrasonic cleaning put into wherein soak 1h, wash repeatedly after the immersion and remove acidic materials, again silicon chip is put into ammoniacal liquor, soak 1h in 80 ℃ the washing lotion that hydrogen peroxide and water are made into, flushing repeatedly after the taking-up, obtain cleaning and silicon chip surface that have excellent hydrophilic, place absolute ethyl alcohol standby;
1.2 prepare the silica nanosphere sol system: be averaged particle diameter D and be 450nm, monodispersity less than 5% silica nanosphere, and with its ultrasonic being scattered among the absolute ethyl alcohol, disperse back room temperature in ultra-clean chamber to leave standstill volatilization fully, obtain volume ratio and be 0.2 silica nanosphere sol system;
1.3 fine and close arrangement of the orderly silica nanosphere of preparation individual layer: the silicon chip through hydrophilic treated in the step 1.1 is dried up with nitrogen, place on the sol evenning machine sucker and fix, get the silica nanosphere sol system 200 μ L that prepare in the step 1.2 again and evenly drop in silicon chip surface, wait 30s, make the silicon chip surface complete wetting; Rotating speed with 3000rpm at the uniform velocity rotates 10min then, takes off silicon chip, and toasts 1h under 80 ℃ of temperature, prepares the fine and close arrangement of the orderly silica nanosphere of individual layer.
2, non-fine and close arrangement of the orderly silica nanosphere of preparation individual layer
The pycnomorphous silicon chip of the orderly silica nanosphere of individual layer that is attached with that present embodiment step 1.3 obtains is put into ICP etching vacuum chamber, with CHF
3(volume flow is 40sccm) and Ar
2(volume flow is 30sccm) carries out selective etch for source of the gas to the silica nanosphere on the silicon chip, vacuum degree control is at 0.01 ± 0.003Pa in the etching process, radio-frequency power is 38W, etch period is 15min, silica nanosphere is carved little back (carving little degree requires to decide according to real concrete practice), on silicon chip, form non-fine and close arrangement of the orderly silica nanosphere of individual layer.
3, preparation metal nano-void array mask
This step is identical with the step 3 of embodiment 1.
4, preparation nanometer cap array masterplate
4.1 the isotropism wet etching forms nanometer hole: configuration isotropism silicon etch solution (HNO
3(70%): H
2O: NH
4F=126: 60: 5), on the metal nano-void array mask that present embodiment step 3 makes, at 50 ℃ of following etching 3min～5min;
4.2 shaping nanometer cap array masterplate: preparation chromium corrosive liquid, the silicon chip that obtains in the present embodiment step 4.1 is put into this chromium corrosive liquid, the about 60s of corrosion removes the chromium film under the room temperature, and then obtains nanometer cap array masterplate.
5, preparation aluminium nanometer cap array
5.1 being shaped, deposit uses metallic aluminium: the working chamber of the nanometer cap array masterplate that makes in the present embodiment step 4.2 being put into magnetic control sputtering system, to be evacuated to 8e-4Pa in the magnetic control sputtering system working chamber, select the aluminium target position, preheating radio-frequency power supply 5min～15min, with the logical argon gas of volume flow 90sccm, regulating the chamber internal gas pressure is to finish plated film behind the 5Pa to prepare, and opens dc source and regulates power and begin plated film to 250W, close dc source behind the 5min, finish the aluminium deposit;
5.2 separate silicon chip and aluminium film: the silicon chip of aluminizing that present embodiment step 5.1 makes is put into the silicon etchant solution of present embodiment step 4.1 preparation, be warming up to 45 ℃ and corrode, promptly obtain aluminium nanometer cap array as shown in figure 11 to silicon chip and the disengaging of aluminium film.
Those skilled in the art are according to technical scheme of the present invention, the foregoing description and existing knowledge, can also prepare after doing suitable adjustment on the technological parameter respectively as Figure 12, Figure 13, metal nano pyramid structure array, metal nano conical structure array and metal nano octahedral structure array shown in Figure 14.Any unsubstantiality of making on basic thought of the present invention and technological principle basis is changed, and all belongs to protection scope of the present invention.
Claims (10)
1. the preparation method of a metal Nano structure array may further comprise the steps:
(1) the fine and close arrangement of the orderly silica nanosphere of preparation individual layer: prepare the silica nanosphere sol system earlier, this sol system is spun on a silicon chip surface, form the fine and close arrangement of the orderly silica nanosphere of individual layer at silicon chip surface;
(2) non-fine and close arrangement of the orderly silica nanosphere of preparation individual layer: little quarter by adopting the inductively coupled plasma etching method will form described pycnomorphous silica nanosphere, obtain non-fine and close arrangement of the orderly silica nanosphere of individual layer at silicon chip surface;
(3) preparation metal nano-void array mask: depositing metallic films on non-fine and close arrangement of the orderly silica nanosphere of described individual layer, metal film deposition thickness is less than described silica nanosphere particle diameter, the corrode silicon dioxide nanosphere obtains the metal nano-void array mask at silicon chip surface then;
(4) preparation nano-structure array masterplate: as etching mask, utilize the etching characteristic of silicon chip that described silicon chip is corroded with described metal nano-void array mask, remove the metal nano-void array mask then, obtain the nano-structure array masterplate;
(5) preparation metal Nano structure array: will be shaped is deposited on the described nano-structure array masterplate with metal, and described nano-structure array masterplate is separated with the metals deposited layer, obtains metal Nano structure array.
2. the preparation method of metal Nano structure array according to claim 1, it is characterized in that: in the described silica nanosphere sol system, the average grain diameter D of silica nanosphere is 10nm～5000nm, and monodispersity is less than 5%.
3. the preparation method of metal Nano structure array according to claim 1 and 2, it is characterized in that: described silicon chip is meant (111) crystal orientation, (110) crystal orientation or (100) crystal orientation silicon chip; Described nano-structure array masterplate is meant the octahedra array masterplate of nanometer, nanoprisms volume array masterplate, nanometer pyramid array masterplate, nanometer cap array masterplate, nanometer array of cylinders masterplate or nanometer cone array masterplate;
In described preparation nano-structure array masterplate step, utilize the etching characteristic of silicon chip that described silicon chip is corroded specifically and be meant: the octahedra array masterplate of described nanometer, nanoprisms volume array masterplate, nanometer pyramid array masterplate are respectively to utilize the anisotropic wet etching process that described (111) crystal orientation, (110) crystal orientation, (100) crystal orientation silicon chip are prepared after corroding; Described nanometer cap array masterplate is to prepare after utilizing the isotropism wet corrosion technique that described (100) crystal orientation silicon chip is corroded; Described nanometer array of cylinders masterplate or nanometer cone array masterplate are to prepare after utilizing the inductively coupled plasma dry corrosion process that described (100) crystal orientation silicon chip is corroded.
4. the preparation method of metal Nano structure array according to claim 1 and 2, it is characterized in that: the solvent of described silica nanosphere sol system is the mixture of ethanol or deionized water or ethanol and deionized water, and the volume ratio of described silica nanosphere and described solvent is 0.2～0.4.
5. the preparation method of metal Nano structure array according to claim 1 and 2, it is characterized in that: in the fine and close alignment step of the orderly silica nanosphere of preparation individual layer, rotating speed is 1500rpm～6000rpm during described spin coating, and rotational time is 10min～20min.
6. the preparation method of metal Nano structure array according to claim 1 and 2, it is characterized in that: in the non-fine and close alignment step of the preparation orderly silica nanosphere of individual layer, described inductively coupled plasma etching method specifically is meant: in inductive couple plasma etching vacuum chamber, with fluoroform and argon gas is that source of the gas carries out selective etch to described silica nanosphere, the volume flow of described fluoroform is 40sccm～60sccm, the volume flow of described argon gas is 30sccm～50sccm, the vacuum degree control of described vacuum chamber is at 0.01 ± 0.003 Pa, radio-frequency power 38W～60W in the described etching process, etch period are 5min～15min.
7. the preparation method of metal Nano structure array according to claim 1, it is characterized in that: in described preparation metal nano-void array mask step, described metal film is the chromium film, and the deposition process of described chromium film is vacuum vapour deposition or magnetron sputtering method.
8. the preparation method of metal Nano structure array according to claim 1, it is characterized in that: in described preparation metal Nano structure array step, described shaping metal is gold, silver, copper, aluminium or other transition metal, and the deposition process of described gold, silver, copper, aluminium or other transition metal is vacuum vapour deposition or magnetron sputtering method; The concrete operations that described nano-structure array masterplate is separated with the metals deposited layer make the two separation or use stickum to uncover the metals deposited layer from described silicon chip for the wet etching silicon chip and make the two separation.
9. according to the preparation method of claim 7 or 8 described metal Nano structure arrays, it is characterized in that:
Described vacuum vapour deposition specifically is meant: in the working chamber of electron beam evaporation deposition system, be warming up to 100 ℃～150 ℃ after being evacuated to 1e-1Pa～1Pa earlier, continue to be evacuated to 4 * 10
-4Pa～7 * 10
-4Pa, voltage rises to 6000V～8000V and begins evaporation behind the preheating gun filament, and evaporation speed is controlled at
When thickness of coating reaches
In time, closes baffle plate and stops plated film, finishes evaporation;
Described magnetron sputtering method specifically is meant: will be evacuated to 1e-4 Pa～5e-3 Pa in the magnetic control sputtering system working chamber, preheating radio-frequency power supply 5min～15min, with the logical argon gas of the volume flow of 40sccm～120sccm, regulating the chamber internal gas pressure is to finish plated film behind 0.1Pa～100Pa to prepare, opening dc source regulates power and begins plated film to 200W～500W, close dc source after plated film finishes, finish plated film.
10. the preparation method of metal Nano structure array according to claim 1 and 2, it is characterized in that: in described preparation metal nano-void array mask step, the corrosive liquid of described corrode silicon dioxide nanosphere is the mixed liquor that 3: 10 HF solution of mass ratio and water are formed, and the mass fraction of described HF solution is 40%.
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