CN101740496A - Method for improving CIS imaging quality by air ring - Google Patents
Method for improving CIS imaging quality by air ring Download PDFInfo
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- CN101740496A CN101740496A CN200810043931A CN200810043931A CN101740496A CN 101740496 A CN101740496 A CN 101740496A CN 200810043931 A CN200810043931 A CN 200810043931A CN 200810043931 A CN200810043931 A CN 200810043931A CN 101740496 A CN101740496 A CN 101740496A
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- dielectric layer
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Abstract
The invention discloses a method for improving the CIS imaging quality by air ring, comprising the following steps of: 1, forming a first dielectric layer by a chemical vapor deposition manner and flattening the first dielectric layer; 2, forming a through hole and a metal layer; 3, repeating the steps 1 and 2 till the dielectric layer and the metal layer prior to a passivation layer are finished; 4, etching the dielectric layer around pixels to the surface of a photoelectric diode; and 5, depositing a passivation layer in a non-uniformity chemical vapor deposition manner to form an air ring surrounding the pixels. The invention can effectively solve optical interference between the pixels and improve the response angle of a sensor to the light so as to improve the image quality.
Description
Technical field
The present invention relates to a kind of cmos image sensor technology, particularly a kind of method of improving the cmos image sensor image quality.
Background technology
In traditional CIS (cmos image sensor) last part technology, generally has only a kind of dielectric layer, when incident light during with wide-angle incident, because the back segment dielectric layer of CIS and metal level have certain altitude and this highly to be difficult to reduce, therefore this incident light might incide adjacent CIS pixel, cause the generation of " light is disturbed mutually ", thereby make adjacent CIS pixel produce noise; Simultaneously, this also just shows that to specific pixel the response angle of its light can not be too big, and this has just limited the conversion efficiency of light greatly, has reduced the quality of imageing sensor imaging.
Traditional CIS last part technology as shown in Figure 1, its BEOL is as follows: 1. traditional sucrose layer (as PEOX, HDP, FSG etc., refraction coefficient RI is 1.4～1.6) CVD deposit and planarization; 2. finish follow-up through hole and metal level technology; 3. repeating step one, step 2 are finished up to All Media and the metal level technology of removing passivation layer; 4. consistency CVD passivation layer; 5. finish follow-up other technologies.
Characteristics are as follows: consider characteristics such as inner amplifying circuit and the transistorized speed of other peripheral circuits 1., last part technology (comprising dielectric layer and metal layer thickness) is often consistent with the last part technology of pure logical circuit or suitable, thereby the thickness of whole back segment dielectric layer is thicker.2. too thick back segment height causes incident light will could arrive the surface of light sensitive diode through distant distance by lenticule, so just might cause " light is disturbed mutually " between the pixel and reduce the response angle of transducer light, thereby reduced the quality of image, particularly along with the size of pixel is dwindled day by day, this phenomenon is serious (as shown in Figure 2) more and more.Shown in Fig. 3 (a), Fig. 3 (b),, when H1＞H2, D1＞D2 is arranged necessarily to the incident light of same angle; Therefore, " light is disturbed mutually " between the pixel takes place in thick last part technology easily.
Summary of the invention
Technical problem to be solved by this invention provides a kind of method that solves " light is disturbed mutually " between the pixel, and improves the response angle of transducer to light, thereby improves the quality of image.
In order to solve above technical problem, the invention provides a kind of method of utilizing the air ring to improve the CIS image quality; May further comprise the steps: step 1, form the ground floor dielectric layer, method comprises CVD chemical vapor deposition (as the stack of phosphorosilicate glass, silicon dioxide or their different-thickness etc.) and planarization (as cmp CMP or time etching); Step 2, formation through hole and metal level; Step 3, repeating step one and step 2 All Media layer (as IMD1-IMD2) and the metal level before removing passivation layer finished; Step 4, carry out photoetching and etching etch away a dielectric layer that encloses around the pixel, up to photodiode surface; Step 5, with the mode deposit passivation layer of nonuniformity chemical vapor deposition CVD, form an air ring that surrounds pixel.
Beneficial effect of the present invention is, a kind of new cmos image sensor last part technology is provided, because having introduced refractive index in pixel is 1 air, and then utilize the total reflection principle of light: promptly when light when optically denser medium incides optically thinner medium, if incidence angle is greater than a fixing angle (refractive index that depends on two media), then full emission takes place in this incident optical energy.When incident light during with wide-angle incident, the dielectric layer generation total reflection of this incident light on pixel, thereby this incident light also can arrive this pixel; In addition, even this angle of incidence of light does not also reach the critical condition of total reflection, but owing to enter the thin process of light from light is close, refractive deflection than wide-angle can take place in light, so also can improve " light is disturbed mutually " between the pixel, thereby improved response angle and the conversion efficiency of transducer, and when improving sensor image quality, also do not influenced the performance of cmos device light.
Description of drawings
Below in conjunction with the drawings and specific embodiments the present invention is described in further detail.
Fig. 1 is existing C IS section and incidence angle
Schematic diagram;
Fig. 2 is the schematic diagram that the last part technology that approaches can access the response angle of bigger light;
Fig. 3 (a) and (b) are that the schematic diagram of " light is disturbed mutually " between the pixel takes place thick last part technology easily;
Fig. 4 (a) is the CIS last part technology vertical view of the embodiment of the invention;
Fig. 4 (b) is the CIS profile of the embodiment of the invention;
Fig. 5 (a)-(d) is the schematic diagram of embodiment of the invention step 1 to four.
Embodiment
The invention discloses a kind of new cmos image sensor last part technology, this technology is after having finished all traditional sucrose layers and metal level technology (before the passivation layer), utilize a photoetching and etching, dielectric layer around the pixel cell is etched away, then with the last passivation layer of mode deposit of nonuniformity CVD (chemical vapor deposition), form an air ring that surrounds pixel, follow-up technology is with traditional technology unanimity.Because having introduced refractive index in pixel is 1 air, and then utilize the total reflection principle of light: promptly when light when optically denser medium incides optically thinner medium, if incidence angle is greater than a fixing angle (refractive index that depends on two media), then full emission takes place in this incident optical energy.
Therefore, when incident light during with wide-angle incident (satisfying total reflection), the dielectric layer generation total reflection of this incident light on pixel, thereby this incident light also can arrive this pixel, improved " light is disturbed mutually " between the pixel, and improved the response angle of transducer, and the conversion efficiency of transducer to light.When improving sensor image quality, do not influence the performance of cmos device yet.
CIS last part technology of the present invention as shown in Figure 4, its technical process is as follows:
Step 1, form the ground floor dielectric layer, method comprises CVD chemical vapor deposition (as the stack of phosphorosilicate glass, silicon dioxide or their different-thickness etc.) and planarization (as cmp CMP or time etching);
Step 2, formation through hole and metal level;
Step 3, repeating step one, step 2 are finished up to All Media layer (as IMD1-IMD2) and metal level except that passivation layer;
Step 4, carry out photoetching and etching etch away a dielectric layer that encloses around the pixel, up to photodiode surface;
Step 5, with the last passivation layer of mode deposit of nonuniformity chemical vapor deposition CVD, form an air ring that surrounds pixel, subsequent technique is with traditional technology unanimity.
Its characteristics are: owing to introduced refractive index in pixel is 1 air, and then utilize the total reflection principle of light: promptly when light when optically denser medium incides optically thinner medium, if incidence angle is greater than a fixing angle (refractive index that depends on two media), then full emission takes place in this incident optical energy.
Therefore, shown in Fig. 4 (b), when incident light during with wide-angle incident (satisfying total reflection: as light A), the dielectric layer generation total reflection of this incident light on pixel, thereby this incident light also can arrive this pixel; In addition, as light B, even this angle of incidence of light does not also reach the critical condition of total reflection, but owing to enter the thin process of light from light is close, refractive deflection than wide-angle can take place in light B, so also can improve " light is disturbed mutually " between the pixel, thereby improve response angle and the conversion efficiency of transducer, and when improving sensor image quality, also not influence the performance of cmos device light.
Claims (3)
1. a method of utilizing the air ring to improve the CIS image quality is characterized in that, may further comprise the steps:
Step 1, chemical vapor deposition form the ground floor dielectric layer, and carry out planarization;
Step 2, formation through hole and metal level;
Step 3, repeating step one and step 2 are finished up to dielectric layer and metal level before the passivation layer;
Step 4, the dielectric layer of a circle around the pixel is etched away, up to photodiode surface;
Step 5, with the mode deposit passivation layer of nonuniformity chemical vapor deposition, form an air ring that surrounds pixel.
2. the method for utilizing the air ring to improve the CIS image quality as claimed in claim 1 is characterized in that, the ground floor dielectric layer that forms in the described step 1 comprises the stack of phosphorosilicate glass or silicon dioxide or phosphorosilicate glass and silicon dioxide.
3. the method for utilizing the air ring to improve the CIS image quality as claimed in claim 1 is characterized in that, the planarization described in the step 1 comprises cmp or returns etching.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200810043931A CN101740496A (en) | 2008-11-13 | 2008-11-13 | Method for improving CIS imaging quality by air ring |
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| Application Number | Priority Date | Filing Date | Title |
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| CN200810043931A CN101740496A (en) | 2008-11-13 | 2008-11-13 | Method for improving CIS imaging quality by air ring |
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| CN101740496A true CN101740496A (en) | 2010-06-16 |
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| CN200810043931A Pending CN101740496A (en) | 2008-11-13 | 2008-11-13 | Method for improving CIS imaging quality by air ring |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108321166A (en) * | 2018-04-02 | 2018-07-24 | 德淮半导体有限公司 | Imaging sensor and its manufacturing method |
| CN109713004A (en) * | 2018-12-29 | 2019-05-03 | 上海华力微电子有限公司 | The deep groove isolation structure and forming method of CMOS optical sensor |
-
2008
- 2008-11-13 CN CN200810043931A patent/CN101740496A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108321166A (en) * | 2018-04-02 | 2018-07-24 | 德淮半导体有限公司 | Imaging sensor and its manufacturing method |
| CN109713004A (en) * | 2018-12-29 | 2019-05-03 | 上海华力微电子有限公司 | The deep groove isolation structure and forming method of CMOS optical sensor |
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Open date: 20100616 |