CN109713004A - The deep groove isolation structure and forming method of CMOS optical sensor - Google Patents

The deep groove isolation structure and forming method of CMOS optical sensor Download PDF

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Publication number
CN109713004A
CN109713004A CN201811630276.2A CN201811630276A CN109713004A CN 109713004 A CN109713004 A CN 109713004A CN 201811630276 A CN201811630276 A CN 201811630276A CN 109713004 A CN109713004 A CN 109713004A
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deep
deep groove
isolation structure
optical sensor
groove isolation
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陆神洲
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Shanghai Huali Microelectronics Corp
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Shanghai Huali Microelectronics Corp
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Abstract

The invention discloses a kind of deep groove isolation structures of CMOS optical sensor, include: providing semiconductor substrate, be formed with photodiode in the substrate;The deep groove isolation structure is located in semiconductor base, forms deep trouth forming array one by one, and the photodiode is respectively positioned on the lower section of deep trench isolation, and each deep trench isolation forms a pixel subelement;The top of deep trench isolation has opening;The deep trench isolation is air insulated, and the side wall of deep trouth is the circle thin wall space full of air.The present invention is closed the deep groove structure for needing media filler originally by way of air insulated (Air-gap) in advance, and retain air wherein, to form one week air gap around pixel unit, it is totally reflected large angle incidence light, light is limited between medium and air gap interface, to achieve the purpose that reduce optical crosstalk in CIS device.Forming method of the present invention simplifies technology difficulty directly by deep groove structure by quickly laterally filling pinch off.

Description

The deep groove isolation structure and forming method of CMOS optical sensor
Technical field
The present invention relates to field of manufacturing semiconductor devices, particularly relate to a kind of CMOS optical sensor of reduction optical crosstalk Deep groove isolation structure.
The invention further relates to the forming methods of the deep groove isolation structure of the CMOS optical sensor.
Background technique
With the raising of CMOS technology level, CMOS optical image sensor (CIS) relies on low in energy consumption, at low cost, volume It is small, the series of advantages such as can read at random, realize answering extensively in field of consumer electronics such as tablet computer, smart phones With.But CIS occupy the disadvantages of the factor (fill factor, FF) is smaller, and dark current is larger, and crosstalk is larger be its not yet at Based on flow optical image sensor the main reason for, especially after the prevailing technology of current CIS has been reduced to 0.35 μm or less, as The continuous reduction of plain size causes crosstalk phenomenon and is easier to occur so that pel spacing is smaller and smaller.
Crosstalk in CMOS optical image sensor can be divided into two kinds: optical crosstalk and charge crosstalk.Wherein optical crosstalk wraps again Containing two kinds of forms: first is that reaching adjacent pixel before being completely absorbed with the light of larger angle incidence above pixel unit Position, and be absorbed in adjacent pixel location;Second is that part light (and light of large angle incidence) is not incident on photosensitive position It sets, but is incident on interconnection layer, the photosensitive position for being reflected into adjacent pixel through interconnecting interlayer.It can be with by the mechanism of crosstalk Find out, the interval of photosensitive unit is smaller, and crosstalk phenomenon is more serious, to influence the resolution and precision of image.Therefore in picture Under the plain ever-reduced trend of size, it should take effective measure to reduce the generation of crosstalk.
Mainly include following several at present for the prioritization scheme of cross-interference issue between pixel:
The first solution be using various dose P+ to each pixel carry out side wall injection (SWI), after injection Pixel two sides form side wall, can be passivated silicon dangling bonds, reduce the dark current of photodiode, to improve photoelectric conversion effect Rate.The quantum efficiency of pixel after P+ is passivated can be improved as many as 20%.
Second of solution is that pinning deep diode (pinned deep diode) is prepared on n-type silicon substrate.It is this Method is to be infused in formation junction capacity divider wall in pixel using multiple, can reduce the crosstalk between pixel and Effective Regulation light The drift of raw carrier.Compared with conventional diode, deep diode quantum efficiency in blue color spectrum increases to 60%, green light Spectrum increases to above 50%.
The third solution is isolated using deep trench isolation (DTI) structure.As shown in Figure 1, only example packet in figure Containing two units, 1 is filter in figure, and 2 be optical filter, as left and right be respectively RGB in R, G unit in any two kinds, 3 be by The DTI that silica is formed, 4 be photodiode.After incident ray is by filter and G optical filter, reaches DTI side wall and reflected To the photodiode of bottom, and another a small amount of part light reaches adjacent R unit after being reflected by DTI.The mechanism of DTI includes: Si-SiO2Interface can be used as divider wall and prevent electrons spread, reduce crosstalk;Si-SiO2Class waveguiding structure is constituted, light is limited It makes in silicon, realizes and be optically isolated, and extend light path of the light in silicon, improve quantum efficiency, reduce crosstalk.With first two Solution is compared, and the isolation effect of DTI structure is the most significant, the cmos sensor prepared on silicon using DTI isolation technology Sensitivity and resolution ratio highest.
Traditional CIS device deep trench isolation technique is after forming deep groove structure between pixel, to insert in this configuration SiO2Or high reflection type metal, to lower the crosstalk between pixel by way of optical reflection or absorption.Due to DTI isolation technology Groove it is deeper, isolation is better, and crosstalk is smaller, therefore the depth of DTI generally will be more than 4 μm.The groove of such depth, to rear After fill process be undoubtedly a major challenge.On the other hand, DTI isolation technology is to utilize silicon substrate to the inhibition principle of optical crosstalk With SiO in DTI2The refraction coefficient of dielectric layer is different, form class waveguiding structure, and light is limited in silicon and is realized, therefore right The material selection of spacer medium is also the important directions of optimization DTI isolation technology in DTI.
Summary of the invention
Technical problem to be solved by the present invention lies in provide a kind of deep groove isolation structure of CMOS optical sensor.
The present invention also provides a kind of forming methods of the deep groove isolation structure of CMOS optical sensor.
To solve the above problems, a kind of deep groove isolation structure of CMOS optical sensor of the present invention, includes:
Semiconductor substrate is provided, is formed with photodiode in the substrate;The deep groove isolation structure is located at half In conductor substrate, deep trouth forming array, the photodiode are respectively positioned on the lower section of deep trench isolation, each deep trouth one by one for formation Isolation forms a pixel subelement;The top of deep trench isolation has opening;
The deep trench isolation is air insulated, and the side wall of deep trouth is the circle thin wall space full of air.
A further improvement is that being opening above the deep groove isolation structure, to form optical channel.
A further improvement is that the overthe openings of the deep trench isolation, also have color filter, to the light by color filter Line carries out wavelength filtering.
A further improvement is that the top of the color filter also has lens, with refracted light;Existed by the light of lens After color filter, enter in deep groove isolation structure.
A further improvement is that the air insulated for thering is the thin wall space formed full of air to be formed, to wide-angle Incident ray is totally reflected, and the photodiode for making it be located at deep trench isolation bottom receives.
A further improvement is that the semiconductor base, further includes metal electrode of the silicide as transistor.
A further improvement is that the silicide is nickle silicide and/or cobalt silicide.
To solve the above problems, the present invention also provides a kind of formation sides of the deep groove isolation structure of CMOS optical sensor Method includes following processing step:
Step 1 provides semiconductor substrate, has been formed with photodiode on the semiconductor base;
Step 2 performs etching above-mentioned semiconductor base, forms deep trouth;
Step 3 carries out thin-film deposition filling to deep trouth using CVD technique;
Step 4 planarizes the surface of semiconductor base.
A further improvement is that the substrate also includes metal electrode, the material of metal electrode is nickle silicide and/or silication The silicide of cobalt one kind.
A further improvement is that the film of CVD technique deposit is that surface coverage is poor and laterally raw in the step three Long fast film;When deep trouth is not filled up completely, the semiconductor substrate surface at the top of deep trouth has been sealed, and is formd in deep trouth One is full of the sealing thin layer gap of air, this sealing thin layer gap forms deep trench isolation.
A further improvement is that the film of the CVD technique deposit is fluoride glass FSG or SiCN.
A further improvement is that the thicknesses of layers of CVD technique deposit is 10~20 μm in the step 3.
A further improvement is that flatening process uses chemical mechanical grinding in the step 4.
The invention discloses a kind of deep trench isolation technologies of optical crosstalk in reduction CIS device, pass through air insulated (Air- Gap mode) closes the deep groove structure for needing media filler originally in advance, and retains air wherein, thus in pixel One week air gap is formed around unit.It is different with the refraction coefficient of gas using silicon dielectric layer, so that large angle incidence light is all-trans It penetrates, light is limited between medium and air gap interface, is absorbed until reaching photosensitive position, is reduced in CIS device to reach The purpose of optical crosstalk.
Detailed description of the invention
Fig. 1 is existing CIS device architecture, using SiO2Medium forms deep trench isolation.
Fig. 2 is a kind of deep groove isolation structure provided by the invention, using sealing thin layer the air gap as isolation.
Description of symbols
1 is lens, and 2 be optical filter, and 3 be silica DTI, and 4 be photodiode, and 5 be air insulated (Air-gap).
Specific embodiment
A kind of imaging sensor proposed by the present invention is described in further detail below in conjunction with the drawings and specific embodiments. According to following explanation, advantages and features of the invention will be become apparent from.It should be noted that attached drawing be all made of very simplified form and Non-accurate ratio is used, only for the purpose of facilitating and clarifying the purpose of the embodiments of the invention.
According to the structure of existing CIS device, reduce the optical crosstalk in CIS device between pixel subelement, a weight The solution wanted is exactly to reduce in excitation pixel to enter the adjacent luminous flux for not exciting pixel, this incidence because of refraction Light only exists reflection, and there is no the phenomenon that refraction to be known as being totally reflected, and the minimum incidence angle that total reflection is occurred is known as facing Boundary angle θ.By Si Nieer formula θ=sin (- (n2/n1)) it is found that the ratio of the refractive index of two media is bigger, critical angle is smaller, The incident light angle range that can be totally reflected is bigger, and the probability that generation refraction forms pixel-level fusion is smaller.Due to SiO2 Refractive index be 1.4, and the refractive index of air be 1, therefore, we can use air as medium as the reflection of side wall Medium.Therefore, be based on this principle, the present invention propose in a kind of deep groove isolation structure using air every gap method, it is specific Structure is illustrated in combination with fig. 2 as follows.
On a semiconductor substrate, it is already formed with photodiode in the semiconductor base, that is, has formed detection picture Vegetarian refreshments functional structure.Moreover, based on common knowledge in the industry, may also contain on the semiconductor base nickle silicide and/ Or the metal electrode that the silicides such as cobalt silicide are formed, do not do additional detailed description herein.The deep groove isolation structure is located at In semiconductor base, deep trench isolation array one by one is formed, each deep trench isolation constitutes pixel subelement one by one, more often The arrangement seen is generally R, G, B subelement and constitutes a pixel, and certainly, arrangement mode is far above so.Two pole of photoelectricity Pipe is respectively positioned on the lower section of deep trench isolation, for receiving light and the light intensity signal being converted to electric signal;Deep trench isolation Top has opening, forms the incidence channel of light.The top of opening also has color filter, which defines the deep trouth Isolation structure is any in R, G, B subelement.The top of color filter is lens, downward for light to be collected convergence Incidence is received for photodiode.
The deep trench isolation is air insulated, and the side wall of deep trouth is the thin wall space of the circle sealing full of air, shape At all round closure, the barrel-like structure of top end opening.The final present invention forms the subelement section of CIS device as shown in Fig. 2, incidence Downwards, after passing through optical filter, into deep groove isolation structure, the biggish light of incident angle can irradiate for rays pass through lens convergence Onto the side wall of deep side isolation structure, based on the above principles, the deep trouth that the biggish light of incident angle is formed by the air gap Isolation structure side wall is totally reflected to the bottom of deep groove isolation structure, is received by photodiode, no longer will appear as shown in Figure 1 By traditional SiO2Medium refraction constitutes optical crosstalk into adjacent sub-unit structure, therefore, adopts compared to traditional deep trench isolation With filling SiO2Mode, structure provided by the invention reduce CIS device in optical crosstalk degree on more advantage.
By above description it is recognised that the present invention needs the sealing in deep groove isolation structure to form the air gap, therefore, energy It is enough extremely important using the technique of fast sealing and material in the filling process of deep groove isolation structure, the technique that the present invention uses Method specifically includes the following steps:
Step 1, the semiconductor base for being formed with the CIS device of detected pixel point functional structure is provided, such as in semiconductor Photodiode has been prepared in substrate.In addition, the semiconductor base can also include gold made of some silicides Belong to electrode.
Step 2, the deep trouth for making deep groove isolation structure is formed by etching technics on above-mentioned semiconductor base. This is arrived, it is identical as traditional handicraft.
Step 3, using CVD technique when deep groove structure is not filled up completely sealed airspace, formed air every gap (Air- gap).Due to needing fast sealing, using surface coverage difference, the fireballing film of cross growth is completed, such as fluorine Change glass FSG or SiCN etc..When filling, when deep trouth also has larger gap and the top of the groove can quickly close up sealing, Air is formed every gap.In general, being formed by thicknesses of layers after deep groove isolation structure closing is about 10~20 μm.
Step 4, it is planarized by chemical mechanical grinding, it is subsequent often to paste optical filter, production lens etc. on surface later Rule technique.
Method in the present invention is to skip the filling to deep groove isolation structure, directly laterally raw by surface coverage difference Long fireballing CVD technique, by the rapid pinch off of the deep groove structure for needing media filler originally and seals, and air is made to retain it In, to form air around pixel unit every gap.Due to this method using directly deep groove structure is passed through it is quickly horizontal To filling pinch off, there is no need to subsequent fill process, simplify technology difficulty.
The above is only a preferred embodiment of the present invention, is not intended to limit the present invention.Come for those skilled in the art It says, the invention may be variously modified and varied.All within the spirits and principles of the present invention, made any modification, equivalent Replacement, improvement etc., should all be included in the protection scope of the present invention.

Claims (13)

1. a kind of deep groove isolation structure of CMOS optical sensor, it is characterised in that:
Semiconductor substrate is provided, is formed with photodiode in the substrate;The deep groove isolation structure is located at semiconductor In substrate, deep trouth forming array, the photodiode are respectively positioned on the lower section of deep trench isolation, each deep trench isolation one by one for formation Form a pixel subelement;The top of deep trench isolation has opening;
The deep trench isolation is air insulated, and the side wall of deep trouth is the closed thin wall space of circle full of air.
2. the deep groove isolation structure of CMOS optical sensor as described in claim 1, it is characterised in that: the deep trench isolation Superstructure is opening, to form optical channel.
3. the deep groove isolation structure of CMOS optical sensor as described in claim 1, it is characterised in that: the deep trench isolation Overthe openings, also there is color filter, carry out wavelength filtering to by the light of color filter.
4. the deep groove isolation structure of CMOS optical sensor as claimed in claim 3, it is characterised in that: the color filter it is upper Side also has lens, with refracted light;By the light of lens after color filter, enter in deep groove isolation structure.
5. the deep groove isolation structure of CMOS optical sensor as described in claim 1, it is characterised in that: described has full of sky The air insulated that the thin wall space that gas is formed is formed, is totally reflected large angle incidence light, it is made to be located at deep trench isolation The photodiode of bottom receives.
6. the deep groove isolation structure of CMOS optical sensor as described in claim 1, it is characterised in that: described is semiconductor-based Bottom further includes metal electrode of the silicide as transistor.
7. the deep groove isolation structure of CMOS optical sensor as claimed in claim 6, it is characterised in that: the silicide is Nickle silicide and/or cobalt silicide.
8. a kind of forming method of the deep groove isolation structure of CMOS optical sensor, it is characterised in that: include:
Step 1 provides semiconductor substrate, has been formed with photodiode on the semiconductor base;
Step 2 performs etching above-mentioned semiconductor base, forms deep trouth;
Step 3 carries out thin-film deposition filling to deep trouth using CVD technique;
Step 4 planarizes the surface of semiconductor base.
9. the forming method of the deep groove isolation structure of CMOS optical sensor as claimed in claim 8, it is characterised in that: described Substrate also includes metal electrode, and the material of metal electrode is the silicide of nickle silicide and/or cobalt silicide one kind.
10. the forming method of the deep groove isolation structure of CMOS optical sensor as claimed in claim 8, it is characterised in that: institute In the step of stating three, the film of CVD technique deposit is the film that surface coverage is poor and cross growth is fast;It is not filled out completely in deep trouth When filling, the semiconductor substrate surface at the top of deep trouth has been sealed, and a sealing thin layer gap for being full of air is formd in deep trouth, This sealing thin layer gap forms deep trench isolation.
11. the forming method of the deep groove isolation structure of CMOS optical sensor as claimed in claim 10, it is characterised in that: institute The film for stating the deposit of CVD technique is fluoride glass FSG or SiCN.
12. the forming method of the deep groove isolation structure of CMOS optical sensor as claimed in claim 8, it is characterised in that: institute It states in step 3, the thicknesses of layers of CVD technique deposit is 10~20 μm.
13. the forming method of the deep groove isolation structure of CMOS optical sensor as claimed in claim 8, it is characterised in that: institute It states in step 4, flatening process uses chemical mechanical grinding.
CN201811630276.2A 2018-12-29 2018-12-29 The deep groove isolation structure and forming method of CMOS optical sensor Pending CN109713004A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023102865A1 (en) * 2021-12-10 2023-06-15 Huawei Technologies Co., Ltd. Broadband image apparatus and method of fabricating the same
CN117991431A (en) * 2024-04-03 2024-05-07 南京九川科学技术有限公司 Filter device, imaging system and preparation method of filter device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101740496A (en) * 2008-11-13 2010-06-16 上海华虹Nec电子有限公司 Method for improving CIS imaging quality by air ring
CN102629619A (en) * 2012-04-28 2012-08-08 上海中科高等研究院 Image sensor
US20160163749A1 (en) * 2014-12-09 2016-06-09 Taiwan Semiconductor Manufacturing Co., Ltd. Deep trench spacing isolation for complementary metal-oxide-semiconductor (cmos) image sensors

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101740496A (en) * 2008-11-13 2010-06-16 上海华虹Nec电子有限公司 Method for improving CIS imaging quality by air ring
CN102629619A (en) * 2012-04-28 2012-08-08 上海中科高等研究院 Image sensor
US20160163749A1 (en) * 2014-12-09 2016-06-09 Taiwan Semiconductor Manufacturing Co., Ltd. Deep trench spacing isolation for complementary metal-oxide-semiconductor (cmos) image sensors

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023102865A1 (en) * 2021-12-10 2023-06-15 Huawei Technologies Co., Ltd. Broadband image apparatus and method of fabricating the same
CN117991431A (en) * 2024-04-03 2024-05-07 南京九川科学技术有限公司 Filter device, imaging system and preparation method of filter device

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