Background technology
Present common solid-state semiconductor device, have haply light-emitting diode (Light Emitting Diode, LED), devices such as laser diode (Laser Diode) or semiconductor radio frequency.Generally speaking, aforesaid light-emitting diode, laser diode or semiconductor radio-frequency unit are to be formed at semiconductor element on the epitaxial substrate (for example: radio-frequency (RF) component, or contain the light-emitting component that p-n engages) by an epitaxial substrate and to be constituted.
For instance, basic blue light or green light LED structure are to be formed at resilient coating (buffer layer), on the Sapphire Substrate by a sapphire (sapphire) substrate, to be formed at n type gallium nitride (GaN) semiconductor layer, a local luminescent layer (active layer), that covers the n type gallium nitride semiconductor layer on the resilient coating and to be formed at P type gallium nitride semiconductor layers on the luminescent layer, to be constituted with two contact electrodes that are formed at respectively on the above-mentioned semiconductor layer.
The factor that influences the luminous efficiency of light-emitting diode has internal quantum (internalquantum efficiency) and outside (external) quantum efficiency respectively, wherein constituting the main cause of low internal quantum, then is difference row (dislocation) amount that is formed in the luminescent layer.Yet there are the do not match problem of (lattice mismatch) of sizable lattice in Sapphire Substrate and gallium nitride storeroom, therefore, have also side by side constituted a large amount of penetration type difference rows (threadingdislocation) in epitaxial process.
See also Figure 1A, it is a kind of semiconductor light-emitting elements that TaiWan, China patent announcement case TW 561632 proposes, it comprises a Sapphire Substrate 10, and is formed at the luminescent layer 12 that the n type semiconductor layer 11, on the Sapphire Substrate 10 is formed at n type semiconductor layer 11 and can produces a predetermined wavelength range light source, with a p type semiconductor layer 13 that is formed on the luminescent layer 12.
One upper surface of Sapphire Substrate 10 utilizes photoetching (photolithography) equipment and reactive ion etch (reactive ion etching, RIE) be formed with a plurality of recesses 14 that cyclic variation ground is arranged that are, do not fill up each recess 14 (crystal defect) so that the n type semiconductor layer 11 on the Sapphire Substrate 10 does not produce crystal defect.Wherein, the degree of depth of each recess 14 and size are respectively 1 μ m and 10 μ m, and define the spacing of one 10 μ m by a center of each recess 14.
A.Bell, R.Liu, F.A.Ponce, H.Amano, I.Akasaki, people such as D.Cherns are in Applied Physics Letters, vol.82, No.3, among the pp.349-351, the characteristics of luminescence that discloses a kind of on patterned sapphire substrate magnesium-doped aluminium gallium nitride alloy of growing up is microstructure extremely.Explanation utilizes gold-tinted technologies such as photoetching process and reactive ion etch in this literary composition, make one by patterning sapphire (patterned sapphire) substrate that a plurality of strip-shaped grooves constituted, and on patterned sapphire substrate, form a magnesium-doped aluminium gallium nitride alloy epitaxial loayer, wherein, directly be formed at the epitaxial loayer on the platform between the strip-shaped grooves and contain a large amount of penetration type difference rows, (epitaxiallateral overgrowth, ELOG) layer has then constituted a nondefective zone and be suspended in the horizontal extension of top, each strip-shaped grooves place.
In addition, Shulij Nakamura, Masayuki Senoh, Shinichi Nagahama, NaruhitoIwasa, the researcher of Takao Tamada etc. days inferior chemical industry among the 211-213, discloses a kind of laser diode with the modulation doping strained layer superlattice (modulation-doped strained-layer superlattices) of growing up on horizontal extension gallium nitride base material in Appl.Phys.Lett.72 (2).See also Figure 1B, be illustrated in the literary composition form the thick gallium nitride layer 92 of a resilient coating 91 and one 2 μ m on the Sapphire Substrate 90 in regular turn after, forming a plurality of thickness by photoetching process in gallium nitride layer on 92 further is the silicon oxide layer 93 of 0.1 μ m, and constitutes the wide strip window 94 of a plurality of 4 μ m to define the mask (SiO that is formed on the gallium nitride layer 92 by adjacent silicon oxide layer 93
2Mask), last, on mask, utilize two jet flow Metalorganic chemical vapor deposition methods (two flow MOCVD) to form a n type gallium nitride layer 95 in order to finish follow-up element technology.
Day, the researcher of inferior chemical industry utilized noncrystalline (amorphous) mask, caused the vertical epitaxial layer that is formed at window 94 places laterally to merge the horizontal extension layer that is formed at the mask top with formation, reached the purpose that reduces difference row density whereby.
Patent aforementioned application that the front is mentioned and paper document, though can be reduced to the penetration type difference row who is formed in the epitaxial process in the epitaxial loayer,, arrange because above-mentioned recess or window are the rule formula, and can't block at dislocation defects fully.
Therefore, how reducing dislocation defects density to improve the optical characteristics of epitaxial loayer in epitaxial process, is the required a great problem that overcomes of technical staff of researching and developing the extension relevant industries at present.
Embodiment
The method that the present invention is a kind of blocking dislocation defects of semiconductor in this direction of inquiring into.In order to understand the present invention up hill and dale, detailed step and composition thereof will be proposed in following description.Apparently, execution of the present invention is not defined in the specific details that the those of ordinary skill of the method for blocking dislocation defects of semiconductor is familiar with.On the other hand, well-known composition or step are not described in the details, with the restriction of avoiding causing the present invention unnecessary.The preferred embodiments of the present invention can be described in detail as follows, yet except these were described in detail, the present invention can also implement in other embodiments widely, and scope of the present invention do not limited, and it is as the criterion with appending claims.
In order to reduce dislocation defects density, existing many documents propose relevant solution, but still can't block dislocation defects fully.For example U.S. Pat 6252261, and this invention utilizes silicon dioxide (SiO
2) be covered in and form mask (mask) on the III group-III nitride semiconductor and arrange for the rule formula, not for blocking at dislocation defects fully.
And U.S. Pat 6861270 utilizes silicon nitride (SiN) to grow up between N type and P type III-nitride compound semiconductor, purpose makes the change (Spatial FluctuationofBand-gap) spatially of luminescent layer generation energy gap, also can't reduce the defect concentration of material internal.
In addition, U.S. Pat 6462357 forms the II-nitrogen compound material [(Be, Mg, Ca, Sr, Ba, Zn, Cd, Hg) N] of island monocrystalline on substrate or III-nitride compound semiconductor layer, but because extension modulation condition is few, is difficult to obtain optimized effect.
In addition, US 6627974 utilizes extra chemical vapor deposition (CVD) technology to form protectivefile (SiO
x, Si
xN
y, TiO
xOr ZrO
x), for the rule formula is arranged, not for blocking at dislocation defects fully.
U.S. Pat 6345063 employed patterned mask layer (patterned mask layer) are silicon dioxide or silicon nitride for another example, for the rule formula is arranged, not for blocking at dislocation defects fully.This invention is also directly grown up InGaN (InGaN) on patterned mask layer (patterned masklayer), is difficult for forming the good epitaxial loayer of quality.
The employed method of TaiWan, China patent I242898 only overcomes the line difference row who is in the hexagon aperture and extends, arrange in transmission electron microscope (Transmission ElectronMicroscopy, TEM) effect that does not have the side direction growth to cause difference row to turn on the photo schematic diagram for the line difference around the aperture.
Yet, the present invention proposes a kind of method of blocking dislocation defects of semiconductor, it is not before dislocation defects extends to active illuminating layer, using targetedly, epitaxial block layer blocks it, and the line difference that does not block row is different from the distribution of aforementioned application randomness because the side direction growth mechanism can increase the chance of healing.At first, the extension semi-conductor layer is on a substrate, and form the dislocation defects place of a plurality of potholes on this semi-conductor layer, wherein above-mentioned a plurality of potholes can form by the etching semiconductor layer, because when the above-mentioned semiconductor layer of etching, the fragile place of the semiconductor layer structure that dislocation defects caused will carve pothole by etched liquid corrosion.
Afterwards, on each pothole, form a barrier layer, wherein form barrier layer and comprise elder generation's deposition one barrier layer on above-mentioned semiconductor layer in the details step on each pothole.Afterwards, painting photoresist is on this barrier layer, and above-mentioned a plurality of pothole is filled up in formation.Subsequently, remove a plurality of potholes photoresist in addition, and the above-mentioned semiconductor layer of etching, to remove a plurality of potholes barrier layer in addition, form a plurality of barrier layer that are distributed in pothole whereby.At last, remove the photoresist on a plurality of barrier layer, only stay a plurality of barrier layer that are distributed on a plurality of potholes.
Subsequently, the above-mentioned semiconductor layer of extension is grown up the semiconductor layer side direction again, causes dislocation defects to turn to.The method of the blocking dislocation defects of semiconductor that the present invention proposes can repeat above-mentioned step, significantly to reduce dislocation defects density.
The present invention also proposes a kind of method of blocking the inner dislocation defects of light-emitting diode.At first, carry out at least once method of above-mentioned blocking dislocation defects of semiconductor.Afterwards, extension one compound semiconductor composite bed is on the above-mentioned semiconductor layer of delaying outside again, to form a light-emitting diode, wherein above-mentioned compound semiconductor composite bed comprises a N type semiconductor conductive layer, a P type semiconductor conductive layer and a luminescent layer, and luminescent layer is between N type semiconductor conductive layer and P type semiconductor conductive layer.
Above-mentioned substrate can be sapphire (Al
2O
3) substrate, carborundum (SiC) substrate, lithium aluminate (AlLiO
2) substrate, lithium gallium oxide (LiGaO
2) substrate, silicon (Si) substrate, gallium nitride (GaN) substrate, zinc oxide (ZnO) substrate, aluminum zinc oxide (AlZnO) substrate, GaAs (GaAs) substrate, gallium phosphide (GaP) substrate, gallium antimonide (GaSb) substrate, indium phosphide (InP) substrate, indium arsenide (InAs) substrate, zinc selenide (ZnSe) substrate or metal substrate.The present invention comprises a resilient coating simultaneously between above-mentioned substrate and compound semiconductor composite bed.The present invention comprises a P type semiconductor electronic barrier layer simultaneously between luminescent layer and P type semiconductor conductive layer.
Above-mentioned implementation content, the structural representation of will arrange in pairs or groups diagram and each step is to introduce each step of structure of the present invention and generation type in detail.
Please refer to Fig. 2, it is a kind of manufacturing flow chart of method of blocking dislocation defects of semiconductor.At first, shown in step 1, provide a substrate 100, and form semi-conductor layer 102 on substrate 100, wherein substrate 100 can use following several, Sapphire Substrate, silicon carbide substrates, the lithium aluminate substrate, lithium gallium oxide substrate, silicon substrate, the gallium nitride substrate, zinc oxide substrate, aluminum zinc oxide substrate, gallium arsenide substrate, gallium phosphide substrate, gallium antimonide substrate, the indium phosphide substrate, the indium arsenide substrate, or the zinc selenide substrate etc.The selection of epitaxial substrate mainly is the selection of the material of extension.For instance, general II-VI semiconducting compound can use zinc selenide substrate or zinc oxide substrate as the extension base material; III-arsenide or phosphide typically uses gallium arsenide substrate, gallium phosphide substrate, indium phosphide substrate, or indium arsenide substrate; And the III-nitride is in the commercial Sapphire Substrate of can using usually, or silicon carbide substrates, and there is the lithium aluminate of use substrate the experimental stage at present, the lithium gallium oxide substrate, and silicon substrate, or the aluminum zinc oxide substrate etc.In addition, lattice structure and lattice constant are the important evidence of another selective epitaxy substrate.Lattice constant difference is excessive, often needs to form a resilient coating earlier and just can obtain preferable extension quality.In the present embodiment, the epitaxial material that uses is the III-nitride, particularly uses gallium nitride, and the epitaxial substrate that collocation is used is present commercial common Sapphire Substrate or silicon carbide substrates.Yet any those of ordinary skills will be understood that the selection of epitaxial material of the present invention is not limited to the III-nitride, or or even the material of gallium nitride etc.Any III-V semiconducting compound or the II-VI semiconducting compound all can be applicable among the present invention.
Owing to use Sapphire Substrate or silicon carbide substrates, before extension III-nitride, need to form earlier a resilient coating 101, this is because not the matching up to 14% of the lattice constant between Sapphire Substrate and the gallium nitride, and uses silicon carbide substrates also to have to reach not matching of 3.5% lattice constant.The material of general resilient coating 101 can be gallium nitride, aluminium gallium nitride alloy (AlGaN), aluminium nitride (AlN) or InGaN/InGaN superlattice structure.Relevant for the technology that forms the InGaN/InGaN superlattice structure, can consult the patent application motion before of advanced exploitation photoelectricity, TaiWan, China number of patent application 096104378.The mode that forms resilient coating 12 is at epitaxy machine platform, for example Metalorganic chemical vapor deposition (MOCVD; Metal Organic Chemical Vapor Deposition) board or molecular beam epitaxy (MBE; Molecular Beam Epitaxy) in the board, long brilliant with the environment lower with respect to follow-up normal epitaxial temperature.For example the brilliant temperature of general length of aluminum indium gallium nitride is between 800-1400 ℃, and the brilliant temperature of the length of resilient coating is between 250-700 ℃.When using the Metalorganic chemical vapor deposition board, the precursor of nitrogen can be NH
3Or N
2, the precursor of gallium can be trimethyl gallium or triethyl-gallium, and the precursor of aluminium can be trimethyl aluminium or triethyl aluminum.The pressure of reative cell can be low pressure or normal pressure.
Subsequently, shown in step 2, etch a plurality of potholes 110 at the fragile structure place that dislocation defects caused.Afterwards, shown in the step 3, deposit a barrier layer 103 on semiconductor layer 102 for another example.Painting photoresist is on above-mentioned barrier layer 103 again, fills up a photoresist 109 of a plurality of potholes 110 with formation, shown in step 4.Then, shown in step 5, remove a plurality of potholes 110 photoresist 109 in addition, only stay the photoresist 109 in the pothole 110.Then, shown in step 6, this semi-conductor layer 102 of etching to remove a plurality of potholes 110 barrier layer 103 in addition, forms a plurality of barrier layer 103 that are distributed in pothole 110 whereby.Relend by photoetching process and remove photoresist residual in the pothole 109, shown in step 7.Above-mentioned barrier layer 103 can be dielectric medium (dielectric), comprises magnesium nitride (Mg
xN
y), silicon nitride (Si
xN
y), silica (Si
xO
y), titanium oxide (Ti
xO
y), zirconia (Zr
xO
y), hafnium oxide (Hf
xO
y), tantalum oxide (Ta
xO
y), a silicon nitride (SiN), silicon monoxide (SiO).
Please refer to shown in the step 8, the above-mentioned semiconductor layer 102 of extension again is to form again and again epitaxial semiconductor layer 104.Because above-mentioned barrier layer 103 will stop the growth of epitaxial semiconductor layer 104 again, so epitaxial semiconductor layer 104 will be grown up toward pothole 110 place's side direction again, thereby cause difference row to turn to, effectively dislocation defects is denial in again epitaxial semiconductor layer 104 inside, shown in step 9,10,11.
Please refer to shown in Figure 3, its according to above-mentioned steps semiconductor layer 102 is etched sweep electron microscope (Scanning Electron Microscope, the SEM) photo of pothole 110.
The present invention also is applied to the method for above-mentioned blocking dislocation defects of semiconductor in the technology of light-emitting diode, to propose a kind of method of blocking the inner dislocation defects of light-emitting diode.Please refer to shown in Figure 4, this method is carried out the method for at least blocking dislocation defects of semiconductor earlier, to form again epitaxial semiconductor layer 404, form a compound semiconductor composite bed 420 subsequently again on epitaxial semiconductor layer 404 again, to constitute a light-emitting diode.So, the dislocation defects density of light-emitting diode inside can significantly reduce by said method, and effectively the defective with material internal blocks, and then improves the characteristics of luminescence and the electrical characteristic of light-emitting component.
At first, according to abovementioned steps dislocation defects is denial in again epitaxial semiconductor layer 404 inside.Shown in step 20, form a resilient coating 401 on a substrate 400, and extension semi-conductor layer 402 is on resilient coating 401.Shown in the step 21, etching semiconductor layer 402 is to form the dislocation defects place of a plurality of potholes 410 on semiconductor layer 402 for another example.Subsequently, shown in step 22, deposit a barrier layer 403 on semiconductor layer.Shown in the step 23, painting photoresist fills up a photoresist 409 of a plurality of potholes 410 with formation on barrier layer 403 for another example.Afterwards, shown in step 24, remove a plurality of potholes 410 photoresist 409 in addition.Shown in the step 25, the photoresist 409 beyond a plurality of potholes 410 of etching is to block into photoresist 409 etchings a plurality of photoresists 409 that are distributed in the pothole 410 for another example.Then, shown in step 26, remove above-mentioned photoresist 409 by photoetching process.Shown in the step 27, the above-mentioned semiconductor layer 402 of extension is grown up its side direction again, causes dislocation defects to turn to, to form again and again epitaxial semiconductor layer 404 for another example.
By the diagram of step 27 as can be known, dislocation defects may not necessarily be denial in the epitaxial semiconductor layer 404 fully again, therefore, can to block remaining difference row, significantly reduce the dislocation defects density of element internal whereby by repeating above-mentioned steps.
At last, shown in step 28, form a compound semiconductor composite bed 420 again on epitaxial semiconductor layer 404 again, forming a light-emitting diode, wherein above-mentioned compound semiconductor composite bed 420 forms by form a N type semiconductor conductive layer 405, a luminescent layer 406, a P type semiconductor conductive layer 408 in regular turn on epitaxial semiconductor layer 404 again.Yet above-mentioned light-emitting diode also can comprise a P type semiconductor electronic barrier layer 407 between luminescent layer 406 and P type semiconductor conductive layer 408, takes out usefulness with the light that improves light-emitting diode.Of the present invention one preferred enforcement in the example, above-mentioned N type semiconductor conductive layer 405, luminescent layer 406, P type semiconductor electronic barrier layer 407 are the III group-III nitride with P type semiconductor conductive layer 408.
Above-mentioned N type semiconductor conductive layer 405 can be gallium nitride layer or aluminium gallium nitride alloy layer, and the effect of this one deck provides the coating layer (cladding layer) of the N type conducting of light-emitting diode.The gallium nitride layer of N type conducting or the generation type of aluminium gallium nitride alloy layer, be in Metalorganic chemical vapor deposition board or molecular beam epitaxy board, when forming nitride layer, the atom of four families simultaneously mixes, be silicon atom in the present embodiment, and the precursor of silicon can silicomethane or silicon ethane in the Metalorganic chemical vapor deposition board.Can be at the contact layer (not showing in diagram) that forms unadulterated gallium nitride layer (not showing) and the conducting of N type on the resilient coating in regular turn in diagram in advance below this one deck, and this two-layer formation step be nonessential (optional).Form unadulterated gallium nitride layer and be the extension quality of the coating layer that promotes the conducting of N type, and the contact layer of N type conducting is highly doped gallium nitride layer or aluminium gallium nitride alloy layer, can provide and N type electrode between preferable conductive effect.
In addition, above-mentioned luminescent layer 406 can be the single heterojunction structure, double-heterostructure, single quantum well layer, or multiple quantum trap layer structure.At present multiple quantum trap layer structure, just structures of multiple quantum trap layer/barrier layer of adopting more.Quantum well layer can use InGaN, and barrier layer can use the ternary structural of aluminium gallium nitride alloy etc.In addition, also can adopt quad arrangement, just use aluminum indium gallium nitride (Al
xIn
yGa
1-x-yN) simultaneously as quantum well layer and barrier layer, the ratio of wherein adjusting aluminium and indium makes the energy rank of aluminum indium gallium nitride lattice can become the barrier layer on high energy rank and the quantum well layer on low energy rank respectively.The generation type of luminescent layer, near the aforesaid mode that forms the coating layer of N type conducting, wherein the precursor of indium can be trimethyl indium or triethylindium basically.Luminescent layer can the doped N-type or doping (dopant) of P type, can be doping of doped N-type and P type simultaneously, also can undope fully.And, can be that quantum well layer mixes and barrier layer undopes, quantum well layer undopes and barrier layer mixes, and quantum well layer and barrier layer all mix, or quantum well layer and barrier layer all undope.In addition, also can carry out the doping (delta doping) of high concentration in the subregion of quantum well layer.
The step that forms a P type semiconductor electronic barrier layer 407 on luminescent layer 406 can be nonessential (optional).P type semiconductor electronic barrier layer 407 can comprise first kind of three or five family's semiconductor layer, and second kind of three or five family's semiconductor layer.This two kind of three or five family's semiconductor layer, energy gap difference, and have periodically repeated deposition on above-mentioned active illuminating layer is with as the higher electronic barrier layer of a potential barrier (potential barrier is higher than the potential barrier of active illuminating layer), in order to stop polyelectron (e
-) overflow luminescent layer 406.About the electronic barrier layer of P type conducting detailed content and generation type, can consult the patent application motion before of advanced exploitation photoelectricity, TaiWan, China number of patent application 097128065.
In addition, above-mentioned P type semiconductor conductive layer 408 can be gallium nitride layer or aluminium gallium nitride alloy layer, and the effect of this one deck provides the coating layer (cladding layer) of the P type conducting of light-emitting diode.The gallium nitride layer of P type conducting or the generation type of aluminium gallium nitride alloy layer, be in Metalorganic chemical vapor deposition board or molecular beam epitaxy board, when forming nitride layer, the atom of two families simultaneously mixes, be magnesium atom in the present embodiment, and the precursor of magnesium can Cp in the Metalorganic chemical vapor deposition board
2Mg.Can form the contact layer (in diagram, not showing) of P type conducting above this one deck, and the formation of this layer step is nonessential (optional).The contact layer of P type conducting is highly doped gallium nitride layer or aluminium gallium nitride alloy layer, can provide and P type electrode between preferable conductive effect.
Apparently, according to the description among the top embodiment, the present invention has many modifications and difference.Therefore need be understood in the scope of its additional claim, except above-mentioned detailed description, the present invention can also implement widely in other embodiments.Above-mentioned is the preferred embodiments of the present invention only, is not in order to limit claim of the present invention; All other do not break away from the equivalence of being finished under the disclosed spirit and changes or modification, all should be included in the scope of described claim.