CN101710291B - Register allocation method for optimizing stack space - Google Patents
Register allocation method for optimizing stack space Download PDFInfo
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- CN101710291B CN101710291B CN 200910241252 CN200910241252A CN101710291B CN 101710291 B CN101710291 B CN 101710291B CN 200910241252 CN200910241252 CN 200910241252 CN 200910241252 A CN200910241252 A CN 200910241252A CN 101710291 B CN101710291 B CN 101710291B
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Abstract
The invention provides a register allocation method for optimizing stack space, which comprises the following steps: 1, analyzing a program intermediate file by a register allotter to obtain a data flow diagram; 2, constructing interference patterns of program variables according to the data flow diagram; 3, optimizing the interference patterns to eliminate false interference edges; 4, trying to color the interference patterns, if the step is successful, indicating no variable overflow and stopping allocating the registers, and otherwise performing the next step; 5, abridging the interferencepatterns, and overflowing the low-priority variables to a stack; 6, allocating the number of actual physical registers for the highest-priority virtual registers; and 7, aiming at the overflow nodes of the step 5), inserting the corresponding codes, and querying the accurate interference patterns of the step 3) to allocate the same stack offset for noninterference overflow variables. The method for eliminating the false interference edges comprises the steps: for two interference variables, further analyzing interference variables which are not intersected with an inference register to deletea connection line of the two variables and eliminate the false interference edges.
Description
Technical field
The present invention relates to a kind of register allocation method that storehouse uses of optimizing.
Background technology
In the embedded system, memory source is limited, and overflowing of stack space will cause the pointer race to fly, and program is made mistakes, and this is great potential safety hazard.The optimization of stack space will reduce the demand of program to stack space, reduce the probability that storehouse overflows, and be beneficial to the safe operation of system.
It is that program is carried out its registers stage that the structure of stack space occurs in compiler.When physical register can not satisfy the number demand of virtual register, the variable that priority is low will be spilt in the storehouse.Compiler is for overflowing variable order assignment stack space, do not consider the interference situation of overflowing variable, thereby caused taking of redundant pile stack space; In the target machine that uses inference technologies,, caused the register pressure increase simultaneously, overflowed variable and increase, the phenomenon that the stack space demand increases owing to have false interference edges in the interferogram of its registers.
Summary of the invention
The objective of the invention is to, owing to have false interference edges in the interferogram during its registers, overflow variable when causing its registers the stack register demand pressure is increased, thereby propose a kind of register allocation method of optimizing stack space in order to overcome.
The present invention's invention improves to above phenomenon, adopts the stack space optimization method based on accurate interferogram.In the structure interferogram stage, eliminated false interference edges through the inference register of the analyzing moderator variable situation that intersects, reduced register pressure; When the storehouse variable overflows,, hands-off variable is assigned to same stack position through analyzing the interference situation of storehouse variable.This will significantly reduce program to the taking of stack space, and reduce the probability that storehouse overflows.
A kind of stack space register allocation method of optimization, this method are used for physical register and divide timing that the optimization method of the embedded system stack space its registers that variable overflows is arranged, and described distribution method comprises following steps:
1) register allocator carries out data-flow analysis to the intermediate file of program, obtains DFD;
2) according to the interferogram of DFD constructor variable;
3) in interferogram, eliminate false interference edges;
4) interferogram is attempted painted, painted number is the actual physical registers number; If there is not variable to overflow, this distribution method finishes; Otherwise carry out next step;
5) interferogram is deleted that the variable that priority level is low spills in the stack space register;
6) distribute actual physical registers for the highest virtual register of priority;
7) to the variable that overflows in the step 5), for the hands-off variable that overflows distributes identical storehouse off-set value in the stack space register; For the variable that overflows of interfering distributes different storehouse off-set values in the stack space register;
Wherein, the interference capability that overflows variable is through query steps 3) interferogram after the false interference edges of the elimination that obtains judges;
8) repeating step 4) to step 7), all assigned to physical register up to all virtual registers, and all variablees that overflows all obtain the storehouse off-set value;
The step of the false interference edges of described elimination specifically comprises:
To two variablees of interfering in the interferogram, and then analyze their inference register overlapping relation: if disjoint two moderator variables of inference register, two lines that overflow between the variable in the deletion interferogram, two overflow variable and do not interfere; If two moderator variables that inference register intersects keep in the interferogram two lines that overflow between the variable, two overflow variable is moderator variable.
The stack space register allocation method of described optimization is characterized in that, if another variable is defined when described certain variable enlivens, they are interfered so, and the variable of interference is represented with the line between two nodes in interferogram.
The invention has the advantages that, eliminated the false interference edges of mentioning in the background technology, reduced overflowing of register variable, also reduced simultaneously and overflowed variable taking stack space.The present invention can improve in the embedded system because storehouse overflows and brings safety problem.
Description of drawings
Fig. 1 has provided detail flowchart of the present invention.
Embodiment
Below in conjunction with accompanying drawing and specific embodiment the present invention is carried out detailed explanation.Storehouse analyzer job step is as shown in Figure 1:
1. register allocator carries out data-flow analysis to the intermediate file of program, obtains DFD
2. according to the interferogram of DFD constructor variable.The definition of interferogram be if certain variable when enlivening another variable defined, they are interfered so.The variable of interference is represented with the line between two nodes in interferogram
3. the false interference edges in the elimination interferogram for two variablees of interfering in the interferogram, is analyzed their inference register overlapping relation.Because when having only inference register to intersect, two variablees just might be interfered.For the disjoint moderator variable of inference register, the line in the deletion interferogram between two variablees.
4. interferogram is attempted paintedly, painted number is the actual physical registers number; If this step is smooth, its registers finishes; Otherwise proceed to step 5
5. interferogram is deleted that the variable that priority level is low spills in the storehouse
6. distribute actual physical registers number for the highest virtual register of priority
7. the node that is deletion in the step 5 inserts flooding code, and step 3 has been eliminated false interference edges and obtained accurate interferogram.Overflow the line situation of variable in accurate interferogram through inquiry, can learn the interference information of overflowing variable.For the hands-off variable that overflows distributes identical storehouse skew
8. repeating step 4 to 7, and all by painted, uncoloured virtual register is all spilt into the correct position of storehouse up to all virtual registers
Through above step, the present invention can reduce program to the taking of stack space, and reduces the probability that storehouse overflows, and is beneficial to the safe operation of system.
It should be noted last that above embodiment is only unrestricted in order to technical scheme of the present invention to be described.Although the present invention is specified with reference to embodiment; Those of ordinary skill in the art is to be understood that; Technical scheme of the present invention is made amendment or is equal to replacement, do not break away from the spirit and the scope of technical scheme of the present invention, it all should be encompassed in the middle of the claim scope of the present invention.
Claims (2)
1. the stack space register allocation method of an optimization, this method are used for physical register and divide timing that the optimization method of the embedded system stack space its registers that variable overflows is arranged, and described distribution method comprises following steps:
1) register allocator carries out data-flow analysis to the intermediate file of program, obtains DFD;
2) according to the interferogram of DFD constructor variable;
3) in interferogram, eliminate false interference edges;
4) interferogram is attempted painted, painted number is the actual physical registers number; If there is not variable to overflow, this distribution method finishes; Otherwise carry out next step;
5) interferogram is deleted that the variable that priority is lower than a predetermined value spills in the stack space register;
6) distribute actual physical registers for the highest virtual register of priority;
7) to the variable that overflows in the step 5), for the hands-off variable that overflows distributes identical storehouse off-set value in the stack space register; For the variable that overflows of interfering distributes different storehouse off-set values in the stack space register;
Wherein, the interference capability that overflows variable is through query steps 3) interferogram after the false interference edges of the elimination that obtains judges;
8) repeating step 4) to step 7), all assigned to physical register up to all virtual registers, and all variablees that overflows all obtain the storehouse off-set value;
The step of the false interference edges of described elimination specifically comprises:
To two variablees of interfering in the interferogram, and then analyze their inference register overlapping relation: if inference register is disjoint two moderator variables, two lines that overflow between the variable in the deletion interferogram, two overflow variable and do not interfere; If inference register is two moderator variables that intersect, keep in the interferogram two lines that overflow between the variable, two overflow variable is moderator variable.
2. the stack space register allocation method of optimization according to claim 1; It is characterized in that; If another variable was defined when certain variable enlivened, they are interfered so, and the variable of interference is represented with the line between two nodes in interferogram.
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| CN 200910241252 CN101710291B (en) | 2009-11-27 | 2009-11-27 | Register allocation method for optimizing stack space |
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| CN 200910241252 CN101710291B (en) | 2009-11-27 | 2009-11-27 | Register allocation method for optimizing stack space |
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| CN101710291A CN101710291A (en) | 2010-05-19 |
| CN101710291B true CN101710291B (en) | 2012-12-12 |
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Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102033773B (en) * | 2010-11-12 | 2013-08-14 | 西安电子科技大学 | Method for distributing register in embedded system based on inverse image description |
| CN102360280B (en) * | 2011-10-28 | 2014-04-23 | 浙江大学 | Method for allocating registers for mixed length instruction set |
| CN103559069B (en) * | 2013-11-18 | 2016-08-17 | 中国科学院声学研究所 | A kind of optimization method across between file processes based on algebra system |
| CN104749901B (en) | 2013-12-31 | 2017-08-29 | 上海微电子装备有限公司 | A kind of focusing leveling device |
| CN105389194B (en) * | 2015-10-19 | 2019-02-01 | 华为技术有限公司 | A kind of method and device of determining application program calculating logic |
| MA44821A (en) * | 2016-02-27 | 2019-01-02 | Kinzinger Automation Gmbh | PROCESS FOR ALLOCATING A STACK OF VIRTUAL REGISTERS IN A BATTERY MACHINE |
| CN105912304B (en) * | 2016-03-31 | 2018-04-20 | 中国人民解放军国防科学技术大学 | Vectorial vliw architecture graph coloring register is grouped distribution method |
| CN107632830B (en) * | 2017-09-19 | 2020-07-10 | 首都师范大学 | Register allocation method and system for overflow optimization |
| CN111736899B (en) * | 2020-05-29 | 2023-09-08 | 中国科学院计算技术研究所 | Distribution method of registers on network processor |
| CN112579514B (en) * | 2020-12-10 | 2022-07-26 | 海光信息技术股份有限公司 | Method and device for initializing multi-core processor stack |
Citations (1)
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| CN1271889A (en) * | 1999-04-23 | 2000-11-01 | 太阳微系统有限公司 | Method and device for using register distributor to establish calling convented preface and ending program code |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1271889A (en) * | 1999-04-23 | 2000-11-01 | 太阳微系统有限公司 | Method and device for using register distributor to establish calling convented preface and ending program code |
Non-Patent Citations (4)
| Title |
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| 张军超.相连多寄存器组体系结构上的寄存器分配技术.《 中国博士学位论文全文数据库》.2006,全文. |
| 张军超.相连多寄存器组体系结构上的寄存器分配技术.《 中国博士学位论文全文数据库》.2006,全文. * |
| 高磊.媒体处理器编译器中寄存器分配与代码生成技术的研究与实践.《 中国优秀硕士学位论文全文数据库》.2005,全文. |
| 高磊.媒体处理器编译器中寄存器分配与代码生成技术的研究与实践.《 中国优秀硕士学位论文全文数据库》.2005,全文. * |
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