CN102360280B - Method for allocating registers for mixed length instruction set - Google Patents

Method for allocating registers for mixed length instruction set Download PDF

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CN102360280B
CN102360280B CN 201110333460 CN201110333460A CN102360280B CN 102360280 B CN102360280 B CN 102360280B CN 201110333460 CN201110333460 CN 201110333460 CN 201110333460 A CN201110333460 A CN 201110333460A CN 102360280 B CN102360280 B CN 102360280B
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register
life
spill
regs
instruction
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CN 201110333460
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CN102360280A (en )
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李莹
闫卫斌
吴朝晖
尹建伟
邓水光
吴健
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浙江大学
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Abstract

本发明公开了一种针对混合长度指令集的寄存器分配方法,通过对传统的图着色寄存器分配方法上进行少量的修改,即可充分利用混编指令集的特点,生成代码密度更高的代码,具有简单实用,可靠性强的特点。 The present invention discloses a method for allocating registers for mixing length instruction set, minor modifications on the graph coloring register allocation by the traditional method, mixed to make full use of the characteristics of a set of instructions, generating a higher code density codes, simple and practical, high reliability characteristics.

Description

一种针对混合长度指令集的寄存器分配方法 A method of allocating registers for mixing length instruction set

技术领域 FIELD

[0001] 本发明涉及一种编译技术,尤其涉及一种针对混合长度指令集的寄存器分配方法。 [0001] The present invention relates to a compiler technology, and particularly relates to a method for allocating registers for mixing length instruction set.

背景技术 Background technique

[0002] 嵌入式系统常采用RISC架构,其指令集一般为定长指令集,即只具有单一长度的指令。 [0002] Embedded systems often employ a RISC architecture, the instruction set is generally a fixed length instruction set, i.e., having only a single instruction length. 指令长度一般为整数个字节,例如,16位指令,32位指令。 Length is generally an integer instruction bytes, e.g., 16 bits, 32-bit instruction. 较长的指令长度可以编码更多的操作数,寻址更多的寄存器,或者可使用更大的立即数等,故一般具有更好的性能;而较短的指令长度可以使得编译生成的可执行程序更小。 Longer instruction length may encode more operands, addressing more registers, or may use a larger immediate like, it is generally better performance; and the shorter length may be such that the instructions may be compiled program execution smaller. 为了在具有长指令高性能的同时具有短指令的高代码密度,现代的RISC处理器开始采用两种或者两种以上不同长度指令混合编码的指令集。 For short instructions having a high code density while having a long instruction performance, modern RISC processor starts using two or more different length instruction hybrid coding instruction set. 例如,ARM的thumb2指令集和中天微公司的cskyv2指令集都是16位与32位指令混合编码的指令集(以下简称“混编指令集”)。 For example, ARM instruction set and the thumb2 transit company cskyv2 micro instruction set of 16-bit instruction set are mixed with a 32-bit encoded instruction (hereinafter referred to as "mixed instruction set").

[0003] 在混编指令集中,短指令相比长指令而言,寻址的操作数个数少,可编码的立即数范围小,或者单个地址只可使用部分寄存器。 [0003] In the mixed instruction set, the instruction is short as compared to long instructions, a small number of operands addressing immediate small encodable range, or a single use only part of the address registers. 例如,在cskyV2指令集中,长指令可使用R(TR31全部共32个通用寄存器,而绝大多数短指令只可使用R(TR15共16个通用寄存器;长指令一般具有3操作数,而短指令最多只有2操作数。短指令在功能上是长指令的一个子集。通常,编译器按照长指令的功能来生成汇编指令,而汇编器生成机器指令时,会根据指令的类型和其操作数来决定生成长指令还是短指令。 For example, the instruction set cskyV2, length instruction using R (TR31 were all 32 general purpose registers, while the majority of short instructions use only R (TR15 16 general purpose registers; length instructions typically have operands 3, and short instruction only a maximum of 2 operands short instruction in the function is a subset of the long instruction typically, a compiler according to the function long instructions to generate the assembler instructions, while the assembler generates machine instructions based on the type of instruction and its operands instructions to determine generate long or short instructions.

[0004] 以cskyv2为例,如果一条指令的某个寄存器操作数被分配了R16〜R31的寄存器,那么该指令将生成一条长指令(个别指令除外,下外将介绍);但一条指令即使只使用R(TR15的寄存器,它也并不一定生成短指令,因为它可能使用了超出短指令可编码范围的立即数,或者使用了3个不同的操作数等等。以cskyV2为例,如果一条指令的某个寄存器操作数被分配了R16〜R31的寄存器,那么该指令将生成一条长指令(个别指令除外,下外将介绍);但一条指令即使只使用R(TR15的寄存器,它也并不一定生成短指令,因为它可能使用了超出短指令可编码范围的立即数,或者使用了3个不同的操作数,等等。如果一条指令最终生成的机器指令是长指令还是短指令取决于其分配到的寄存器(以下简称A类指令);反之,如果不论其寄存器操作数分配到哪个寄存器,其必然生成一条长指 [0004] In cskyv2 example, if an instruction is a register operand is assigned R16~R31 registers, the instruction will generate a long instruction (except for the individual instruction, will be described next outer); however, if only one instruction using R (TR15 register, it does not necessarily generate short instructions, because it may be used beyond the immediate short instruction encoding range, or the use of three different operands, etc. in cskyV2 example, if a a register operand of an instruction is assigned R16~R31 registers, the instruction will generate a long instruction (except for the individual instruction, will be described next outer); however, if only one instruction using R (TR15 register, and it it is not necessarily to generate short instructions, because it may be used beyond the number of short instructions encoding range immediately, or use three different operands, etc. If an instruction is finally generated machine instruction long instructions or short instructions depends upon which is assigned to a register (hereinafter referred to as a type instructions); the other hand, if the register operand, regardless of which register is assigned to that inevitably generates a long finger 令,或者必然生成一条短指令(以下简称B类指令)。如何以较小的代价使得所有的A类指令最终生成的机器指令为短指令,是技术人员需要克服的难点。 So, necessarily generate a short or instruction (hereinafter referred to as B type instructions). How such a small cost class A machine instructions all instructions generated for the final short instructions, is the difficulty in the art to be overcome.

发明内容 SUMMARY

[0005] 针对上述技术难点,本发明的提出一种针对混合长度指令集的寄存器分配方法。 [0005] The method of register assignment for the technical difficulties described above, the present invention is proposed for a mixing length instruction set.

[0006] 为了解决上述技术问题,本发明的技术方案如下: [0006] To solve the above technical problem, the technical solution of the present invention is as follows:

[0007] 一种针对混合长度指令集的寄存器分配方法,包括如下步骤: [0007] A method of allocating registers for mixing length instruction set, comprising the steps of:

[0008] I)查找函数中的所有生命周期,通过设置标志位是否置位来判断设该生命期为A类生命期还是B类生命期;[0009] 2)执行图着色寄存器分配方法的Renumber1' buildp coalesce^ spill Cost1、和Simplify1五个过程,为所有A类生命期分配lo-regs寄存器,得到未进行任何溢出操作的冲突图G1 ; [0008] I) Find all lifecycle functions by setting a flag bit is set to determine the set of the life of class A lifetime or Class B lifetime; Renumber1 [0009] 2) executes a coloring register allocation method 'buildp coalesce ^ spill Cost1, and Simplify1 five processes, lo-regs register allocation for all the life of class a, to give a conflict graph operation without any overflow Gl;

[0010] 3)计算空闲lo-regs寄存器数m,如果所述冲突图G1非空,贝U空闲lo-regs寄存器数m为0,如果所述冲突图G1为空图,则执行图着色寄存器分配方法的Select1过程,并根据生成的寄存器分配方案计算空闲的lo-regs寄存器数m,并记录空闲寄存器信息; [0010] 3) Calculate the idle lo-regs Register number m, if the non-empty conflict graph G1, U shell idle lo-regs Register number m is 0, if the conflict graph G1 in FIG empty, then executes a register Coloring Select1 process allocation method, and calculating the number m of registers lo-regs the idle register allocation scheme to generate and record free register information;

[0011] 4)执行图着色寄存器分配方法的Renumber2、build2、coalesce2、simplify2、spillCode2和Select2过程,为B类生命期分配h1-regs寄存器和m个空闲的lo-regs寄存器,并根据生成的分配方案计算空闲的h1-regs寄存器数量n,并记录空闲寄存器信息; Renumber2 [0011] 4) executes a coloring register allocation method, build2, coalesce2, simplify2, spillCode2 and Select2 process, dispensing h1-regs registers and m idle lo-regs Register Class B lifetime, and according to the allocation generated h1-regs register number calculated idle scheme n, and records the idle register information;

[0012] 5)执行图着色寄存器分配方法的spill Code1和Select1过程,如果Select1过程已经在 Select1 spill Code1 and process [0012] 5) executes a coloring register allocation process, if the process has Select1

[0013] 步骤3)执行,则步骤结束,如果没有,重复执行spill Code1 > Renumber1^ build^coalesce^ spill Cost1^ Simplify1过程直到所述冲突图G1为空,然后执行Select1过程为A类生命期生成寄存器分配方案; [0013] Step 3) performed, step ends, if not, repeat the spill Code1> Cost1 until the conflict graph Renumber1 ^ build ^ coalesce ^ spill ^ Simplify1 process G1 is empty, then the process performs Select1 life of generating class A register allocation scheme;

[0014] Renumber” build” coalesce” spill Cost1^ Simplify1、spill Code1、select”Renumber2> build2、coalesce2、spill cost2、Simplify2、spill code2 和Select2 过程均为图着色寄存器分配方法的步骤; [0014] Renumber "build" coalesce "spill Cost1 ^ Simplify1, spill Code1, select" Renumber2> build2, coalesce2, spill cost2, Simplify2, spill code2 and Select2 register allocation process are the method steps of FIG coloring;

[0015] 所述图着色寄存器分配方法包括如下步骤: [0015] FIG coloring the register allocation method comprising the steps of:

[0016] IDRenumber:在数据流分析的基础上,找到函数中的所有生命期,并为其分配唯一的编号,其中一个生命期从一个变量的一次定值开始,到对该值的最后一次使用结束; [0016] IDRenumber: On the basis of the data flow analysis, to find all of life's functions, and assign a unique number, which a lifetime value of a variable from a given start to the last used values End;

[0017] 12) build:建立冲突图G,所述冲突图G中的结点为生命期,边则表示通过其相连的两个生命期有冲突,不能为它们分配同一个寄存器; [0017] 12) build: establishing conflict graph G, the collision node graph G of life, edge indicates a conflict which is connected by two of life can not be assigned to the same register thereof;

[0018] 13)coalesce:判断是否需要合并生命期,如需要则通过合并生命期删除不必要的复制语句,合并后返回,重新执行步骤12),如不需要合并,则执行步骤14); [0018] 13) coalesce: judge whether to merge lifetime, such as the need to remove unnecessary copying of life statement by merging, the combined return again to step 12), such as no merging, step 14 is performed);

[0019] 14) spill cost:计算每个生命期的溢出代价; [0019] 14) spill cost: the cost of each overflow calculating life cycle;

[0020] 15)simplify:对所述冲突图G进行简化,反复地检查图G,删除G中度数小于可用寄存器数k的节点,删除的同时将该节点压入栈s ; [0020] 15) simplify: the simplified conflict graph G, G repeatedly checks FIG delete the node G is less than the degree of the k number of registers are available, while deleting the node onto the stack S;

[0021] 16)spill code:当所述冲突图G中所有节点的度都大于等于k时,需要将溢出代价最小的生命期溢出,即删除其节点,将其压入栈S,并将其标记为溢出,溢出一个生命期之后返回执行步骤11); [0021] 16) spill code: when the conflict for all nodes in G is greater than equal to k, the minimum cost necessary to spill overflow lifetime, i.e., delete node, which is pushed onto the stack S, and an overflow flag, the overflow returns to step 11 after a lifetime);

[0022] 17)select:当所述冲突图G为空时,将栈s中的生命期弹出,为其分配寄存器,并为标记为溢出的生命期插入溢出代码; [0022] 17) select: when the conflict graph G is empty, the life of the stack in the pop s, assigned registers, and an overflow flag for the lifetime of the spill code is inserted;

[0023] 所述lo-regs寄存器为短指令可寻址的寄存器,剩下的为所述h1-regs寄存器,所述标志位是否置位的标准为:将有A类指令引用的生命期设为置位,将只有B类指令引用的生命期设为不置位; [0023] The lo-regs short instruction register is addressable register, the rest of the h1-regs register, said flag bit is set as a standard: the life of class A set of instructions referenced is set, there will be only the life of class B instruction set reference not set;

[0024] 所述A类指令为一条指令最终生成的机器指令是长指令还是短指令取决于其分配到的寄存器; [0024] A class of the instruction is an instruction is finally generated machine instruction depending on the long instructions or short instructions assigned to registers;

[0025] 所述B类指令为不论其寄存器操作数分配到哪个寄存器,其必然生成一条长指令,或者必然生成一条短指令。 The [0025] Type B instruction register operand, regardless of which register assigned to that instruction is bound to generate a long or a short instruction inevitably generated. [0026] 进一步的,所述标志位设于记录生命期信息的结构体中。 [0026] Further, the flag provided to the recording structure of the life information.

[0027] 进一步的,所述步骤5)中spill Code1的过程包括如下步骤: [0027] Further, the step 5) of the spill Code1 process comprising the steps of:

[0028] 31)在构造所述冲突图G1保存一个所述冲突图G1的备份冲突图G^backup ; [0028] 31) G1 save a configuration diagram of the conflict back up the collision conflict graph G1 of FIG. G ^ backup;

[0029] 32)每次simplifyi决定溢出某个生命期I时,首先判断是否有空闲的h1-regs寄存器可用于溢出,如果有,那么在I的每次赋值后和使用前插入move指令,并记录生命期I溢出到h1-regs寄存器的信息;并且当每个h1-regs寄存器都已经有关联的溢出生命期时,根据所述备份冲突图h-badaip判断是否有寄存器关联的所有溢出生命期都不与当前要溢出的生命期I冲突,如果有这样的寄存器,那么它可用于I的溢出,如果没有空闲的h1-regs用于溢出,那么spill Code1使用load/store指令将生命期溢出到存储器。 When [0029] 32) each time an overflow determines the life of simplifyi I, first determines whether there is a free h1-regs can be used for overflow registers, if there is, then the assignment after each move instruction I and inserted prior to use, and record vital information to the overflow of the I register h1-regs; and when each of the h1-regs registers have associated lifetime overflow, according to the backup conflict graph h-badaip determines whether all the overflow register associated with the life of I do not conflict with the current lifetime is about to overflow, if there is such a register, it overflows I can be used, if there is no idle h1-regs for overflow, then spill Code1 using load / store instructions to the overflow of life memory.

[0030] 本发明的有益效果在于:适用于具有两种或两种以上不同长度指令,并且其中较短指令可访问寄存器的集合为较长指令可访问寄存器的集合的子集的指令集,本发明可提高生成代码的指令密度,并且简单实用,可靠性强,最终以较小的代价使得所有的A类指令最终生成的机器指令为短指令。 [0030] Advantageous effects of the present invention is: a set of instructions applicable to a subset of two or more different length instructions, and wherein the short instructions for the set of registers accessible long instruction set of access registers, the present invention can increase the density of the generated code instructions, and simple, practical, reliable, such that the final cost of a small class a machine instructions all instructions generated for the final short instructions.

附图说明 BRIEF DESCRIPTION

[0031] 图1为图着色寄存器分配方法的基本流程图; [0031] FIG. 1 is a basic flow diagram of FIG coloring register allocation method;

[0032] 图2为本发明的具体实施流程图; [0032] DETAILED flowchart of FIG. 2 embodiment of the present invention;

[0033] 图3为标记生命期类型流程图; [0033] FIG. 3 is a flowchart of tag types life;

[0034]图 4 为spill Code1 流程图; [0034] FIG 4 is a flowchart spill Code1;

[0035] 图5为备份的冲突图的部分图。 [0035] FIG. 5 is a partial backup conflict graph of FIG.

具体实施方式 detailed description

[0036] 下面将结合附图和具体实施方式对本发明做进一步的说明。 [0036] The accompanying drawings and the following specific embodiments of the present invention will be further described.

[0037] 本发明是一种在图着色寄存器分配法基础上进行改进的寄存器分配方法。 [0037] The present invention is an improved method of allocating registers in register allocation method based on the coloring of FIG. 图着色是传统的,也是最为常用的寄存器分配方法,其基本流程如图1所示,各阶段的简要说明如下: FIG coloring is conventional and most common register allocation method, the basic procedure shown in Figure 1, a brief description of each of the following stages:

[0038] 重命名(Renumber):在本阶段之前,中间代码可以引用数目无限的“虚拟寄存器”。 [0038] Rename (Renumber): Before this stage, the intermediate code may be unlimited number of references "virtual registers." 本阶段在数据流分析的基础上,找到函数中的所有生命期,并为其分配唯一的编号。 At this stage on the basis of the data flow analysis, to find all of life's functions, and assign a unique number. 一个生命期从一个变量的一次定值开始,到对该值的最后一次使用结束。 From a life-time value of a variable start value to the end of last use.

[0039] 构造冲突图(Build):本阶段建立“冲突图G”,G中的结点为生命期,边则表示通过其相连的两个生命期有冲突,即它们在某条指令处同时活跃,故不能为它们分配同一个寄存器。 [0039] FIG conflict configuration (Build): this stage of the establishment of "conflict graph G", node G of the life, the life of the two sides of said through its associated conflict, i.e. they are at the same time an instruction active, you can not assign the same register thereof.

[0040] 合并生命期(Coalesce):本阶段通过合并生命期来删除不必要的复制语句。 [0040] The combined lifetime (Coalesce): this stage to remove unnecessary duplication statement by merging lifetime. 合并生命期改变了冲突图,故合并之后需要重新执行“Build”过程。 The combined lifetime of the conflict graph to change, we need to re-execute "Build" process after the merger.

[0041] 溢出代价分析(Spill cost):本阶段用于计算每个生命期的溢出代价。 [0041] Overflow consideration analysis (Spill cost): This stage is used to calculate the cost of each of the life of the overflow.

[0042] 简化冲突图(Simplify):本阶段中对冲突图G进行简化,反复地检查图G,删除G中度数小于可用寄存器数k的节点,删除的同时将该节点压入栈S。 [0042] FIG simplified conflict (Simplify): in this stage of conflict simplified graph G, G repeatedly checks FIG delete the node G is less than the degree of the k number of registers are available, while deleting the node pushed onto the stack S.

[0043] 插入溢出代码(Spill code):当图G中所有节点的度都大于等于k时,“Simplify”过程无法继续。 [0043] Insert spill code (Spill code): when G in FIG nodes of degree greater than equal to k, "Simplify" process can not continue. 此时,需要将溢出代价最小的生命期溢出,即删除其节点,将其压入栈S,并将其标记为溢出。 At this point, you need to minimize the cost of the overflow of the overflow of life, its node is deleted, it is pushed onto the stack S, and marked as an overflow. 溢出一个生命期之后需要从“重命名”阶段重新开始执行图着色算法。 After a lifetime overflow need to re-start the implementation phase from the graph coloring algorithm "Rename." [0044] 着色(Select):图G最终会被简化为一个空图,此时将栈s中的生命期弹出,为其分配寄存器,并为标记为溢出的生命期插入溢出代码。 [0044] Coloring (Select): graph G will eventually be reduced to an empty graph, this time in the stack pop s lifetime, assigned registers, and for the lifetime of the marked insertion overflow spill code.

[0045] 首先将寄存器进行分类,其中大多数短指令可寻址的寄存器称为lo-regs,而其余的寄存器称为h1-regs。 [0045] First register classify most short address instruction register called lo-regs, and the remaining register called h1-regs. 然后为每个生命期增加一个标志位,标记其是否曾被A类指令引用,将只有B类指令引用的生命期称为“B类生命期”;而将有A类指令引用的生命期称为“A类生命期”,并通过扫描整个函数的指令流为每个生命期设置该标记。 Then increase for each life stage a flag marking whether it was A class instruction references, the life of the only class B instruction referenced as "Class B-Life"; and the life of class A directive refers to say It is "a class of life", and this flag is set by a function of scanning the entire instruction stream for each life cycle.

[0046] 接着执行两个图着色过程,为A类生命期分配lo-regs,为B类生命期分配h1-regs ;如果lo-regs、h1-regs分别足够A类生命期、B类生命期使用,或者两个图着色过程寄存器都不足,都需要溢出生命期,那么这两个图着色过程独立进行。 [0046] FIG two coloring process is then performed, lo-regs dispensing life of class A, class distribution h1-regs life of B; if lo-regs, h1-regs are sufficient life of Class A, Class B lifetime use, or two graph coloring process registers are insufficient, we need overflow lifetime, then the two graph coloring process independently. 如果lo-regs足够A类生命期分配且有空闲,但h1-regs不够B类生命期分配,那么将lo-regs中空闲的寄存器和h1-regs寄存器一起分配给B类生命期。 If the lo-regs Class A sufficient life of idle and assigned, but not class B h1-regs life of distribution, it will allocate idle with lo-regs and h1-regs Register Register B to the class of life. 反之,如果h1-regs有空闲而lo-regs不足,那么在lo-regs分配过程中生成溢出代码时,优先将生命期溢出到空闲的h1-regs,当无h1-regs寄存器可进行溢出时才溢出到存储器。 Conversely, if there is an idle h1-regs and lack lo-regs, then generate the lo-regs spill code allocation process, preferentially overflows lifetime of h1-regs to idle, when no h1-regs register can overflow if spill to memory.

[0047] 本方法的具体实现流程如图2所示,具体步骤如下: [0047] The specific implementation process of the method shown in Figure 2, the following steps:

[0048] 一、生命期标记。 [0048] First, the lifetime mark. 本阶段查找函数中的所有生命期;并通过扫描当前函数的所有指令对每个生命期的类型进行标记。 Find this stage all the functions of life; and the life of each tag type by scanning all instructions of the current function.

[0049] =ARenumberpbuildpcoalescepspill Cost1、和Simplify115 本步骤执行图着色算法流程中的前5个阶段,为所有A类生命期分配lo-regs寄存器。 [0049] = ARenumberpbuildpcoalescepspill Cost1, and this step is executed before Simplify115 five stages in FIG coloring algorithm flow distribution lo-regs of life for all Class A register. 本步骤执行结束后,将得到未进行任何溢出操作的冲突图A。 After performing this step, the resulting conflict graph operation without any overflow A.

[0050] 三、计算空闲lo-regs寄存器数。 [0050] Third, calculate the number of idle lo-regs Register. 本步骤计算空闲的lo-regs寄存器数m,如果G1非空,那么m为O ;反之,如果G1为空图,那么我们执行Select1过程,并根据生成的寄存器分配方案计算空闲的lo-regs寄存器数,并记录空闲寄存器信息。 This step of calculating the idle lo-regs Register number m, if G1 is not empty, then m is O; conversely, if G1 is empty FIG, we performed Select1 process, and calculates the idle lo-regs register according to the register allocation scheme generated number, and records the idle register information.

[0051] 四、Renumber2> build2、coalesce2、spill cost2、Simplify2、spill code2 和select^本步骤是一个完整的传统图着色寄存器分配过程。 [0051] IV, Renumber2> build2, coalesce2, spill cost2, Simplify2, spill code2 and select ^ complete this step is a conventional graph coloring register allocation. 我们使用这一过程为B类生命期分配h1-regs寄存器和m个空闲的lo-regs寄存器。 We use this procedure to assign h1-regs and m registers idle lo-regs register class B lifetime. 并根据生成的分配方案计算空闲的h1-regs寄存器数量n,并记录空闲寄存器信息。 And h1-regs Register number calculated according to the allocation scheme idle n generated, and records the idle register information.

[0052] 五、spill Code1和select^。 [0052] five, spill Code1 and select ^. 如果G1为空,那么Select1已在步骤三中执行,整个算法结束;否则,重复执行spill Code1、Renumber1、IDuild1、coalesce” spill cost”Simplify1过程,直到G1为空,然后Select1 SA类生命期生成寄存器分配方案。 If G1 is empty, then Select1 executed in step three, the end of the algorithm; otherwise, repeat the spill Code1, Renumber1, IDuild1, coalesce "spill cost" Simplify1 process until the G1 is empty, then Select1 SA Class lifetime generation register allocation scheme. 本步骤的特殊之处在于,如果n>0,那么在执行插入spill Code1时,我们优先将生命期溢出到空闲的h1-regs寄存器,只有当无h1-regs寄存器可用时,才将生命期溢出到存储器。 Step special about this is that, if n> 0, then performing the insertion spill Code1, we prefer the life of the overflow h1-regs to idle register only when no h1-regs registers are available, only the life of the overflow to memory. 这样做的优点在于使用move指令生成的将生命期溢出到空闲的h1-regs寄存器的代码,其执行速度一般要快于使用load/store执行生成的将生命期溢出到存储器的代码。 The advantage of this is the use of the move instruction generated by the life of the overflow to the idle code h1-regs registers, the execution speed is generally faster than using the load / store execution lifetime of the generated code memory to overflow.

[0053] 另外,混编指令集通常提供特殊的短指令——move,它是一条短指令,但可以寻址所有的寄存器。 [0053] Further, the instruction set is generally mixed to provide special short instructions --move, which is a short instruction, but all registers can be addressed. 此时,使用move指令生成的将生命期溢出到空闲h1-regs寄存器的代码相比溢出到存储器将更加高效(使用了短指令进行溢出,而不是通常的长指令)。 At this time, the move instruction generated by the lifetime of free overflow into the code h1-regs register memory as compared to the more efficient the overflow (overflow using short instructions, rather than the usual long instruction).

[0054] 本方法只需要在传统的图着色寄存器分配方法上进行少量的修改,即可充分利用混编指令集的特点,生成代码密度更高的代码,具有简单实用,可靠性强的特点。 [0054] The present method requires only minor modifications in the conventional graph coloring register allocation method, to make full use of the characteristics of the mixed set of instructions, generating a higher code density code, with simple, practical, high reliability features.

[0055] 下面结合具体实例进行更加详细的说明: [0055] Next, with reference to specific examples described in more detail:

[0056] 首先,在记录生命期信息的结构体中增加一个标志位flag_short,如果该标志位置位,则说明该生命期是一个A类生命期,否则其为一个B类生命期。 [0056] First, the structure of the lifetime information in the increase in recording a flag flag_short, if the flag is set, it indicates that the lifetime is a lifetime Class A, Class B or its lifetime. 在“生命期识别”过程结束后,增加一个“标记生命期类型”的过程,如图3所示。 After the end of the "lifetime recognition" process, to add a "tag type of life" process, as shown in FIG. 该过程通过依次扫描当前函数中的每一条指令,为每一个生命期设置flag_short标志。 The process by sequentially scanning each instruction in the current function, set flag_short flag for each life stage.

[0057] 然后,需要执行两个图着色过程。 [0057] Then, the process requires two colored FIG. 其中Select1为所有A类生命期分配lo-regs寄存器;Select2为所有B类生命期分配h1-regs寄存器以及可能的空闲lo-regs寄存器。 Select1 wherein all Class A dispensing life of lo-regs registers; Select2 life of all Class B registers assigned h1-regs and possibly idle lo-regs register. 并且Select2可能在Select1完成之后执行,也可能在selectl的第一次简化冲突图G1过程后执行,如图2所示。 And Select2 Select1 may be performed after completion, it may perform a post-conflict simplified process of FIG selectl G1, as shown in FIG. 这取决于lo-regs是否足够A类生命期分配,如果足够使用,那么Select1首先执行完毕,这样剩余的空闲lo-regs能够提供给Select2阶段进行分配;否则,Select1在执行第一次Simplify1过程后,执行整个Select2流程,这样如果Select2过程有空闲的h1-regs的话,它们可以用于Select1的插入spill Code1阶段。 It depends lo-regs are adequate allocation of class A life, if enough to use, then Select1 finished first, so that the remaining free lo-regs can be assigned to provide Select2 stage; otherwise, Select1 after performing the first process Simplify1 performing Select2 entire process, so that if there is a free Select2 process of h1-regs, they can be used to insert the spill Code1 Select1 stage. 总之,我们使用了select^ Select2两个图着色过程,其中Select1为所有flag_short为true的生命期分配lo-regs寄存器;select2为所有flag_short为false的生命期分配h1-regs寄存器和可能的空闲lo-regs寄存器。 In short, we use the select ^ Select2 two graph coloring process, which Select1 flag_short is true for all the lifetime distribution lo-regs register; select2 all flag_short distribution h1-regs and may register free for the lifetime of false lo- regs register. 这两个图着色过程中,本发明只需要在传统的图着色算法中增加一个对生命期的flag_short标志的判断,使select^ Select2分别处理flag_short为true、false的生命期,并简单的重新组织select^ Select2的执行流程即可。 Both FIG coloring process, the present invention requires only a determination to increase the lifetime of flag_short flag in the conventional graph coloring algorithm, so select ^ Select2 flag_short were treated as true, false lifetime, and simply reorganized select ^ Select2 execution flow can be.

[0058] 最后,本发明还可以修改传统图着色算法的溢出过程插入spill Code1,其流程如图4所示。 [0058] Finally, the present invention also may be modified during the traditional overflow coloring algorithm of FIG insertion spill Code1, the process shown in FIG. 首先,在执行构造冲突图G1过程时,需要保存一个备份的冲突;然后在每次简化冲突图G1决定溢出某个生命期I时,首先判断是否有空闲的h1-regs可用于溢出,如果有,那么在I的每次赋值后和使用前插入move指令,并记录生命期I溢出到h1-regs的信息。 First, in the implementation of conflict graph G1 construction process, the need to save a backup of the conflict; Then each graph G1 decided to simplify the conflict spill over a lifetime I, first determine whether there is a free h1-regs can be used for overflow if there is then after each assignment and before I move using the insert command, and record vital information on I overflowed into the h1-regs. 需要注意的是,当每个h1-regs都已经有关联的溢出生命期时,并不意味着没有h1-regs可用于溢出;这时,需要根据Gfbackup判断是否有某个寄存器,其关联的所有溢出生命期都不与当前要溢出的生命期I冲突,如果有这样的寄存器,那么它可用于I的溢出。 Note that, when each h1-regs have been associated overflow lifetime, that does not mean there is no h1-regs can be used for overflow; this time, whether there is a need to register according to Gfbackup judgment, all of its associated overflow lifetime not to overflow the current lifetime I conflict, if there is such a register, it can be used for I overflow. 如果没有空闲的h1-regs用于溢出,那么spill Code1执行与传统图着色算法同样的过程,即使用load/store指令将生命期溢出到存储器。 If there is no idle h1-regs for overflow, then the spill Code1 perform similar processes the conventional graph coloring algorithm, that load / store instructions to memory overflow of life.

[0059] 以下是一个溢出到寄存器的例子,首先给出在构造冲突图G1执行结束后备份的G1-backup,如下图所示(为了简化说明,示意图中只包括4个生命期,可以认为是冲突图的一小部分): [0059] The following is an example of the register to overflow, is given first in the G1-backup backup configuration after performing conflict graph G1, as shown (to simplify the description, the diagram includes only four of life, it may be considered a small part of a conflict graph):

[0060] 假设有两个空闲的h1-regs寄存器Rl,R2可用于溢出,现在需要溢出生命期3,而之前的溢出操作对h1-regs的使用情况如下表: [0060] Suppose there are two idle h1-regs registers Rl, R2 can be used for overflow, overflow now need the life of 3, and the operation of the overflow before use h1-regs the following table:

[0061] [0061]

h1-regs寄存器j已溢出的生命期— h1-regs register j overflowed lifetime -

Rl I — Rl I -

R2 \2 — R2 \ 2 -

[0062] 表1 h1-regs寄存器溢出情况记录 [0062] Table 1 h1-regs register overflow the recording

[0063] 如流程图4所示,首先得到第一个可用于溢出的h1-regs寄存器R1,并且根据上表可知,生命期I已经溢出到了R1,而当前要溢出生命期3,根据备份的冲突图G1-backup,可知生命期1、3有冲突,故Rl不能用于溢出生命期3。 [0063] As shown in Scheme 4, may be used first to obtain a first overflow h1-regs registers R1, and according to the table can be seen, the lifetime of the I has overflowed into R1, and the current life of 3 to overflow, according to the backup conflict graph G1-backup, 1,3 apparent conflict of life, it can not be used overflow Rl 3 lifetime. 接下来,得到第二个可用于溢出的h1-regs寄存器R2,根据Gfbackup可知,生命期2、3无冲突,说明生命期3活跃的时间段内,生命期2已经不再使用,故可以将生命期3溢出到R2,将该信息填入表1,并在需要使用生命期2的地方插入move指令将其值从R2拷贝到相应的lo-regs寄存器,在使用结束之后插入move指令将其值从相应的lo-regs寄存器拷贝到R2。 Next, may be used to obtain a second overflow h1-regs register R2, according Gfbackup understood, conflict-free life of 2,3, 3 illustrate the active period of the life, the life of 2 no longer in use, it can be R2 life of 3 to overflow, fill in the information tables 1 and 2 require the use life of the insert where the move instruction is copied from the R2 value lo-regs into the corresponding registers, the move instruction is inserted at the end of its use copies the value from the corresponding registers lo-regs to R2.

[0064] 以上所述仅是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员,在不脱离本发明构思的前提下,还可以做出若干改进和润饰,这些改进和润饰也应视为本发明保护范围内。 [0064] The above are only preferred embodiments of the present invention, it should be noted that for those of ordinary skill in the art, without departing from the inventive concept premise, can make various improvements and modifications, improvements and modifications of these It should also be considered within the scope of the invention.

Claims (1)

  1. 1.一种针对混合长度指令集的寄存器分配方法,其特征在于,包括如下步骤: 1)查找函数中的所有生命周期,通过设置标志位是否置位来判断设生命期为A类生命期还是B类生命期; 2)执行图着色寄存器分配方法的Renumber^ buildp coalesce^ spill Cost1、和Simplify1五个过程,为所有A类生命期分配lo-regs寄存器,得到未进行任何溢出操作的冲突图G1 ; 3)计算空闲lo-regs寄存器数m,如果所述冲突图G1非空,则空闲lo-regs寄存器数m为0,如果所述冲突图G1为空图,则执行图着色寄存器分配方法的Select1过程,并根据生成的寄存器分配方案计算空闲的lo-regs寄存器数m,并记录空闲寄存器信息; 4)执行图着色寄存器分配方法的 Renumber2、build2、coalesce2、spill cost2、Simplify2、spill code2和Select2过程,为B类生命期分配h1-regs寄存器和m个空闲的lo-regs寄存器,并根据生成的分配方案计算空闲的h1-regs CLAIMS 1. A method of allocating registers for mixing length instruction set, characterized by comprising the following steps: 1) Find all lifecycle functions by setting a flag bit is set to determine the set of class A life or the life of class B lifetime; 2) Renumber register allocation method of Figure coloring ^ buildp coalesce ^ spill Cost1, and Simplify1 five processes, for all class a dispensing life of lo-regs register conflict graph G1 obtained without any overflow operation ; 3) calculates the idle lo-regs register number m, if the conflict graph G1 is not empty, an idle lo-regs register number m is 0, if the conflict graph G1 in FIG empty, register allocation is performed graph coloring method Select1 process, and is calculated according to the register allocation scheme generated lo-regs register number m of idle, and records the idle register information; 4) Renumber2 executes coloring register allocation method, build2, coalesce2, spill cost2, Simplify2, spill code2 and Select2 process, register allocation h1-regs and m idle lo-regs register B class of life, and allocation scheme is calculated according to the idle generated h1-regs 存器数量η,并记录空闲寄存器信息; 5)执行图着色寄存器分配方法的spill Code1和Select1过程,如果Select1过程已经在步骤3)执行则结束所有步骤,如果没有,则重复执行spill Code1 > Renumber1^ build^coalesce^ spill Cost1^ Simplify1过程直到所述冲突图G1为空,然后执行Select1过程为A类生命期生成寄存器分配方案; Renumber” build” coalesce” spill cost” Simplify1 、 spill Code1 、 select”Renumber2> build2、coalesce2、spill cost2、Simplify2、spill code2 和Select2 过程均为图着色寄存器分配方法的步骤; 所述图着色寄存器分配方法包括如下步骤: IDRenumber:在数据流分析的基础上,找到函数中的所有生命期,并为其分配唯一的编号,其中一个生命期从一个变量的一次定值开始,到对该值的最后一次使用结束; 12) build:建立冲突图G,所述冲突图G中的结点为生命期,边则表示通过其相连的两个生命期有冲 Number register [eta], and records the idle register information; spill Code1 and Select1 Process 5) executes a coloring register allocation method, if Select1 process has the step 3) performs the completion of all steps, if not, repeat spill Code1> Renumber1 Cost1 until the conflict graph ^ build ^ coalesce ^ spill ^ Simplify1 process G1 is empty, then the process is performed Select1 life of generating class A register allocation scheme; Renumber "build" coalesce "spill cost" Simplify1, spill Code1, select "Renumber2 > build2, coalesce2, spill cost2, Simplify2, spill code2 and Select2 process steps are coloring register allocation method of FIG.; FIG coloring the register allocation method comprising the steps of: IDRenumber: on the basis of analysis of the data flow, function found in All lifetime, and assign a unique number, from which a life time value of a variable start value to the end of last use; 12) build: establishing conflict graph G, the conflict in G life of nodes, said two sides of life through its associated with a punch 突,不能为它们分配同一个寄存器; 13)coalesce:判断是否需要合并生命期,如需要则通过合并生命期删除不必要的复制语句,合并后返回,重新执行步骤12),如不需要合并,则执行步骤14); 14) spill cost:计算每个生命期的溢出代价; 15)simplify:对所述冲突图G进行简化,反复地检查图G,删除G中度数小于可用寄存器数k的节点,删除的同时将该节点压入栈s ; 16)spill code:当所述冲突图G中所有节点的度都大于等于k时,需要将溢出代价最小的生命期溢出,即删除其节点,将其压入栈S,并将其标记为溢出,溢出一个生命期之后返回执行步骤11); 17)select:当所述冲突图G为空时,将栈s中的生命期弹出,为其分配寄存器,并为标记为溢出的生命期插入溢出代码; 所述lo-regs寄存器为短指令可寻址的寄存器,剩下的为所述h1-regs寄存器,所述标志位是否置位的标准为:将有A Projections, can not be assigned to the same register thereof; 13) coalesce: determine whether to merge lifetime, then the need to remove such unnecessary replication of life statement by merging, the combined return again to step 12), such as no merging, executing step 14); 14) spill cost: the cost is calculated for each life of the overflow; 15) simplify: the simplified conflict graph G, G repeatedly checks FIG, delete node G is less than the number of available degrees of register k deleted while the node onto the stack s; 16) spill code: when the conflict for all nodes in G is greater than equal to k, the minimum cost necessary to spill overflow lifetime, i.e., delete node, which is pushed onto the stack s, and an overflow flag, the overflow returns to step 11 after a lifetime); 17) select: when the conflict graph G is empty, the life of the stack in the pop s, assign register, and insert the spill code for the life of the overflow mark; lo-regs the short instruction register addressable register, the rest of the h1-regs register, whether the standard flag bit is set : there will be A 指令引用的生命期设为置位,将只有B类指令引用的生命期设为不置位; 所述A类指令为一条指令最终生成的机器指令是长指令还是短指令取决于其分配到的寄存器; 所述B类指令为不论其寄存器操作数分配到哪个寄存器,其必然生成一条长指令,或者必然生成一条短指令; 所述短指令在功能上是长指令的一个子集。 Life of the instruction references is set to set, only the lifetime of the referenced class B instruction set is not set; the Class A final instruction is an instruction to generate machine instructions is short or long instructions assigned to the instruction register depending on its ; class B instruction to the register operand, regardless of which register assigned to that instruction is bound to generate a long or a short instruction inevitably generated; the short length instructions is a subset of instructions in function.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4571678A (en) 1982-11-05 1986-02-18 International Business Machines Corporation Register allocation and spilling via graph coloring
CN1973263A (en) 2004-06-30 2007-05-30 英特尔公司 Bank assignment for partitioned register banks
CN101710291A (en) 2009-11-27 2010-05-19 中国科学院声学研究所 Register allocation method for optimizing stack space

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4571678A (en) 1982-11-05 1986-02-18 International Business Machines Corporation Register allocation and spilling via graph coloring
CN1973263A (en) 2004-06-30 2007-05-30 英特尔公司 Bank assignment for partitioned register banks
CN101710291A (en) 2009-11-27 2010-05-19 中国科学院声学研究所 Register allocation method for optimizing stack space

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