CN101702014A - Test method of intrinsic error of zero level indicating value - Google Patents

Test method of intrinsic error of zero level indicating value Download PDF

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Publication number
CN101702014A
CN101702014A CN200910311215A CN200910311215A CN101702014A CN 101702014 A CN101702014 A CN 101702014A CN 200910311215 A CN200910311215 A CN 200910311215A CN 200910311215 A CN200910311215 A CN 200910311215A CN 101702014 A CN101702014 A CN 101702014A
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China
Prior art keywords
test
indicating value
zero level
level indicating
error
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Pending
Application number
CN200910311215A
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Chinese (zh)
Inventor
何军
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Guizhou Electric Power Test and Research Institute
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Guizhou Electric Power Test and Research Institute
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Guizhou Electric Power Test and Research Institute filed Critical Guizhou Electric Power Test and Research Institute
Priority to CN200910311215A priority Critical patent/CN101702014A/en
Publication of CN101702014A publication Critical patent/CN101702014A/en
Pending legal-status Critical Current

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Abstract

The invention discloses a test method of an intrinsic error of a zero level indicating value, which is characterized by comprising the following steps of: before starting a machine, connecting a standard test instrument (1) with a corresponding test end hole of a calibrated electrical level type tester (3) by using a test wiring harness (2); then starting the machine, operating the standard test instrument and the calibrated electrical level type tester (3) in an assembling mode according to functions, measuring data of 6 error measuring points including a working frequency lowest end, a highest end and a reference frequency and the like, wherein each frequency point is measured for 3 times and recorded; and then computing with all the acquired 18 primary data to obtain a test result of the intrinsic error of the zero level indicating value. By using single multifunctional standard tester, the invention simplifies test system and test connecting line operation, reduces test procedures, and shortens the whole test time to be about one third of that of the traditional test method.

Description

Test method of intrinsic error of zero level indicating value
Technical field
The present invention relates to a kind of test method of fundamental error of level class testing instrument calibration.
Background technology
In the test of level class testing instrument calibration, the intrinsic error of zero level indicating value test is a necessary pilot project, and the problem that existing test method of intrinsic error of zero level indicating value exists is:
Use the code test instrument of many simple functions, the test system architecture complexity;
Under same impedance conditions, shutdown for several times is to change the connecting line of pilot system, and operation is many;
The error measure number of spots is more than 10, and can not determine that before test concrete quantity, unnecessary measurement point increase workload, and very little to the test findings influence;
Each Frequency point is measured number of times more than 5, and can not determine concrete quantity before test, and unnecessary measurement number of times increases workload, and very little to the test findings influence.
Because the existence of the problems referred to above, existing test method of intrinsic error of zero level indicating value operation is many, and efficient is low.
Summary of the invention
The technical problem to be solved in the present invention is, a kind of test method of intrinsic error of zero level indicating value is provided, with solve test system architecture complexity that prior art exists, under same impedance conditions, shutdown for several times is with deficiencies such as the connecting line, the operation that change pilot system are many.
Technical scheme of the present invention is: it comprises following process: before the start, with the test wire harness code test instrument is connected with the corresponding test stomidium of level class testing instrument that is calibrated; Start then, by function combinations operation standard test apparatus and the level class testing instrument that is calibrated, measurement comprises frequency of operation least significant end, most significant end and reference frequency in 6 interior error measure point data, each Frequency point is measured 3 times and record, use whole 18 raw data of being obtained to calculate again, draw the intrinsic error of zero level indicating value test findings.
In the above technical scheme, the present invention uses the multi-functional code test instrument of separate unit, makes up the short form test system with the operating function on the code test instrument; Make up the short form test connecting line with the operating function on the code test instrument, the test connecting line under same impedance conditions immobilizes.
Adopt the advantage of this method to be:
Use the multi-functional code test instrument of separate unit, the short form test system;
Under the same impedance conditions, adopt fixing test connecting line once to connect and finish, needn't shut down for several times to change the test connecting line in this experimental stage, the operation of short form test connecting line reduces The test procedure;
Determine to comprise frequency of operation least significant end, most significant end and reference frequency at 6 interior error measure points, reduce test period;
Determine each Frequency point measurement 3 times, reduce test period.
After adopting this method, the whole test time shortens to about 1/3rd of existing test method.
Description of drawings
Fig. 1 is a synoptic diagram of the present invention.
Embodiment
Embodiments of the invention: the present invention includes following process: before the start, with the test wire harness 2 corresponding code test instrument 1 is connected with the level class testing instrument 3 corresponding test stomidiums that are calibrated with the level class testing instrument 3 required calibration impedance that are calibrated, start then, by function combinations operation standard test apparatus 1 and the level class testing instrument 3 that is calibrated, measurement comprises frequency of operation least significant end, most significant end and reference frequency are in 6 interior error measure point data, each Frequency point is measured 3 times and record, use whole 18 raw data of being obtained to calculate again, draw the intrinsic error of zero level indicating value test findings.

Claims (1)

1. test method of intrinsic error of zero level indicating value, it is characterized in that: it comprises following process: before the start, with test wire harness (2) code test instrument (1) is connected with the corresponding test stomidium of level class testing instrument (3) that is calibrated; Start then, by function combinations operation standard test apparatus (1) and the level class testing instrument (3) that is calibrated, measurement comprises frequency of operation least significant end, most significant end and reference frequency in 6 interior error measure point data, each Frequency point is measured 3 times and record, use whole 18 raw data of being obtained to calculate again, draw the intrinsic error of zero level indicating value test findings.
CN200910311215A 2009-12-10 2009-12-10 Test method of intrinsic error of zero level indicating value Pending CN101702014A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN200910311215A CN101702014A (en) 2009-12-10 2009-12-10 Test method of intrinsic error of zero level indicating value

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN200910311215A CN101702014A (en) 2009-12-10 2009-12-10 Test method of intrinsic error of zero level indicating value

Publications (1)

Publication Number Publication Date
CN101702014A true CN101702014A (en) 2010-05-05

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN200910311215A Pending CN101702014A (en) 2009-12-10 2009-12-10 Test method of intrinsic error of zero level indicating value

Country Status (1)

Country Link
CN (1) CN101702014A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110045316A (en) * 2019-04-10 2019-07-23 中国电力科学研究院有限公司 A kind of error checking method and system reducing the DC voltage transformer that multimeter constant error influences

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110045316A (en) * 2019-04-10 2019-07-23 中国电力科学研究院有限公司 A kind of error checking method and system reducing the DC voltage transformer that multimeter constant error influences
CN110045316B (en) * 2019-04-10 2022-07-01 中国电力科学研究院有限公司 Mutual inductor error calibration method and system for reducing inherent error influence

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Application publication date: 20100505