CN101673060B - Method for injecting ions after photoetching - Google Patents
Method for injecting ions after photoetching Download PDFInfo
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- CN101673060B CN101673060B CN2008102221198A CN200810222119A CN101673060B CN 101673060 B CN101673060 B CN 101673060B CN 2008102221198 A CN2008102221198 A CN 2008102221198A CN 200810222119 A CN200810222119 A CN 200810222119A CN 101673060 B CN101673060 B CN 101673060B
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Abstract
The invention discloses a method for injecting ions after photoetching. In the invention, a shielding layer is additionally arranged between a semiconductor substrate and photoresist to be used for shielding the injected ions which lose energy caused by refraction through the side wall of a photoresist groove, thus the ions which lose partial energy can not be injected into the semiconductor substrate to ensure that the energy of the ions which are injected into the semiconductor substrate is uniform, and the WPE effect is inhibited. Moreover, by increasing the baking temperature, the invention enables the side wall of the photoresist groove to incline towards the outside of the photoresist groove, thus after being refracted by the side wall of the groove, the ions can be emitted from an opening at the top of the groove and can not bombard at the shielding layer to reduce the probability that the ions refracted by the side wall pass through the shielding layer, thereby further inhibiting the WPE effect.
Description
Technical field
The present invention relates to semiconductor fabrication, particularly a kind of method of injecting ions after photoetching.
Background technology
In photoetching process, need spin coating photoresist on the semiconductor-based end earlier, then by photolithography plate to photoresist selectivity exposure, again by developing, clean the photoresist of removing by the sensitization part, thereby make and form the groove corresponding in the photoresist of spin coating with pattern in the photolithography plate.
After the photoetching, referring to Fig. 1, have groove 120 in the photoresist 12 after exposure, removal step, ion beam 20 injects to the semiconductor-based ends 10 from groove 120.Directly bombarded for fear of the surface at the semiconductor-based end 10 and cause damage, the sacrifice layer 11 that usually can also thermal oxide growth one deck between the semiconductor-based end 10 and photoresist 12 constitutes by oxides such as for example silicon dioxide by ion beam 20.Like this, ion beam 20 passes sacrifice layer 11 and injects and be doped into the semiconductor-based end 10, makes to have formed well (Well) 100 in the semiconductor-based end 10.Wherein, than the silicon that constitutes the semiconductor-based end 10, ion is easier for example to penetrate oxide such as silicon dioxide, thereby sacrifice layer 11 can not influence the injection of ion.
Still referring to Fig. 1, generally, the ion beam 20 that injects at groove 120 places has certain angle of inclination than vertical direction shown in dotted line, thereby makes that pass sacrifice layer 11 after wherein sidewall 121 refractions of part ion 21 via groove 120 is injected at semiconductor-based the end 10.Because the part ion 21 through sidewall 121 refractions can lose part energy, thereby make that the injection ion energy that mixes in the semiconductor-based end 10 is inhomogeneous, and cause the edge of well 100 to stretch out brokenly, thereby shorten the distance between the adjacent well, influence the performance of semiconductor devices.This phenomenon is commonly referred to well approach effect (WPE).
Summary of the invention
In view of this, the invention provides a kind of method of injecting ions after photoetching, can suppress the WPE effect.
The method of a kind of injecting ions after photoetching provided by the invention, this method comprises:
Spin coating screen layer on the semiconductor-based end;
Spin coating photoresist on described screen layer;
The selectivity described photoresist that exposes, and remove by the photoresist of sensitization part and form groove, then with greater than 110 ℃, toast less than 200 ℃ temperature;
Go into ion at described groove place to described semiconductor-based rising pouring.
Described screen layer is bottom antireflective coating BARC.
The thickness of described screen layer is less than 200 nanometers.
The thickness of described screen layer is 80 nanometers.
This method is thermal oxide growth sacrifice layer on the semiconductor-based end further, and described screen layer is spun on the described sacrifice layer.
The material of described sacrifice layer is a silicon dioxide.
Carry out described baking with 140 ℃.
As seen from the above technical solution, the present invention has increased screen layer between the semiconductor-based end and photoresist, is used for shielding through the photoresist trenched side-wall reflecting and the injection ion of off-energy.Like this, the ion of loss part energy can not be injected at semiconductor-based the end, has guaranteed that the ion energy that is injected into is even at semiconductor-based the end, thereby has suppressed the WPE effect.
And the present invention can also make the sidewall of photoresist groove tilt to its outside by improving baking temperature.Like this, after the sidewall refraction of ion via groove, may penetrate from the opening at groove top and can not bombard at screen layer.Even if the thickness of screen layer is not enough to guarantee that all reflect and the equal conductively-closed of the ion of off-energy through sidewall, but owing to can reflect away the ion of partial loss energy through angled side walls, thereby can reduce the ion that reflects through sidewall and pass the probability of screen layer, thereby further suppress the WPE effect.
Description of drawings
Fig. 1 is the diagrammatic cross-section of ion implantation process after the existing photoetching.
Fig. 2 is the method flow synoptic diagram of injecting ions after photoetching in the embodiment of the invention.
Fig. 3 is the diagrammatic cross-section of ion implantation process after the photoetching in the embodiment of the invention.
Fig. 4 has increased the diagrammatic cross-section of ion implantation process behind the high-temperature baking in the embodiment of the invention.
Embodiment
For making purpose of the present invention, technical scheme and advantage clearer, below with reference to the accompanying drawing embodiment that develops simultaneously, the present invention is described in more detail.
Because the WPE effect mainly is owing to reflect and the ion of off-energy is injected into the semiconductor-based end and causes through the photoresist trenched side-wall, therefore, in embodiments of the present invention, between the semiconductor-based end and photoresist, increase screen layer, be used for shielding through photoresist trenched side-wall refraction and the injection ion of off-energy.
Below, be example with bottom antireflective coating (BARC) as screen layer, the method for injecting ions after photoetching in the present embodiment is elaborated.
Fig. 2 is the method flow synoptic diagram of injecting ions after photoetching in the embodiment of the invention.As shown in Figure 2, the method at injecting ions after photoetching comprises the steps: in the present embodiment
Step 201, thermal oxide growth sacrifice layer on the semiconductor-based end, for example silicon dioxide etc. is convenient to inject the oxide that ion passes through, and on sacrifice layer spin coating BARC as screen layer.
Step 202, spin coating photoresist on screen layer.
Step 203, the photoresist of selectivity exposure spin coating, and, in the photoresist of spin coating, form groove by developing, cleaning the photoresist of removing by the sensitization part.
In exposure process, BARC can make the exposing light beam that passes photoresist in the photoetching process not again in the reflected back photoetching glue, thereby avoid in the photoresist sidewall of the groove that forms through photoetching ripple can not occur, to suppress the standing wave effect in the photoetching process, can also improve the precision of critical size (CD) simultaneously.
Step 204 is toasted, and makes its hardening with the moisture solvent in the evaporation photoresist.
Bake process in this step can be realized according to existing mode.
Wherein, contain a kind of polymkeric substance (Polymer) among the BARC, this polymkeric substance is after baking, the solvent evaporates of dissolve polymer is fallen, and the atomic distance of this polymkeric substance becomes more tight with respect to sacrifice layer, if thereby the bombardment less in the energy of ions of BARC, then can't pass BARC.Thus, present embodiment can utilize this characteristic of BARC and the baking process after the photoetching, with BARC as screen layer.Certainly, for having the other materials that includes above-mentioned polymkeric substance, also can be used as screen layer.
Step 205 is gone into ion from groove to semiconductor-based rising pouring.Wherein, through the refraction of the sidewall of groove and the screen layer shielding that the part ion of off-energy can be constituted by BARC, all the other ions then pass the screen layer that BARC constitutes and are injected into the semiconductor-based end.
So far, this flow process finishes.
In the above-mentioned flow process, the processing procedure of step 205 can be referring to Fig. 3.In Fig. 3, the ion beam 20 that injects at groove 120 places has certain angle of inclination than vertical direction shown in dotted line, part ion 21 wherein bombards earlier at screen layer 13 via the sidewall 121 refraction backs of groove 120, and other ions 22 then directly bombard at screen layer 13.
If the thickness of screen layer 13 is enough, then all can't be injected into through the ion 21 equal conductively-closeds of sidewall 121 refraction at semiconductor-based the end 10.Like this, have only direct bombardment can pass sacrifice layer 11 injections and be doped in semiconductor 10 at the ion 22 of screen layer 13, the feasible ion energy of the semiconductor-based ends 10 that is doped in is more even than prior art, has avoided the edge of well 100 to stretch out brokenly.Even if the thickness of screen layer 13 is less, also can masked segment through the ion 21 of sidewall 121 refractions, be doped in ion energy of the semiconductor-based ends 10 and be still uniformly than prior art, avoided the edge of well 100 to stretch out brokenly to a certain extent.
Generally, the BARC thickness of formation screen layer 13 should be less than 200 nanometers (nm).Record through experiment, if injecting energy of ions is 20K electron volts (eV), can guarantee when then the thickness of BARC is for 80nm that most of ion conductively-closed through the sidewall refraction can't be injected at semiconductor-based the end 10, if the thickness of BARC is greater than 80nm then can not produce more excellent effect again, and might cause the direct bombardment also can conductively-closed at a small amount of ion of screen layer.
As seen, present embodiment has increased screen layer between the semiconductor-based end and photoresist, is used for shielding through the photoresist trenched side-wall reflecting and the injection ion of off-energy.Like this, the ion of loss part energy has guaranteed that the ion energy that is injected into is even at semiconductor-based the end, thereby can partly or entirely suppress the WPE effect because the conductively-closed layer shields and can not be injected at semiconductor-based the end.
Still referring to Fig. 3, all ions of the ion beam 20 of all injections all bombard at screen layer 13, thereby screen layer 13 has in fact also played the effect of protecting the semiconductor-based end 10.Thereby present embodiment can not need in substrate 10 thermal oxide growth sacrifice layer 11, but direct spin coating screen layer 13 on the semiconductor-based end 10.
In addition, for the described baking of step 204 in the above-mentioned flow process as shown in Figure 2, moisture solvent in the evaporation photoresist makes its hardening, and the purpose in the present embodiment also is to utilize baking that photoresist is shunk, thereby makes sidewall inclination outside it of groove.
But existing baking process all adopts the temperature between 90～110 ℃.Record through experiment, if toast with 90～110 ℃, trenched side-wall can reach 1.39 ° at most than the angle of inclination of vertical direction, yet based on little angle of inclination like this, above-mentioned effect is also not obvious.
Therefore, present embodiment with greater than 110 ℃, toast less than 200 ℃ temperature.Certainly, if baking temperature is too high, then may removes technology for photoresist subsequently and cause difficulty, present embodiment records through experiment, and toasting with 140 ℃ is the best, can obtain the sidewall slope angle about 8.7 °.
As shown in Figure 4, after baking, the lower surface of photoresist 12 is owing to attach to screen layer 13, thereby the bottom of photoresist 12 is subjected to the constraint of adhesive force and can shrink with the evaporation of moisture solvent, correspondingly, the bottom spacing of two of groove 120 sidewalls 121 can not change substantially.The top of photoresist 12 then is not subjected to any constraint, thereby can shrink after baking, makes the top spacing of two sidewalls 121 of groove 120 increase, thereby has caused the inclination of sidewall 121.
In Fig. 4, the ion beam 20 that injects at groove 120 places has certain angle of inclination than vertical direction shown in dotted line, after sidewall 121 refractions of part ion 21 wherein via groove 120, can all not bombard at screen layer 13, part wherein also can penetrate from the opening at groove 120 tops via the sidewall 121 of groove 120.Other ions 22 then still directly bombard at screen layer 13.
Like this, even if the thickness of screen layer 13 is not enough to guarantee that all reflect and the ion 21 equal conductively-closeds of off-energy through sidewall 121, but owing to can reflect away the ion 21 of partial loss energy through angled side walls 121, thereby can reduce the ion that reflects through sidewall 121 and pass the probability of screen layer 13, thereby can further suppress the WPE effect.
When more than improving baking temperature, do not increase stoving time.Certainly, if do not improve baking temperature, but increase stoving time, the angle of inclination that then also can increase trenched side-wall.
The above is preferred embodiment of the present invention only, is not to be used to limit protection scope of the present invention.Within the spirit and principles in the present invention all, any modification of being done, be equal to and replace and improvement etc., all should be included within protection scope of the present invention.
Claims (7)
1. the method for an injecting ions after photoetching is characterized in that, this method comprises:
Spin coating screen layer on the semiconductor-based end;
Spin coating photoresist on described screen layer;
The selectivity described photoresist that exposes, and remove by the photoresist of sensitization part and form groove, then with greater than 110 ℃, toast less than 200 ℃ temperature;
Go into ion at described groove place to described semiconductor-based rising pouring.
2. the method for claim 1 is characterized in that, described screen layer is bottom antireflective coating BARC.
3. method as claimed in claim 2 is characterized in that the thickness of described screen layer is less than 200 nanometers.
4. method as claimed in claim 3 is characterized in that, the thickness of described screen layer is 80 nanometers.
5. the method for claim 1 is characterized in that, this method is thermal oxide growth sacrifice layer on the semiconductor-based end further, and described screen layer is spun on the described sacrifice layer.
6. method as claimed in claim 5 is characterized in that, the material of described sacrifice layer is a silicon dioxide.
7. as any described method in the claim 1 to 6, it is characterized in that, carry out described baking with 140 ℃.
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| CN2008102221198A CN101673060B (en) | 2008-09-09 | 2008-09-09 | Method for injecting ions after photoetching |
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| CN102736434B (en) * | 2011-04-13 | 2015-09-30 | 颀中科技（苏州）有限公司 | A kind of formation method encapsulating pattern |
| CN103337482A (en) * | 2013-06-17 | 2013-10-02 | 上海集成电路研发中心有限公司 | Static random access memory transistor unit manufacturing method capable of adjusting threshold voltage |
| CN104317171A (en) * | 2014-08-18 | 2015-01-28 | 北京中讯四方科技股份有限公司 | A prebaking method of a surface acoustic wave device in a photoetching process |
| KR102359373B1 (en) * | 2018-06-11 | 2022-02-08 | 에스케이하이닉스 시스템아이씨 주식회사 | Method of fabricating a high voltage semiconductor device |
| CN111697020A (en) * | 2020-06-23 | 2020-09-22 | 江西乾照光电有限公司 | Preparation method of high-voltage LED chip |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1904739A (en) * | 2005-07-26 | 2007-01-31 | 东部电子株式会社 | Well photoresist pattern of semiconductor device and method for forming the same |
| CN101154613A (en) * | 2006-09-28 | 2008-04-02 | 台湾积体电路制造股份有限公司 | Method for reducing layout-dependent variations in semiconductor devices |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1904739A (en) * | 2005-07-26 | 2007-01-31 | 东部电子株式会社 | Well photoresist pattern of semiconductor device and method for forming the same |
| CN101154613A (en) * | 2006-09-28 | 2008-04-02 | 台湾积体电路制造股份有限公司 | Method for reducing layout-dependent variations in semiconductor devices |
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|---|
| JP特开平8-22965A 1996.01.23 |
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