CN101657896B - 电子电路封装 - Google Patents

电子电路封装 Download PDF

Info

Publication number
CN101657896B
CN101657896B CN2008800000042A CN200880000004A CN101657896B CN 101657896 B CN101657896 B CN 101657896B CN 2008800000042 A CN2008800000042 A CN 2008800000042A CN 200880000004 A CN200880000004 A CN 200880000004A CN 101657896 B CN101657896 B CN 101657896B
Authority
CN
China
Prior art keywords
electronic
board
flexible base
package
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2008800000042A
Other languages
English (en)
Other versions
CN101657896A (zh
Inventor
梁立慧
仲镇华
刘杰
梁志权
陈昭伦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hong Kong Applied Science and Technology Research Institute ASTRI
Original Assignee
Hong Kong Applied Science and Technology Research Institute ASTRI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hong Kong Applied Science and Technology Research Institute ASTRI filed Critical Hong Kong Applied Science and Technology Research Institute ASTRI
Publication of CN101657896A publication Critical patent/CN101657896A/zh
Application granted granted Critical
Publication of CN101657896B publication Critical patent/CN101657896B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/0243—Printed circuits associated with mounted high frequency components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/189—Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10045—Mounted network component having plural terminals
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/1006—Non-printed filter
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10719—Land grid array [LGA]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/049—Wire bonding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Abstract

一种电子电路封装，有一个柔性基板，在柔性基板的一个或多个表面上有金属层，形成一个布线图和/或表面安装焊盘。无源电子元件被集成在元件封装内，其被安装在柔性基板上，并被电连接到布线图或焊盘。一个有源电子器件被安装在柔性基板或焊盘上。

Description

电子电路封装
技术领域
本发明涉及电子电路封装，特别涉及装有无源和有源电子电路元件的基板。本发明也涉及射频前端模块以及装有这种封装和模块的电子设备。
背景技术
现代电子设备趋向小型化和多功能化。顾客希望产品拥有越来越多的功能，但不要增加尺寸和重量。这种设备也趋向无线互连用于通信、共享或下载信息。因此，电子设计者正不断尝试制作更小更高效的电子电路封装。但是，各种设计考虑因素如跟踪/互连布线、寄生、耗损和过热影响着电子封装的尺寸和形状，特别是在无线射频应用领域。影响尺寸和形状的另一个方面是在现代电子电路里的无源电路元件数目。现代电子电路包括大量的半导体集成电路(IC)设备，但是，据估计，在现代电子电路里大约60-70％的元件是分立无源元件。
在美国专利7,148,751里披露了一种尝试改善无线设备的电子封装的方法。其中描述了一种无线射频前端模块，其有无源和有源元件，且被集成到单个模块内，以便能够提供一个更高效且可靠的模块，其具有更小、更轻、更低成本和更少互连的特点。此封装基于一个引线框架(lead frame)。
在美国专利7,127,269里披露了另一种尝试改善电子封装的方法。其中描述了一种前端模块，包括一个开关、两个信道分离设备、多个带通滤波器、多个平衡变换器(balun)、以及多个低通滤波器，通过一种图案化技术(patterning process)被集成到一个低温共烧陶瓷(LTCC)封装内。
在美国专利6,236,271里披露了另外一种尝试改善电子封装的方法，其描述了一个多层载波模块，其载有一个GSM移动电话需要的功率放大器元件。该封装将功率放大器和功率放大控制器集成在一个硬质分层封装(rigid laminate package)里。
很多问题都与引线框(lead-frame)、LTCC和硬质分层封装的使用有关。引线框封装受制于单层，限制了布线的灵活性，从而限制了有源芯片与无源设备的尺寸外形和位置。典型地，一个引线框封装的最小可获厚度大约是0.5mm。尽管现代技术如LTCC和薄膜技术被用来降低无源元件的尺寸，大约需要10-20层来将无源元件集成到一个基板内，因此一个集成LTCC封装的典型可获厚度大约是0.5mm-0.6mm。LTCC的表面拓扑同样产生装配问题(assembly problem)。硬质层板可以薄到0.25mm，包括表面安装电子元件，比封装厚度的两倍还多。
因此，需要一种更薄、更小、更轻且更高效的改进电子电路封装。
发明内容
因此，本发明的目的是提供一种更小、更轻的电子电路封装，特别是一种射频前端模块，其至少能够克服或减轻现有技术的一些缺陷，或至少提供一种有用方案供公众选择。
在此披露了一种包括柔性基板的电子电路封装。在柔性基板的一个或多个表面上形成或沉积有金属层，其能够产生一个布线图和/或一个表面安装的焊盘。一个集成的元件封装是一个集成薄膜电路，被安装在柔性基板上。集成元件封装包括两个或多个电子元件。一个表面安装的电子器件被安装在柔性基板或焊盘上。所述电子元件封装和所述电子器件安装在所述柔性基板的同一面，所述电子元件封装和所述电子器件都被电连接到该布线图。
电子元件封装和/或电子器件可以都是表面安装类型。
电子元件可以包括无源器件被集成在元件封装内，以形成一个或多个滤波器、平衡转换器、或阻抗匹配网络，以便集成到柔性电路内。
表面安装电子器件可以包括一个半导体芯片器件或封装集成电路，并最好选自：射频芯片、低噪声放大器、功率放大器和开关。
通过在柔性基板上提供一种封装材料、并密封住电子元件封装和电子器件，电子电路封装可以变成刚性的。
从以下结合范例的描述，本发明的其它方面将越发明显。
附图说明
图1是封装的一个侧面结构示意图，和
图2是依照本发明一个电子电路封装的结构总图。
典型实施例详述
本发明利用柔性电子，其也被看作柔性电路(flex-circuit)或柔性电路板，其中使用一个薄柔性塑料片作为一个支撑基板来代替传统的硬质基板。通常该塑料是一种聚合物如聚酰亚胺。在柔性基板的一个或多个上表面和下表面上有金属层，由此形成一个布线图和/或焊盘。同样，本发明通过薄膜技术将无源电子元件一起集成到一个或多个小型电子元件封装内。然后，该元件封装被安装在柔性基板上，并被连接到布线图或焊盘。一个或多个有源元件被安装在柔性基板上，并被电连接到布线图，从而元件被集成到一个元件封装内。在优选实施例里，使用表面安装技术，如栅格阵列封装(LGA)，电子元件封装和有源设备可以被安装在柔性基板上。集成元件、有源元件和布线图形成一个功能电子电路，如一个射频前端模块。柔性基板可以很薄，通常小于0.15mm，并通过在基板的两个面上形成布线图，可以实现更好地跟踪布线和元件布置，从而制作一个在高度、宽度和厚度上更小的封装。基板可以被覆盖一层非柔性的封装材料，用来密封和保护该封装和设备，并使最终的封装变成刚性的。
现在将描述被实施在一个射频前端模块里的本发明。但是，这不是意在限制本发明的使用范围或功能，本领域的技术人员应该认识到，本发明可以被实施在任何电子电路里，其包括被集成在单个封装内的无源和有源元件。
参照附图，在本发明的典型实施例里，有一个电子封装1，其包括一个柔性聚酰亚胺支撑基板2，在其上表面和下表面的金属层上有一个布线图案9和焊盘11、12。焊盘11、12可以是任何表面安装焊接布置，但在优选实施例里是栅极阵列封装(LGA)。布线图案形成高密度的50Ω传输线。对基板而言，金属层可以是或者可以不是柔性的。
多个元件封装3、4被安装在基板2上。元件封装3、4是通过已知的薄膜技术制成，包括单个或多个无源电子元件，其被配置以形成一个滤波器14、一个平衡转换器6、输出阻抗匹配网络7和去藕电容器8。在优选实施例里，使用粘剂或其它方法，元件封装3、4被直接安装在柔性基板上，并通过焊线10被电连接到布线图。但在另一个实施例里，元件封装3、4可以被制成作为无源表面安装器件，用来安装到柔性基板的一个焊盘上。
为了完成射频模块的功能电子电路，两个有源电子器件5、13被安装在柔性基板上的焊盘11、12上。有源器件包括一个功率放大器13和一个开关5。为了完成封装并保护有源元件，柔性基板2的顶表面被封装在一个非柔性的非导电胶接材料15内。
完成的射频模块可以被安装在电子设备内，如移动电话和其它无线设备。
与现有技术相比，本发明的优点包括柔性基板比硬质基板薄50％以上。柔性基板可以比0.15mm更薄。无源元件被集成在功能元件封装里，然后其被安装在柔性基板上，从而降低了安装在柔性基板上的分立无源元件数目。这些通过薄膜技术制成的集成无源元件封装可能比制成标准0201无源元件的单个离散元件薄1/3以上，允许更简易的制造和布线图/点焊分布。与标准0201无源元件的300μm相比，集成无源元件封装可以薄到175μm。薄柔性基板和集成无源元件允许在布线图里实现狭窄的50Ω传输线。最后，将该封装密封在一个非柔性材料里，使其变成刚性的，并保护模块免受机械应力。以上获得的结果是一个在电子设备内更小、更便宜，更易制造的电子电路封装。
本发明的另一个方面是将多个无源元件集成到单个元件封装内。这样可以减少焊接线数目以及与无源设备的外部连接，其改善性能并降低了高频应用里的干扰，如射频前端模块。
应该理解，本领域那些有经验的技术人员所熟悉的修改和/或替换不会被看作超出本发明的范围之外。

Claims (20)

1.一种电子电路封装，包括：
一个柔性基板；
一个电子元件封装，其被安装在柔性基板上，该电子元件封装是一个集成薄膜电路，包括两个或多个电子元件被集成到该封装里，和
一个电子器件，其被安装在柔性基板上，并被电连接到该电子元件封装，
所述电子元件封装和所述电子器件安装在所述柔性基板的同一面，
一个在柔性基板上形成的布线图案，电子元件封装和电子器件都被电连接到该布线图案。
2.根据权利要求1所述的封装，其中电子元件封装和电子器件都是表面安装(surface-mount)类型。
3.根据权利要求1所述的封装，其中两个或多个电子元件是无源电子器件。
4.根据权利要求1所述的封装，其中电子器件包括一个半导体芯片器件或封装集成电路。
5.根据权利要求4所述的封装，其中半导体芯片器件选自：射频芯片、低噪声放大器、功率放大器和开关。
6.根据权利要求1所述的封装，其中柔性基板的厚度不大于0.15mm。
7.根据权利要求1所述的封装，其中布线图案包括一个焊盘用来安装电子元件封装和电子器件。
8.根据权利要求1所述的封装，还包括在柔性基板上的封装材料，封 装材料密封住电子元件封装和电子器件。
9.根据权利要求8所述的封装，其中封装材料在最终状态上是非柔性的，从而电子电路封装是刚性的。
10.一种射频前端模块，包括权利要求1所述的电子电路封装。
11.一种电子设备，包括权利要求1所述的电子电路封装。
12.一种电子电路封装，包括：
一个柔性基板，其有第一和第二表面，以及在至少第一表面上形成的布线图，
一个电子元件封装，其被安装在柔性基板的第二表面上，并被电连接到布线图，所述电子元件封装是一个集成薄膜电路，并且电子元件是无源电子器件，包括两个或多个电子元件被集成到电子元件封装内，和
一个表面安装的电子器件，其被安装在柔性基板的第二表面上，并被电连接到布线图，所述表面安装电子器件包括一个半导体芯片器件或封装IC。
13.根据权利要求12所述的封装，其中柔性基板的厚度小于0.5mm。
14.根据权利要求12所述的封装，其中布线图是通过沉积金属层在柔性基板的第一和/或第二表面上而形成的。
15.一种电子封装，包括：
一个柔性基板，厚度小于0.15mm，以及一个在其上形成的布线图，
一个或多个无源电子元件被集成到一个元件封装内，该元件封装是集成薄膜电路，被安装在柔性基板上，并被电连接到布线图，和
一个有源电子器件，被安装在柔性基板上，并被电连接到布线图， 
所述电子元件封装和所述电子器件安装在所述柔性基板的同一面。
16.根据权利要求15所述的封装，还包括在柔性基板上的非柔性封装材料，该封装材料密封住电子元件封装和电子器件。
17.根据权利要求15所述的封装，其中柔性基板有第一和第二表面，在第一和第二表面上形成布线图。
18.一种射频前端模块，包括：
一个柔性基板，在其上形成有一个布线图，
两个或多个集成电子器件，其被安装在柔性基板上，并被电连接到布线图，集成电子器件是集成薄膜电路，选自：滤波器、平衡转换器、阻抗匹配网络，和
一个表面封装的射频芯片，其被安装在柔性基板上，并被电连接到布线图，
所述集成电子器件和所述射频芯片安装在所述柔性基板的同一面。
19.根据权利要求18所述的射频前端模块，还包括在柔性基板上的非柔性封装材料，封装材料密封住所述集成电子器件和所述射频芯片。
20.一种无线电子设备，包括权利要求19所述的射频前端模块。 
CN2008800000042A 2008-02-03 2008-02-03 电子电路封装 Expired - Fee Related CN101657896B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2008/070258 WO2009100614A1 (en) 2008-02-03 2008-02-03 Electronic circuit package

Publications (2)

Publication Number Publication Date
CN101657896A CN101657896A (zh) 2010-02-24
CN101657896B true CN101657896B (zh) 2011-12-28

Family

ID=40956631

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2008800000042A Expired - Fee Related CN101657896B (zh) 2008-02-03 2008-02-03 电子电路封装

Country Status (2)

Country Link
CN (1) CN101657896B (zh)
WO (1) WO2009100614A1 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102184917B (zh) * 2011-03-25 2013-04-03 锐迪科创微电子（北京）有限公司 采用四方扁平无引脚封装的gsm射频发射前端模块
WO2020132995A1 (zh) * 2018-12-26 2020-07-02 天津大学 具有集成电路模块和声波滤波器模块的柔性系统

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7208824B2 (en) * 2004-10-28 2007-04-24 Samsung Electronics Co., Ltd. Land grid array module

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3753538B2 (ja) * 1998-06-02 2006-03-08 富士通株式会社 半導体装置
JP2007173371A (ja) * 2005-12-20 2007-07-05 Shinko Electric Ind Co Ltd フレキシブル配線基板の製造方法及び電子部品実装構造体の製造方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7208824B2 (en) * 2004-10-28 2007-04-24 Samsung Electronics Co., Ltd. Land grid array module

Also Published As

Publication number Publication date
WO2009100614A1 (en) 2009-08-20
CN101657896A (zh) 2010-02-24

Similar Documents

Publication Publication Date Title
US7470977B2 (en) Modular board device, high frequency module, and method of manufacturing same
US8058714B2 (en) Overmolded semiconductor package with an integrated antenna
US8030770B1 (en) Substrateless package
US20080315396A1 (en) Mold compound circuit structure for enhanced electrical and thermal performance
US10219390B2 (en) Fabrication method of packaging substrate having embedded passive component
KR100744979B1 (ko) 아날로그 반도체 칩 및 디지털 반도체 칩이 순서대로적층된 ｓｉｐ 타입 패키지, 및 그 제조 방법
US20080217708A1 (en) Integrated passive cap in a system-in-package
US20080315356A1 (en) Semiconductor die with backside passive device integration
US8841759B2 (en) Semiconductor package and manufacturing method thereof
KR100963471B1 (ko) 로직 및 메모리 집적 회로의 패키징 방법, 패키징된 집적회로 및 시스템
KR20080057190A (ko) 향상된 접지 성능과 매립된 안테나를 갖는 3ｄ 전자 패키징구조체
JP2008166821A (ja) Ｒｆモジュールパッケージ及びその形成方法
CN104244152B (zh) 微机电系统麦克风封装及封装方法
CN101409279A (zh) 包含与芯片背面相连的电子元件的半导体器件
US20080130257A1 (en) Assembly comprising a substrate and a chip mounted on the substrate and a method for fabricating the same
US7074647B2 (en) Semiconductor component comprising leadframe, semiconductor chip and integrated passive component in vertical relationship to each other
JP2008205975A (ja) 半導体集積回路
US20090189269A1 (en) Electronic Circuit Package
US20110156203A1 (en) Integrated passive device assembly
US6636416B2 (en) Electronic assembly with laterally connected capacitors and manufacturing method
US7964953B2 (en) Stacked type chip package structure
WO2004114407A1 (en) Optimized multi-application assembly
CN101657896B (zh) 电子电路封装
US20060286711A1 (en) Signal isolation in a package substrate
CN108781508A (zh) 用于准确控制与接地面的距离的无源器件组装件

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20111228

Termination date: 20220203