CN101640179A - Method for manufacturing weld pad structure - Google Patents
Method for manufacturing weld pad structure Download PDFInfo
- Publication number
- CN101640179A CN101640179A CN200810117505A CN200810117505A CN101640179A CN 101640179 A CN101640179 A CN 101640179A CN 200810117505 A CN200810117505 A CN 200810117505A CN 200810117505 A CN200810117505 A CN 200810117505A CN 101640179 A CN101640179 A CN 101640179A
- Authority
- CN
- China
- Prior art keywords
- layer
- weld pad
- metal level
- pad structure
- crystalline phase
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02165—Reinforcing structures
- H01L2224/02166—Collar structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Abstract
The invention discloses a method for manufacturing a weld pad structure, which comprises the steps of: providing a substrate with a semiconductor device, wherein the substrate at least comprises an inter-metallic dielectric layer and a metal interconnection layer embedded in the inter-metallic dielectric layer; forming a passivation layer covering on the surfaces of the inter-metallic dielectric layer and the metal interconnection layer, and forming an opening in the passivation layer to expose the metal interconnection layer; forming a metal layer which is used for manufacturing a weld pad and has a steady state crystal phase in the opening; and patterning the metal layer to form the weld pad structure. The adoption of the method for manufacturing the weld pad structure can prevent a novel crystal phase precipitated by secondary crystallization from being corroded by used weak acid cooling water for segmenting wafers when the wafers are segmented during the encapsulation, thereby ensuring that the surface of the weld pad has good adhesiveness and can be firmly joined with leads.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, particularly a kind of manufacture method of welding pad structure.
Background technology
Along with very lagre scale integrated circuit (VLSIC) high integration and high performance demand are increased gradually, semiconductor technology is towards 65nm even the more technology node development of small-feature-size, and the resistance capacitance that the arithmetic speed of chip obviously is subjected to plain conductor and is caused postpones the influence of (Resistance Capacitance Delay Time, RC DelayTime).Therefore in present semiconductor fabrication, adopt copper metal interconnected with low-resistivity more, replace traditional aluminum metal interconnection, to improve the phenomenon that RC postpones.
Because copper has the characteristic of low-resistivity, is that the device of interconnection line can bear more intensive circuit arrangement with copper, reduces production costs, and more can promote the arithmetic speed of chip.In addition, copper also has good deelectric transferred ability, makes longer and stable advantage such as better of life-span of device.In the metal interconnected integrated circuit of copper, the general aluminum or aluminum alloy that adopts is made the weld pad (Bonding Pad) that is used for welding lead on last one deck of multiple layer of copper interconnection layer, described weld pad electrically connects by lead-in wire and pin, and the encapsulation back connects external circuit by pin.
Publication number is the manufacture method that discloses the welding pad structure of the metal interconnected semiconductor device of a kind of copper among the embodiment of CN101136356A patent application document: the Semiconductor substrate that has buffer layer and copper interconnection layer is provided, and described copper interconnection layer is embedded in the buffer layer; Form diffusion impervious layer at described copper interconnection layer and dielectric isolation laminar surface then; Then on diffusion impervious layer, form passivation layer, on described passivation layer, etch opening and plated metal aluminium, form the weld pad of aluminium matter.
Concrete, the technology of existing copper interconnection technique formation weld pad is extremely shown in Figure 3 referring to Fig. 1.As shown in Figure 1, semi-conductive substrate 100 at first is provided, have intermetallic dielectric layer 110 on the Semiconductor substrate 100 and be embedded in last one deck copper interconnection layer 105 in the intermetallic dielectric layer 110, on described copper interconnection layer 105, form etching stop layer 120 and passivation layer 130 successively, spin coating photoresist 140 on described passivation layer 130, exposure, the back of developing form the pattern of opening 135 on photoresist 140, in passivation layer 130, etch opening 135 then, for preventing the copper interconnection layer 105 of overetch destruction lower floor, etching ends in the etching stop layer 120; Then as shown in Figure 2, remove photoresist 140 (figure does not show), then wet chemical cleans and removes etch residue; As shown in Figure 3, with remaining etching stop layer 120 complete etchings and expose copper interconnection layer 105, then the cvd nitride tantalum barrier layer 150, and deposition is used to make the metal level (figure does not show) of weld pad in opening 135, and this metal level of patterning forms weld pad 145.
In actual production process, the metal level that deposition is used to make weld pad generally adopts sputtering method, for example, the aluminum bronze metal that adopts cupric 0.5wt% (atomic percent) is as target, under the about 270 ℃ condition of depositing temperature, deposition is used to make the metal level of weld pad, removes unnecessary metal level then and forms weld pad, forms protective layer at last on weld pad; In the technology, also under 400 ℃ temperature, carry out about 30 minutes annealing in process in hydrogen or the nitrogen atmosphere, thereby remove the unsaturated bond of semiconductor device surface, and then enter encapsulated phase, carry out technologies such as burst, welding lead thereafter.Yet when welding lead, through regular meeting take place lead-in wire can not with weld pad surface firm engagement, thereby cause the problem that goes between and lost efficacy.
Summary of the invention
The problem that the present invention solves provides a kind of manufacture method of welding pad structure, adopt weld pad that described method makes can with the lead-in wire firm engagement.
For addressing the above problem, the invention provides a kind of manufacture method of welding pad structure, comprising:
Substrate with semiconductor device is provided, and described substrate comprises intermetallic dielectric layer and the metal interconnecting layer that is embedded in the intermetallic dielectric layer at least;
Formation is covered in passivation layer on intermetallic dielectric layer and the metal interconnected laminar surface, forms opening in described passivation layer, and metal interconnecting layer is exposed;
In described opening, be formed for making metal level weld pad, that have the stable state crystalline phase;
Thereby the described metal level of patterning forms welding pad structure.
Optionally, describedly be formed for making metal level weld pad, that have the stable state crystalline phase and can adopt physical vaporous deposition.
Optionally, described physical vaporous deposition can be the plasma sputtering method.
Optionally, the depositing temperature of described plasma sputtering method is higher than the secondary recrystallization temperature of described metal level.
Optionally, described metal level is the albronze of cupric 0.5wt%, and the depositing temperature of described plasma sputtering method is 400 ℃ to 420 ℃.
Optionally, described physical vaporous deposition can also be the pulse laser method.
Optionally, in described opening, be formed for to comprise after making metal level weld pad, that have the stable state crystalline phase crystalline phase composition of checking described metal level.
Compared with prior art, technique scheme has the following advantages: the manufacture method of described welding pad structure, by being formed for making metal level weld pad, that have the stable state crystalline phase, for example, be higher than the condition deposit metal level of secondary recrystallization temperature, and making weld pad that secondary crystallization phenomenon not take place in technologies such as subsequent anneal, its crystalline phase is formed and is remained unchanged, and does not have new crystalline phase (CuAl for example
2) separate out, therefore when avoiding encapsulation process to cut apart wafer, the new crystalline phase that the secondary crystallization is separated out is cut apart the used faintly acid cooling water corrosion of wafer, thereby guarantees that the weld pad surface has good tack, can with the lead-in wire firm engagement.
Adopt the plasma sputtering method to deposit described metal level; can form the process compatible of weld pad with conventional art; reduce the cost of research and development; preferred depositing temperature is 410 ℃; not only can guarantee that under this temperature depositing temperature is higher than the secondary recrystallization temperature, and guarantee that suprabasil semiconductor device can not lose efficacy because temperature is too high.
In addition, adopt the pulse laser method to deposit described metal level, can be formed for making the metal level of weld pad, also can effectively avoid the too high problem that causes substrate semiconductor-on-insulator component failure of temperature at lower depositing temperature.
Description of drawings
Shown in accompanying drawing, above-mentioned and other purpose, feature and advantage of the present invention will be more clear.Reference numeral identical in whole accompanying drawings is indicated identical part.Painstakingly do not draw accompanying drawing, focus on illustrating purport of the present invention by actual size equal proportion convergent-divergent.
Fig. 1 to Fig. 3 forms the schematic diagram of weld pad technology for the existing copper interconnection technique;
Fig. 4 to Fig. 9 is the schematic diagram of the manufacture method of welding pad structure among the embodiment one.
Embodiment
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, the specific embodiment of the present invention is described in detail below in conjunction with accompanying drawing.
A lot of details have been set forth in the following description so that fully understand the present invention, but the present invention can also adopt other to be different from alternate manner described here and implement, those skilled in the art can do similar popularization under the situation of intension of the present invention, so the present invention is not subjected to the restriction of following public specific embodiment.
Secondly, the present invention is described in detail in conjunction with schematic diagram, when the embodiment of the invention is described in detail in detail; for ease of explanation; the profile of expression device architecture can be disobeyed general ratio and be done local the amplification, and described schematic diagram is example, and it should not limit the scope of protection of the invention at this.The three dimensions size that in actual fabrication, should comprise in addition, length, width and the degree of depth.
Technical scheme of the present invention is in the nature: be formed for making metal level weld pad, that have the stable state crystalline phase, then guarantee in chemical metallurgies such as subsequent annealing skill the secondary crystallization not to take place, thereby obtain the good weld pad surface of tack.
The manufacture method of the welding pad structure that technical scheme of the present invention provides specifically comprises:
Substrate with semiconductor device is provided, and described substrate comprises intermetallic dielectric layer and the metal interconnecting layer that is embedded in the intermetallic dielectric layer at least;
Formation is covered in passivation layer on intermetallic dielectric layer and the metal interconnected laminar surface, forms opening in described passivation layer, and metal interconnecting layer is exposed;
In described opening, be formed for making metal level weld pad, that have the stable state crystalline phase;
Thereby the described metal level of patterning forms welding pad structure.
In addition, describedly be formed for making metal level weld pad, that have the stable state crystalline phase and can adopt physical vaporous deposition.
In addition, described physical vaporous deposition can be the plasma sputtering method.
In addition, the depositing temperature of described plasma sputtering method is higher than the secondary recrystallization temperature of described metal level.
In addition, described metal level is the albronze of cupric 0.5wt%, and the depositing temperature of described plasma sputtering method can be 400 ℃ to 420 ℃.
In addition, described physical vaporous deposition can be the pulse laser method.
In addition, in described opening, be formed for to comprise after making metal level weld pad, that have the stable state crystalline phase crystalline phase composition of checking described metal level.
Embodiment one
Fig. 4 to Fig. 9 is the schematic diagram of the manufacture method of welding pad structure in the present embodiment.Present embodiment adopts plasma sputtering method deposition to be used to make metal level weld pad, that have the stable state crystalline phase.
With reference to shown in Figure 4, a substrate 200 with semiconductor device is provided, described substrate 200 includes the multiple layer metal interconnection layer on source region and the active area; Form last one deck metal interconnecting layer 205 and intermetallic dielectric layer 210 in substrate 200, metal interconnecting layer 205 is embedded among the intermetallic dielectric layer 210.Wherein the material of metal interconnecting layer 205 is a copper, and its formation method includes but not limited to physical vaporous deposition and chemical vapour deposition technique; The material of forming intermetallic dielectric layer 210 includes but not limited to unadulterated silicon dioxide (USG), phosphorosilicate glass (PSG), Pyrex (BSG), boron-phosphorosilicate glass (BPSG), fluorine silex glass (FSG) or has a kind of or its combination in the advanced low-k materials, described have advanced low-k materials and include but not limited to black diamond (Black Diamond, BD), intermetallic dielectric layer 210 formation methods include but not limited to HDPCVD, PECVD or SACVD.
On metal interconnecting layer 205 and intermetallic dielectric layer 210, form etching stop layer 220, be used for determining etching terminal, prevent the damage of overetch simultaneously lower metal interconnection layer 205; Etching stop layer 220 includes but not limited to a kind of in silicon nitride, silicon oxynitride, carborundum, the nitrogen-doped silicon carbide, and its formation method is a chemical vapour deposition technique, is 100 dust to 500 dusts according to device property and size design deposit thickness.
On etching stop layer 220, form passivation layer 230, be used to protect the semiconductor device of lower floor to avoid the pollution of moisture and impurity, also be used for the isolated insulation of weld pad, to prevent the metal connecting line short circuit; Passivation layer 230 can be individual layer or two-layer at least, and its material includes but not limited to silica, silicon oxynitride, silicon nitride, adopts chemical vapour deposition technique to form.
With reference to shown in Figure 5, spin coating photoresist layer 240 on passivation layer 230, through overexposure, the formation pattern that develops, the photoresist layer 240 with patterning is that mask forms opening 235 in passivation layer 230 ionic medium etching methods then; Described opening 235 ends in the etching stop layer 220, that is to say, promptly stops etching after removing a part of etching stop layer, and the metal of remaining etching stop layer protection lower floor is not by plasma damage.Opening 235 is positioned at the position of metal interconnecting layer 205 top correspondences, waits to remove and fills metal behind the remaining etching stop layer to form weld pad in opening 235.
With reference to shown in Figure 6, adopt the plasma etching of fluorocarbon to remove remaining etching stop layer, to expose the metal interconnecting layer 205 under the opening 235, described fluorocarbon comprises CF
4, C
4F
8, CHF
3In a kind of or at least two kinds of combination of gases, also be mixed with argon gas simultaneously as diluent gas, remove photoresist layer (figure do not show) then.
With reference to shown in Figure 7, wet-cleaned is removed after the etch residue, form barrier layer 250 on metal interconnecting layer 205, the metal interconnecting layer 205 that expose to the major general on described barrier layer 250 and the sidewall of opening 235 cover, and the copper that is used for barrier metal interconnection layer 205 surfaces spreads to the upper strata.This barrier layer 250 can be individual layer or two-layer at least, its material includes but not limited to the combination of a kind of among Ta, TaN, TaSiN, the WN or at least two kinds, adopting physical vaporous deposition or chemical vapour deposition technique to make, is about 100 dusts according to device property and size design deposit thickness.
With reference to shown in Figure 8, in the opening 235 that is coated with barrier layer 250, be formed for making metal level 245 weld pad, that have the stable state crystalline phase, the thickness of this metal level 245 is 9000 dust to 10000 dusts.This metal level 245 adopts physical vaporous deposition to form.Preferable methods is the plasma sputtering method, albronze with cupric 5wt% (atomic percent) is a target, be higher than sputtering sedimentation metal level 245 under the condition of secondary recrystallization temperature of described albronze at depositing temperature, depositing temperature is 400 ℃ to 420 ℃, adopt the plasma sputtering method can form the process compatible of weld pad, reduce the cost of researching and developing with conventional art.Preferred depositing temperature is 410 ℃, not only can guarantee that under this temperature depositing temperature is higher than the secondary recrystallization temperature, and guarantee that suprabasil semiconductor device can not lose efficacy because temperature is too high.
With reference to shown in Figure 9, the described metal level 245 of patterning (figure does not show) forms weld pad 246, then forms the protective layer 260 that is provided with opening on weld pad 246, thereby forms welding pad structure.
Described stable state crystalline phase is meant that alloy has stable crystalline phase and forms, and in other words, each constituent element in the alloy forms the solid solution of stable components, homogeneous.When the alloy with stable state crystalline phase experiences metallurgyization processing (Alloy) technology such as annealing again, secondary crystallization phenomenon does not take place, its crystalline phase is formed and is remained unchanged.Described secondary crystallization is meant: alloy is when metallurgyization processing (Alloy) technologies such as experience annealing, and the position that was solid-solubilized in the solute atoms in the solvent atomic lattice originally rearranges, and separates out new crystalline phase, thereby the crystalline phase composition of alloy is changed.
For example, in conventional art, adopt the albronze target of 5wt%, the described metal level of sputtering sedimentation under the about 270 ℃ condition of depositing temperature, the described metal level of patterning forms weld pad, thereafter in the technology, also under 400 ℃ temperature, carry out about 30 minutes annealing in process in hydrogen or the nitrogen atmosphere, thereby remove the unsaturated bond of semiconductor device surface, and then enter encapsulated phase, carry out technologies such as burst, welding lead.Yet when welding lead, through regular meeting take place lead-in wire can not with weld pad surface firm engagement, thereby cause the problem that goes between and lost efficacy.
For the problems referred to above that occur in the conventional art, think after the inventor analyzes: lead-in wire why can not with weld pad surface firm engagement because relatively poor the causing of tack on weld pad surface.The metal level that sputtering sedimentation forms under about 270 ℃ condition, the solute copper atom is solid-solubilized in the lattice of solvent aluminium atom, yet this moment, the crystalline phase of copper aluminum metal layer was unsettled, form after the welding pad structure, annealing process under 400 ℃ of conditions will make the position that is solid-solubilized in the solute copper atom in the solvent aluminium atomic lattice rearrange, so-called secondary crystallization just takes place, thereby separates out new crystalline phase CuAl
2, and in follow-up encapsulation process, cut apart wafer to adopt weakly acidic cooling water that wafer is cooled off usually, at this moment, be positioned at the new crystalline phase CuAl on weld pad surface
2Will with the reaction of weakly acidic cooling water, make the weld pad surface small defective that is corroded out, this has directly caused the tack on weld pad surface relatively poor, can not with the lead-in wire strong bonded.
The manufacture method of the welding pad structure described in the present embodiment, be higher than the condition deposit metal level 245 of albronze secondary recrystallization temperature, then form metal level 245 with stable state crystalline phase, when forming after the welding pad structure metallurgyization treatment process such as experience annealing again, secondary crystallization phenomenon does not take place in the weld pad of albronze, its crystalline phase composition remains unchanged, and does not have new crystalline phase CuAl
2Therefore separate out, can effectively avoid the follow-up weld pad surface corrosion that wafer process causes of cutting apart, thereby improve the tack on weld pad surface, can with the lead-in wire firm engagement.
In addition; in the present embodiment; the material of described composition weld pad 246 is the albronze of cupric 5%; depositing temperature was 400 ℃ to the 420 ℃ secondary recrystallization temperatures that can be higher than this albronze when deposition was used to make the metal level 245 of weld pad; those skilled in that art should know; alloy for heterogeneity; the secondary recrystallization temperature is also different; therefore, for the weld pad that adopts other composition alloys to make, as long as depositing temperature is higher than their secondary recrystallization temperature; just can realize the effect of the technical scheme of present embodiment equally; improve the tack on weld pad surface, can with the lead-in wire firm engagement, also within protection scope of the present invention.
The manufacture method of the welding pad structure that the foregoing description discloses, under the condition of the secondary recrystallization temperature by being higher than albronze at depositing temperature, adopt the plasma sputtering method to form the metal level with stable state crystalline phase, the secondary crystallization can not take place in the weld pad that this metal level of patterning forms in subsequent annealing technology.In addition, can also form the metal level with stable state crystalline phase by other method, for example the pulse laser method is specifically described in following examples.
Embodiment two
The manufacture method of the welding pad structure that present embodiment discloses and the difference of embodiment one only are: (Pulsed Laser Deposition PLD) is formed for making metal level weld pad, that have the stable state crystalline phase to adopt the pulse laser method.
The pulse laser method also is a kind of method of thin film deposition commonly used.When deposition is used to make the metal level of weld pad, albronze with cupric 5wt% is a target, utilize the laser beam of pulse to focus on target material surface, the laser of superpower power makes that the quick ionization of target material is atom, ion or atomic group, deposit in the substrate then, the high order harmonic component laser that can use the excimer laser of 193nm or 248nm and 266nm or 355nm is as light source, and the power of laser can be 500w to 1000w.Other steps and the embodiment one of the manufacture method of the described welding pad structure of present embodiment are similar, do not repeat them here.
Adopt pulse laser method deposition to be used to make the metal level of weld pad, can be implemented in and form the stable state crystalline phase under the lower depositing temperature, with respect to the plasma sputtering method described in the embodiment one, pulse laser method depositing temperature is lower, for example can form the metal level of albronze in about 300 ℃ of depositions with stable state crystalline phase, when this metal level forms after welding pad structure metallurgyization treatment process such as experience annealing again, secondary crystallization phenomenon does not take place in the weld pad of albronze, its crystalline phase composition remains unchanged, and does not have new crystalline phase CuAl
2Separate out, therefore also can effectively avoid the follow-up weld pad surface corrosion that wafer process causes of cutting apart, thereby reach the tack that improves the weld pad surface enough, with the purpose of lead-in wire firm engagement, in addition, the lower depositing temperature metal level that is formed for making weld pad can also effectively be avoided the too high problem that causes substrate semiconductor-on-insulator component failure of temperature.
In addition, the manufacture method of the described welding pad structure of technical solution of the present invention is formed for can also comprising after making metal level weld pad, that have the stable state crystalline phase crystalline phase composition of checking described metal level in described opening, specifically describe in following examples.
Embodiment three
The manufacture method of the described welding pad structure of present embodiment comprises:
Substrate with semiconductor device is provided, and described substrate comprises intermetallic dielectric layer and the metal interconnecting layer that is embedded in the intermetallic dielectric layer at least;
Formation is covered in passivation layer on intermetallic dielectric layer and the metal interconnected laminar surface, forms opening in described passivation layer, and metal interconnecting layer is exposed;
In described opening, be formed for making metal level weld pad, that have the stable state crystalline phase;
Adopt surperficial micro-area composition analytical technology to check the crystalline phase composition of described metal level, confirm that described metal level has the stable state crystalline phase, described surperficial micro-area composition analytical technology can be known film analysis technology such as atom-probe or SEM-EDX;
Thereby the described metal level of patterning forms welding pad structure.
The manufacture method of the welding pad structure described in the present embodiment and the difference of previous embodiment are: be formed for also comprising after making metal level weld pad, that have the stable state crystalline phase crystalline phase composition of checking described metal level in described opening, thereby confirm that described metal level has the stable state crystalline phase, the tack that guarantee to form the weld pad surface is good, can with the lead-in wire firm engagement.Other steps and the embodiment one of the manufacture method of the described welding pad structure of present embodiment are similar, are not described in detail in this.
The above only is preferred embodiment of the present invention, is not the present invention is done any pro forma restriction.
Though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention.Any those of ordinary skill in the art, do not breaking away under the technical solution of the present invention scope situation, all can utilize the method and the technology contents of above-mentioned announcement that technical solution of the present invention is made many possible changes and modification, or be revised as the equivalent embodiment of equivalent variations.Therefore, every content that does not break away from technical solution of the present invention, all still belongs in the scope of technical solution of the present invention protection any simple modification, equivalent variations and modification that above embodiment did according to technical spirit of the present invention.
Claims (7)
1, a kind of manufacture method of welding pad structure is characterized in that, comprising:
Substrate with semiconductor device is provided, and described substrate comprises intermetallic dielectric layer and the metal interconnecting layer that is embedded in the intermetallic dielectric layer at least;
Formation is covered in passivation layer on intermetallic dielectric layer and the metal interconnected laminar surface, forms opening in described passivation layer, and metal interconnecting layer is exposed;
In described opening, be formed for making metal level weld pad, that have the stable state crystalline phase;
Thereby the described metal level of patterning forms welding pad structure.
2, the manufacture method of welding pad structure according to claim 1 is characterized in that, describedly is formed for making metal level weld pad, that have the stable state crystalline phase and adopts physical vaporous deposition.
3, the manufacture method of welding pad structure according to claim 2 is characterized in that, described physical vaporous deposition is the plasma sputtering method.
4, the manufacture method of welding pad structure according to claim 3 is characterized in that, the depositing temperature of described plasma sputtering method is higher than the secondary recrystallization temperature of described metal level.
5, the manufacture method of welding pad structure according to claim 4 is characterized in that, described metal level is the albronze of cupric 0.5wt%, and the depositing temperature of described plasma sputtering method is 400 ℃ to 420 ℃.
6, the manufacture method of welding pad structure according to claim 2 is characterized in that, described physical vaporous deposition is the pulse laser method.
7, according to the manufacture method of each described welding pad structure of claim 1 to 6, it is characterized in that, in described opening, be formed for also comprising after making metal level weld pad, that have the stable state crystalline phase crystalline phase composition of checking described metal level.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2008101175050A CN101640179B (en) | 2008-07-31 | 2008-07-31 | Method for manufacturing weld pad structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2008101175050A CN101640179B (en) | 2008-07-31 | 2008-07-31 | Method for manufacturing weld pad structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101640179A true CN101640179A (en) | 2010-02-03 |
| CN101640179B CN101640179B (en) | 2011-03-23 |
Family
ID=41615096
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2008101175050A Expired - Fee Related CN101640179B (en) | 2008-07-31 | 2008-07-31 | Method for manufacturing weld pad structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101640179B (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102446757A (en) * | 2011-10-12 | 2012-05-09 | 上海华力微电子有限公司 | Method for manufacturing aluminum liner of double-layer passivation protection layer |
| CN103377954A (en) * | 2012-04-28 | 2013-10-30 | 无锡华润上华科技有限公司 | Forming method for grid bonding pad and source bonding pad |
| CN103985807A (en) * | 2013-02-07 | 2014-08-13 | 罗容 | Inorganic substrate and manufacturing method thereof |
| CN105280596A (en) * | 2014-07-10 | 2016-01-27 | 中芯国际集成电路制造(上海)有限公司 | Bonding pad structure and manufacturing method thereof |
| CN106531637A (en) * | 2016-12-05 | 2017-03-22 | 武汉新芯集成电路制造有限公司 | Method for improving defects of aluminum film |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060244156A1 (en) * | 2005-04-18 | 2006-11-02 | Tao Cheng | Bond pad structures and semiconductor devices using the same |
| CN100459099C (en) * | 2006-08-31 | 2009-02-04 | 中芯国际集成电路制造(上海)有限公司 | Copper interconnected fabricating method for semiconductor device and structure thereof |
-
2008
- 2008-07-31 CN CN2008101175050A patent/CN101640179B/en not_active Expired - Fee Related
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102446757A (en) * | 2011-10-12 | 2012-05-09 | 上海华力微电子有限公司 | Method for manufacturing aluminum liner of double-layer passivation protection layer |
| CN103377954A (en) * | 2012-04-28 | 2013-10-30 | 无锡华润上华科技有限公司 | Forming method for grid bonding pad and source bonding pad |
| CN103377954B (en) * | 2012-04-28 | 2016-12-14 | 无锡华润上华科技有限公司 | Gate pads and the forming method of source pad |
| CN103985807A (en) * | 2013-02-07 | 2014-08-13 | 罗容 | Inorganic substrate and manufacturing method thereof |
| CN103985807B (en) * | 2013-02-07 | 2016-12-28 | 深圳大道半导体有限公司 | Inorganic substrate and manufacture method thereof |
| CN105280596A (en) * | 2014-07-10 | 2016-01-27 | 中芯国际集成电路制造(上海)有限公司 | Bonding pad structure and manufacturing method thereof |
| CN106531637A (en) * | 2016-12-05 | 2017-03-22 | 武汉新芯集成电路制造有限公司 | Method for improving defects of aluminum film |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101640179B (en) | 2011-03-23 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI380404B (en) | ||
| JP2009147218A (en) | Semiconductor device, and method for manufacturing the same | |
| US7301216B2 (en) | Fuse structure | |
| US8835319B2 (en) | Protection layers for conductive pads and methods of formation thereof | |
| JP2001319928A (en) | Semiconductor integrated circuit device and manufacturing method therefor | |
| CN101640179B (en) | Method for manufacturing weld pad structure | |
| JP2002353308A (en) | Semiconductor device and its manufacturing method | |
| US11929423B2 (en) | Etching platinum-containing thin film using protective cap layer | |
| TWI270174B (en) | Method of reducing process steps in metal line protective structure formation | |
| US6620721B1 (en) | Method of forming a self-aligning pad | |
| US20190295954A1 (en) | Semiconductor device | |
| US7482684B2 (en) | Semiconductor device with a dopant region in a lower wire | |
| JP2004235415A (en) | Manufacturing method of semiconductor device | |
| US9059110B2 (en) | Reduction of fluorine contamination of bond pads of semiconductor devices | |
| US8236703B2 (en) | Methods for removing contaminants from aluminum-comprising bond pads and integrated circuits therefrom | |
| JP2010123586A (en) | Semiconductor device, and method of manufacturing the same | |
| JP2005183866A (en) | Semiconductor wafer and dicing method | |
| JP2006147923A (en) | Semiconductor device and its manufacturing method | |
| US20050191767A1 (en) | Focused ion beam circuit repair using a hardmask and wet chemistry | |
| JP2006179950A (en) | Manufacturing method of semiconductor integrated circuit device | |
| US11081390B2 (en) | Multi-pass plating process with intermediate rinse and dry | |
| SG184671A1 (en) | Protection of reactive metal surfaces of semiconductor devices during shipping by providing an additional protection layer | |
| US7943459B2 (en) | Semiconductor device and method of manufacturing the semiconductor device | |
| US7163884B2 (en) | Semiconductor device and fabrication method thereof | |
| CN1464529A (en) | Method for making welding pad |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110323 Termination date: 20190731 |