CN101625489B - Liquid crystal display panel and drive method thereof - Google Patents
Liquid crystal display panel and drive method thereof Download PDFInfo
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- CN101625489B CN101625489B CN2008101360780A CN200810136078A CN101625489B CN 101625489 B CN101625489 B CN 101625489B CN 2008101360780 A CN2008101360780 A CN 2008101360780A CN 200810136078 A CN200810136078 A CN 200810136078A CN 101625489 B CN101625489 B CN 101625489B
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Abstract
The invention relates to a liquid crystal display panel and a drive method thereof. The liquid crystal display panel comprises a plurality of pixels, wherein the pixels respectively comprise first assistant pixels and second assistant pixels. The first assistant pixels and the second assistant pixels are respectively loaded with the voltage of a source electrode according to the pulse of a first grid electrode. Moreover, the second assistant pixels comprise a first storage capacitor and a first compensation capacitor. The first storage capacitor is used for storing the voltage of the source electrode. The first compensation capacitor can be charged and discharged to preset voltage according to switching pulse. Afterwards, the first compensation capacitor can carry out charge neutralization with the first storage capacitor according to the pulse of a second grid electrode. Notably, the switching pulse, the pulse of the first grid electrode and the pulse of the second grid electrode are transmitted one by one according to a time sequence.
Description
Technical field
The present invention relates to a kind of display panels, and be particularly related to a kind of clearing image residue and the uneven display panels of picture.
Background technology
For multiple domain vertical orientation type liquid crystal display; Because the orientation protrusion (alignment protrusion) or the slit (slit) that are configured on colored optical filtering substrates or the display component array substrate can be so that liquid crystal molecule be multi-direction arrangement; Obtain a plurality of different orientations zones (domain), so multiple domain vertical orientation type liquid crystal display can be reached the requirement of wide viewing angle.However, the penetrance-grey scale curve of multiple domain vertical orientation type liquid crystal display (transmittance-level curve) still can have different curvature along with the visual angle change.In other words, when the visual angle changed, the brightness meeting that multiple domain vertical orientation type liquid crystal display demonstrated changed, and then caused phenomenons such as colour cast and color saturation deficiency.At present, existing people proposes following structure to solve the not enough problem of colour cast and color saturation.
Fig. 1 shows the circuit structure diagram of known pixel.With reference to Fig. 1, known pixel 100 comprises first sub-pixel 110 and second sub-pixel 120.In first sub-pixel 110, switch SW
13Can be according to sweep trace SL
11The grid impulse of being transmitted and conducting.At this moment, via data line DL
11The source voltage VS that is transmitted
11Can be stored in storage capacitors C
ST11With liquid crystal capacitance C
LC11In.Relatively, this moment switch SW
11Also can present conducting state, and the storage capacitors C in second sub-pixel 120
ST12With liquid crystal capacitance C
LC12Also can be written into source voltage VS
11
When first sub-pixel 110 and second sub-pixel 120 are written into source voltage VS
11After, switch SW
12Then can be according to sweep trace SL
12The grid impulse of being transmitted and conducting.At this moment, liquid crystal capacitance C
LC12, storage capacitors C
ST12With building-out capacitor C
CN1In electric charge will neutralize.Whereby, the penetration variable quantity that known pixel 100 is different with two sub-pixels capable of using carries out colour mixture, can be identical with the penetration variable quantity that causes the side-looking angle with the penetration variable quantity of facing, and then solve colour cast and the not enough problem of color saturation.
Yet, in technique known, whenever building-out capacitor C
CN1Carry out a charging neutrality, its inner quantity of electric charge just changes once.In other words, carrying out gray scale when switching, building-out capacitor C when 100 picture displayed of known pixel
CN1The interior quantity of electric charge also will change thereupon.In the case, because known pixel 100 unpredictable building-out capacitor C
CN1The quantity of electric charge, so known pixel 100 the inconsistent problem of grayscale voltage level will occur when showing same picture, so produce picture inhomogeneous with phenomenon such as image residue.
Summary of the invention
The present invention provides a kind of display panels, in order to solve the inhomogeneous problem with image residue of picture.
The present invention provides a kind of display panels, in order to promote the image quality of display panels.
The present invention provides a kind of driving method of display panels, in order to solve the inhomogeneous problem with image residue of picture.
The present invention provides a kind of driving method of display panels, in order to promote the image quality of display panels.
The present invention proposes a kind of display panels, comprises a plurality of pixels, and said pixel comprises first sub-pixel and second sub-pixel separately.Wherein, first sub-pixel is coupled to the data line and first sweep trace, and the first grid pulse in order to be transmitted according to first sweep trace, and is written into the source voltage that data line transmits.In addition, second sub-pixel is coupled to data line, first sweep trace, second sweep trace and level switch line, and in order to be written into source voltage according to the first grid pulse.
Further, second sub-pixel comprises first storage capacitors and first building-out capacitor.Wherein, first storage capacitors is in order to the storage source pole tension.First building-out capacitor can be according to switch pulse that the level switch line transmitted and is discharged and recharged to predeterminated voltage.Afterwards, first building-out capacitor more carries out charging neutrality according to second grid pulse that second sweep trace transmitted with first storage capacitors.It should be noted that switch pulse, first grid pulse and second grid pulse are transmitted according to time order and function one by one.
The present invention proposes a kind of display panels in addition, comprises a plurality of pixels, and said pixel comprises first sub-pixel and second sub-pixel separately.Wherein, first sub-pixel is coupled to the data line and first sweep trace, and the first grid pulse in order to be transmitted according to first sweep trace, and is written into the source voltage that data line transmits.In addition, second sub-pixel is coupled to data line, first sweep trace and second sweep trace, and in order to be written into source voltage according to the first grid pulse.
Further, second sub-pixel comprises first storage capacitors and first building-out capacitor.Wherein, first storage capacitors is in order to the storage source pole tension.First building-out capacitor is in order to discharge and recharge to predeterminated voltage according to the first grid pulse.In addition, first building-out capacitor more carries out charging neutrality according to second grid pulse that second sweep trace transmitted with first storage capacitors.It should be noted that first grid pulse and second grid pulse are transmitted according to time order and function one by one.
The present invention proposes a kind of driving method of display panels, and wherein, display panels comprises a plurality of pixels.These pixels comprise first sub-pixel and second sub-pixel, and second sub-pixel comprises first liquid crystal capacitance and first building-out capacitor.At this, first sub-pixel is coupled to the data line and first sweep trace, and second sub-pixel is coupled to data line, first sweep trace, second sweep trace and level switch line, and the driving method of display panels comprises the following steps.
At first, transmit source voltage through data line.Then, according to time order and function produce the switch pulse that transmitted by the level switch line one by one, the first grid pulse that is transmitted by first sweep trace and the second grid pulse that is transmitted by second sweep trace.Then, according to switch pulse first building-out capacitor is discharged and recharged to predeterminated voltage.Afterwards, according to the first grid pulse source voltage is loaded into first sub-pixel and first liquid crystal capacitance.The electric charge that will be stored in first building-out capacitor and first liquid crystal capacitance according to the second grid pulse at last, neutralizes.
The present invention proposes a kind of driving method of display panels in addition, and wherein, display panels comprises a plurality of pixels.These pixels comprise first sub-pixel and second sub-pixel, and second sub-pixel comprises first liquid crystal capacitance and first building-out capacitor.At this, first sub-pixel is coupled to the data line and first sweep trace, and second sub-pixel is coupled to data line, first sweep trace and second sweep trace, and the driving method of this display panels comprises the following steps.
At first, transmit source voltage through data line.Then, produce first grid pulse that is transmitted by first sweep trace and the second grid pulse that is transmitted by second sweep trace one by one according to time order and function.Then, according to the first grid pulse first building-out capacitor is discharged and recharged to predeterminated voltage, and source voltage is loaded into first sub-pixel and first liquid crystal capacitance.The electric charge that will be stored in first building-out capacitor and first liquid crystal capacitance according to the second grid pulse at last, neutralizes.
The present invention is through building-out capacitor being discharged and recharged to predeterminated voltage, causing the quantity of electric charge of building-out capacitor before neutralization, can maintain a fixed value.Whereby, the present invention can eliminate in known technology owing to unfixing image residue and the uneven problem of picture that causes of the quantity of electric charge of building-out capacitor.
In order to let the above-mentioned feature and advantage of the present invention can be more obviously understandable, the hereinafter spy enumerates a plurality of preferred embodiments, and combines accompanying drawing, elaborates as follows.
Description of drawings
Fig. 1 shows the circuit structure diagram of known pixel.
Fig. 2 A shows the circuit structure diagram according to the pixel of first embodiment of the invention.
Fig. 2 B shows in order to the waveform sequential chart of first embodiment to be described.
Fig. 3 A shows the circuit structure diagram according to the pixel of second embodiment of the invention.
Fig. 3 B shows in order to the waveform sequential chart of second embodiment to be described.
Fig. 4 A shows the circuit structure diagram according to the pixel of third embodiment of the invention.
Fig. 4 B shows in order to the waveform sequential chart of the 3rd embodiment to be described.
Fig. 5 A shows the circuit structure diagram according to the pixel of fourth embodiment of the invention.
Fig. 5 B shows in order to the waveform sequential chart of the 4th embodiment to be described.
Fig. 6 A shows the circuit structure diagram according to the pixel of fifth embodiment of the invention.
Fig. 6 B shows in order to the waveform sequential chart of the 5th embodiment to be described.
Fig. 7 A shows the circuit structure diagram according to the pixel of sixth embodiment of the invention.
Fig. 7 B shows in order to the waveform sequential chart of the 6th embodiment to be described.
Fig. 8 shows the driving method process flow diagram according to the display panels of one embodiment of the invention.
Fig. 9 shows the driving method process flow diagram according to the display panels of another embodiment of the present invention.
[main element symbol description]
100: known pixel
110,210,610: the first sub-pixels
120,220,620: the second sub-pixels
200,300,400,500,600,700: pixel
SW
11~SW
13, SW
21~SW
24, SW
51, SW
61~SW
64, SW
71: switch
C
ST11, C
ST12, C
ST21, C
ST22, C
ST31, C
ST61, C
ST62, C
ST71: storage capacitors
C
LC11, C
LC12, C
LC21, C
LC22, C
LC61, C
LC62: liquid crystal capacitance
C
CN1, C
CN2, C
CN3, C
CN41, C
CN42, C
CN6, C
CN7: building-out capacitor
DL
11, DL
21, DL
61: data line
SL
11, SL
12, SL
21, SL
22, SL
61, SL
62: sweep trace
WL
21, WL
71: the level switch line
CNL
41: the level complement line
VS
11, VS
21, VS
61: source voltage
V
Pre5, V
Pre6: predeterminated voltage
V
Com: common voltage
V
71: bucking voltage
S
21~S
23, S
41,S
61, S
62, S
71: signal
PU
21, PU
22, PU
61, PU
62: grid impulse
PU
23: switch pulse
PU
24, PU
25: certain pulses
PU
41: complementary pulse
t
2, t
6: time point
S801~S805, S901~S905: the step of the driving method of display panels
Embodiment
Before spirit of the present invention being described, suppose that at first the cited display panels of each embodiment is applicable to LCD with embodiment.Yet above-mentioned hypothesis is not in order to qualification the present invention, and those skilled in the art also can be according to spirit of the present invention, the application kenel of change display panels.
Moreover the cited display panels of each embodiment comprises a plurality of pixels, and in order to make those of ordinary skills' knowledge of can knowing clearly, below each embodiment be that example describes only with one of them pixel of display panels.And in following explanation,, in various embodiment,, then can use components identical symbol and title if function and the same or analogous element of structure are arranged for presenting consistency to explanation of the present invention.
[first embodiment]
Fig. 2 A shows the circuit structure diagram according to the pixel of first embodiment of the invention.With reference to Fig. 2 A, pixel 200 comprises first sub-pixel 210 and second sub-pixel 220.At this, first sub-pixel 210 is coupled to data line DL
21With sweep trace SL
21Second sub-pixel 220 is coupled to data line DL
21, sweep trace SL
21, sweep trace SL
22And level switch line WL
21In this embodiment, sweep trace SL
22With sweep trace SL
23Also receive the structure that is same as first sub-pixel 210 and second sub-pixel 220 respectively, for the purpose of simplifying the description, and do not illustrate in the drawings.
Further, first sub-pixel 210 comprises switch SW
24, storage capacitors C
ST21And liquid crystal capacitance C
LC21Wherein, switch SW
24First end, for example the drain electrode, be coupled to data line DL
21, and switch SW
24Control end, for example grid is connected to sweep trace SL
21Liquid crystal capacitance C
LC21First end be coupled to switch SW
24Second end, for example source electrode, and liquid crystal capacitance C
LC21Second end be coupled to common voltage V
ComAnd storage capacitors C
ST21Then with liquid crystal capacitance C
LC21Parallel connection.
Moreover second sub-pixel 220 comprises switch SW
21, switch SW
22, switch SW
23, storage capacitors C
ST22, building-out capacitor C
CN2And liquid crystal capacitance C
LC22Switch SW
21First end, for example the drain electrode, be coupled to data line DL
21, and its control end, for example grid is coupled to sweep trace SL
21Liquid crystal capacitance C
LC22First end be coupled to switch SW
21Second end, for example source electrode, and liquid crystal capacitance C
LC22Second end be coupled to common voltage V
ComStorage capacitors C
ST22Then with liquid crystal capacitance C
LC22Parallel connection.In addition, switch SW
22First end be coupled to storage capacitors C
ST22First end, and its control end is coupled to sweep trace SL
22Building-out capacitor C
CN2First end be coupled to switch SW
22Second end, and its second end is coupled to common voltage V
ComSwitch SW
23First end be coupled to building-out capacitor C
CN2First end, its control end is coupled to level switch line W
L21, and its second end is coupled to sweep trace SL
22
Fig. 2 B shows in order to the waveform sequential chart of first embodiment, wherein S to be described
21In order to be expressed as sweep trace SL
21The signal that is transmitted, S
22In order to be expressed as sweep trace SL
22The signal that is transmitted, S
23In order to be expressed as sweep trace WL
21The signal that is transmitted, VS
21In order to be expressed as data line DL
21The source voltage that is transmitted.In addition, signal S
21Voltage level can form grid impulse PU along with the change of time
21With certain pulses PU
25Similarly, signal S
22Comprise grid impulse PU
22With certain pulses PU
24, and signal S
23Then comprise switch pulse PU
23In this embodiment, certain pulses PU
25Size equal certain pulses PU
24, and grid impulse PU
21Equal grid impulse PU
22
It should be noted that certain pulses PU
25Be to be coupled to sweep trace WL
21Another pixel (not shown) adopt, and the associative operation of itself and another pixel mechanism is with reference to certain pulses PU
24Come by that analogy with the associative operation mechanism of pixel 200.In addition, in the present embodiment, switch pulse PU
23, grid impulse PU
21With grid impulse PU
22Be to be transmitted one by one according to time order and function, and certain pulses PU
24With switch pulse PU
23Be synchronously to be transmitted.
Next simultaneously with reference to Fig. 2 A and Fig. 2 B, with the operation mechanism of pixels illustrated 200.At first, switch SW
24Can be according to grid impulse PU
21And its first end of conducting and second end.At this moment, data line DL
21With storage capacitors C
ST21Electrically connect, to cause data line DL
21On source voltage VS
21Be written into liquid crystal capacitance C
LC21Because liquid crystal capacitance C
LC21With storage capacitors C
ST21Parallel connection, so source voltage VS
21Also can be stored in storage capacitors C
ST21In.At the same time, switch SW
21Also can be according to grid impulse PU
21And its first end of conducting and second end.In addition, source voltage VS
21Be loaded into liquid crystal capacitance C
LC22With storage capacitors C
ST22
Then, switch SW
22Can be according to grid impulse PU
22And its first end of conducting and second end.At this moment, liquid crystal capacitance C
LC22, storage capacitors C
ST22With building-out capacitor C
CN2In electric charge can neutralize.Whereby, the penetration variable quantity of first sub-pixel 210 and second sub-pixel 220 is with different.And the pixel 200 penetration variable quantity that two sub-pixels capable of using are different carries out colour mixture, causing the penetration convergence of side-looking and positive angle, and then solves the problem of colour cast and color saturation deficiency.
It should be noted that building-out capacitor C
CN2Before carrying out charging neutrality, switch SW
23Can be according to switch pulse PU
23And its first end of conducting and second end.At this moment, building-out capacitor C
CN2Can be written into sweep trace SL
22The certain pulses PU that is transmitted
24And know certain pulses PU
24Voltage level maintain a predeterminated voltage, so building-out capacitor C
CN2Also will discharge and recharge this predeterminated voltage accordingly.
In other words, liquid crystal capacitance C
LC22, storage capacitors C
ST22With building-out capacitor C
CN2Before carrying out charging neutrality, building-out capacitor C
CN2Can be earlier according to switch pulse PU
23And discharge and recharge to predeterminated voltage.Relatively, if 200 picture displayed of pixel at time point t
2Begin to carry out gray scale and switch, then picture in the process of switching, building-out capacitor C
CN2Still understand foundation and aforementioned identical waveform, discharge and recharge earlier to predeterminated voltage, again with liquid crystal capacitance C
LC22, storage capacitors C
ST22Carry out charging neutrality.
Whereby, no matter carrying out the gray scale of how many times, 200 picture displayed of pixel switch building-out capacitor C
CN2Before carrying out charging neutrality, its quantity of electric charge all can maintain a fixed value, and then has solved that the quantity of electric charge because of unpredictable building-out capacitor causes image residue and the uneven problem of picture in known technology.What deserves to be mentioned is that the described predeterminated voltage of present embodiment can be common voltage V
ComYet those skilled in the art also can change the magnitude of voltage of predeterminated voltage according to design arbitrarily.
[second embodiment]
Fig. 3 A shows the circuit structure diagram according to the pixel of second embodiment of the invention, and Fig. 3 B shows in order to the waveform sequential chart of second embodiment to be described.With reference to Fig. 3 A and Fig. 3 B, the main difference of second embodiment and first embodiment is the storage capacitors C of first sub-pixel 210
ST31Building-out capacitor C with second sub-pixel 220
CN3And storage capacitors C
ST32
In specific words, in pixel 300, storage capacitors C
ST31First end be coupled to switch SW
24Second end, and its second end is coupled to sweep trace SL
22In addition, building-out capacitor C
CN3First end be coupled to switch SW
22Second end, and its second end is coupled to sweep trace SL
22And storage capacitors C
ST32First end couple switch SW
21Second end, its second end couples sweep trace SL
22At this, present embodiment is to utilize storage capacitors C
ST31, C
ST32And building-out capacitor C
CN3Shared sweep trace SL
22Mode, lower the complexity of pixel 300 on the distribution layout.
In addition, similar with first embodiment, liquid crystal capacitance C
LC22, storage capacitors C
ST32With building-out capacitor C
CN3Before carrying out charging neutrality, switch SW
23Can be according to switch pulse PU
23And its first end of conducting and second end.At this moment, building-out capacitor C
CN3Can be written into the certain pulses PU that voltage level maintains predeterminated voltage
24In other words, building-out capacitor C
CN3The quantity of electric charge before neutralization, all can maintain a fixed value, and then solve that the quantity of electric charge because of unpredictable building-out capacitor causes image residue and the uneven problem of picture in known technology.
[the 3rd embodiment]
Fig. 4 A shows the circuit structure diagram according to the pixel of third embodiment of the invention, and Fig. 4 B shows in order to the waveform sequential chart of the 3rd embodiment to be described.With reference to Fig. 4 A and Fig. 4 B, the main difference of the 3rd embodiment and previous embodiment is the building-out capacitor C of second sub-pixel 220
CN41With C
CN42, and level complement line CNL
41
In specific words, in pixel 400, building-out capacitor C
CN41First end be coupled to switch SW
22Second end, and its second end is coupled to level switch line WL
21Building-out capacitor C
CN42First end be coupled to building-out capacitor C
CN41First end, and its second end is coupled to level complement line CNL
41At this, shown in Fig. 4 B, S
41In order to be expressed as level complement line CNL
41The signal that is transmitted, and signal S
41Voltage level can form complementary pulse PU along with the change of time
41It should be noted that complementary pulse PU
41With switch pulse PU
23Anti-phase each other.Whereby, by building-out capacitor C
CN42Loaded complementary pulse PU
42, can compensate switch pulse PU
23To building-out capacitor C
CN41Formed capacitance coupling effect.
What deserves to be mentioned is, in the present embodiment, storage capacitors C
ST21Second end except electrically connecting common voltage V
ComAlso can be electrically connected to level switch line WL outward,
21Or level complement line CNL
41With reference to Fig. 4 B, in scheming, can learn level switch line WL at this
21And level complement line CNL
41Can be at grid impulse PU
21Before the formation, anticipatory staging switch pulse PU
23With complementary pulse PU
41In addition, as grid impulse PU
21During formation, level switch line WL
21And level complement line CNL
41The signal S that is transmitted
23With S
41Returned back to common voltage V
ComTherefore, at grid impulse PU
21During formation, no matter storage capacitors C
ST21Second end be to be electrically connected to level switch line WL
21Or level complement line CNL
41, storage capacitors C
ST21All be with common voltage V
ComThe source voltage VS that is written into for benchmark
21
Yet, similar with previous embodiment, building-out capacitor C
CN41With C
CN42Meeting and liquid crystal capacitance C
LC22, storage capacitors C
ST22Carry out charging neutrality.In addition, before carrying out charging neutrality, building-out capacitor C
CN41With C
CN42Can be written into the certain pulses PU that voltage level maintains predeterminated voltage
24Whereby, pixel 400 can eliminate that the quantity of electric charge because of building-out capacitor does not fixedly cause the uneven problem of image residue and picture in known technology.
[the 4th embodiment]
Fig. 5 A shows the circuit structure diagram according to the pixel of fourth embodiment of the invention, and Fig. 5 B shows in order to the waveform sequential chart of the 4th embodiment to be described.With reference to Fig. 5 A and Fig. 5 B, the main difference of the 4th embodiment and previous embodiment is the switch SW of second sub-pixel 220
51
In specific words, in pixel 500, switch SW
51Be coupled to building-out capacitor C
CN2First end, its second end is coupled to predeterminated voltage V
Pre5, and its control end is coupled to level switch line WL
21At this, switch SW
51Can be according to switch pulse PU
23Its first end of conducting and second end, and then cause building-out capacitor C
CN2Discharge and recharge predeterminated voltage V
Pre5Whereby, building-out capacitor C
CN2Before carrying out charging neutrality, its quantity of electric charge all can maintain a fixed value.
It should be noted that because switch SW
51Second end be directly to be coupled to certain voltage source (predeterminated voltage V
Pre5), so shown in Fig. 5 B, sweep trace SL
21With SL
22The signal S that is transmitted
21With S
22All include only a grid impulse respectively.In other words, pixel 500 can adopt with the similar drive waveforms of known pixel 100 (being shown in Fig. 1) and come show image.In addition, similar with previous embodiment, because building-out capacitor C
CN2Before carrying out charging neutrality, it can be earlier according to switch pulse PU
23And discharge and recharge to predeterminated voltage.Whereby, pixel 500 can eliminate that the quantity of electric charge because of building-out capacitor does not fixedly cause the uneven problem of image residue and picture in known technology.
[the 5th embodiment]
Fig. 6 A shows the circuit structure diagram according to the pixel of fifth embodiment of the invention.With reference to Fig. 6 A, pixel 600 comprises first sub-pixel 610 and second sub-pixel 620.At this, first sub-pixel 610 is coupled to data line DL
61With sweep trace SL
61Second sub-pixel 620 is coupled to data line DL
61With sweep trace SL
61~SL
62
Further, first sub-pixel 610 comprises switch SW
64, storage capacitors C
ST61And liquid crystal capacitance C
LC61Wherein, switch SW
64First end be coupled to data line DL
61, and its control end is to sweep trace SL
61Liquid crystal capacitance C
LC61First end be coupled to switch SW
24Second end, and its second end is coupled to common voltage V
ComAnd storage capacitors C
ST61Then with liquid crystal capacitance C
LC61Parallel with one another.
Moreover second sub-pixel 620 comprises switch SW
61~SW
63, storage capacitors C
ST62, building-out capacitor C
CN6And liquid crystal capacitance C
LC62Wherein, switch SW
61First end be coupled to data line DL
61, and its control end is coupled to sweep trace SL
61Liquid crystal capacitance C
LC62First end be coupled to switch SW
61Second end, and its second end is coupled to common voltage V
ComStorage capacitors C
ST62Then with liquid crystal capacitance C
LC62Parallel with one another.
In addition, switch SW
62First end be coupled to storage capacitors C
ST62First end, and its control end is coupled to sweep trace SL
62Building-out capacitor C
CN6First end be coupled to switch SW
62Second end, and its second end is coupled to common voltage V
ComSwitch SW
63First end be coupled to building-out capacitor C
CN6First end, its control end is coupled to sweep trace SL
61, and its second end is coupled to predeterminated voltage V
Pre6What deserves to be mentioned is the described predeterminated voltage V of present embodiment
Pre6Can be common voltage V
ComYet those skilled in the art also can change the magnitude of voltage of predeterminated voltage according to design arbitrarily.
Fig. 6 B shows in order to the waveform sequential chart of the 5th embodiment, wherein S to be described
61In order to be expressed as sweep trace SL
61The signal that is transmitted, S
62In order to be expressed as sweep trace SL
62The signal that is transmitted, VS
61In order to be expressed as data line DL
61The source voltage that is transmitted.In addition, signal S
61Voltage level can form grid impulse PU along with the change of time
61Similarly, signal S
62Then comprise grid impulse PU
62With certain pulses PU
24In addition, grid impulse PU
61With grid impulse PU
62Be to be transmitted one by one according to time order and function.
Next simultaneously with reference to Fig. 6 A and Fig. 6 B, the operation mechanism of pixel 600.At first, switch SW
64Can be according to grid impulse PU
61And its first end of conducting and second end.At this moment, liquid crystal capacitance C
LC61Can be written into data line DL
61On source voltage VS
61, and source voltage VS
61Also can be stored in storage capacitors C
ST61In.Similarly, switch SW
61Also can be according to grid impulse PU
61And its first end of conducting and second end.Whereby, liquid crystal capacitance C
LC62Also can be written into source voltage VS
21, and storage capacitors C
ST62Also in order to storage source pole tension VS
21
On the other hand, switch SW
63Also can be according to grid impulse PU
61And its first end of conducting and second end.And building-out capacitor C
CN6Then can be because of switch SW
63Conducting and discharge and recharge to predeterminated voltage V
Pre6Thus, at next constantly, work as switch SW
62According to grid impulse PU
62And when its first end of conducting and second end, liquid crystal capacitance C
LC62, storage capacitors C
ST62With building-out capacitor C
CN6To carry out charging neutrality.Whereby, the penetration variable quantity of first sub-pixel 610 and second sub-pixel 620 is with different.And the pixel 600 penetration variable quantity that two sub-pixels capable of using are different carries out colour mixture, and is identical with the penetration variable quantity of positive angle to cause side-looking.
If it should be noted that 600 picture displayed of pixel are at time point t
6Begin to carry out gray scale and switch, then picture in the process of switching, building-out capacitor C
CN6Still understand foundation and aforementioned identical waveform, discharge and recharge earlier to predeterminated voltage V
Pre6After, again with liquid crystal capacitance C
LC62, storage capacitors C
ST62Carry out the neutralization of electric charge.In other words, no matter carrying out the gray scale of how many times, 600 picture displayed of pixel switch building-out capacitor C
CN6Before carrying out charging neutrality, its quantity of electric charge all can maintain a fixed value, and then solution quantity of electric charge because of unpredictable building-out capacitor in known technology causes image residue and the uneven problem of picture.
[the 6th embodiment]
Fig. 7 A shows the circuit structure diagram according to the pixel of sixth embodiment of the invention, and Fig. 7 B shows in order to the waveform sequential chart of the 6th embodiment to be described.With reference to Fig. 7 A and Fig. 7 B, the main difference of the 6th embodiment and the 5th embodiment is the storage capacitors C of second sub-pixel 620
ST71, building-out capacitor C
CN7With switch SW
71, and level switch line WL
71
In specific words, in pixel 700, storage capacitors C
ST71First end be coupled to switch SW
62First end, and its second end is coupled to level switch line WL
71Building-out capacitor C
CN7First end be coupled to switch SW
62Second end, and its second end is coupled to level switch line WL
71Moreover, switch SW
71First end be coupled to building-out capacitor C
CN7First end, its control end is coupled to sweep trace SL
61, and its second end is coupled to level switch line WL
71
In addition, shown in Fig. 7 B, S
71In order to be expressed as level switch line WL
71The signal that is transmitted, and signal S
71Voltage level can be along with grid impulse PU
62And from predeterminated voltage V
Pre6Switch to a bucking voltage V
71It should be noted that bucking voltage V
71Less than predeterminated voltage V
Pre6, and predeterminated voltage V
Pre6The common voltage V that is equal to display panels
Com
At this, work as switch SW
71According to grid impulse PU
61And when its first end of conducting and second end, because signal S
71Voltage level maintain predeterminated voltage V
Pre6So, building-out capacitor C
CN7Can discharge and recharge to predeterminated voltage V
Pre6In addition, at next constantly, because signal S
71Voltage level can be along with grid impulse PU
62And from predeterminated voltage V
Pre6Switch to bucking voltage V
71So, switch SW
62According to grid impulse PU
62And produce in the process of switching, it is to storage capacitors C
ST71With building-out capacitor C
CN7Formed feed voltage (feed-through voltage) can be cancelled.Whereby, building-out capacitor C
CN7With storage capacitors C
ST71The quantity of electric charge can be along with switch SW
62Switching and change to some extent, and then reduce the uneven or situation of flicker of demonstration of display frame.
In addition, similar with the 5th embodiment, along with switch SW
62Conducting, liquid crystal capacitance C
LC62, storage capacitors C
ST71With building-out capacitor C
CN7Can carry out charging neutrality.And aforesaid, building-out capacitor C
CN7Before carrying out charging neutrality, its quantity of electric charge will maintain a fixed value.Therefore, the penetration variable quantity that pixel 700 is different with two sub-pixels capable of using carries out colour mixture, and is identical with the penetration variable quantity of positive angle to cause side-looking.
From another kind of viewpoint, the function mode of above-mentioned device can represent to have the quantity of electric charge that solves the unpredictable building-out capacitor of known technology equally and the effect that causes image residue and picture problem of non-uniform with driving method.
Fig. 8 shows the driving method process flow diagram according to the display panels of one embodiment of the invention.With reference to Fig. 8, in the present embodiment, the driving method of display panels comprises the following steps.At first, transmit source voltage (step S801) through data line.Then, in step S802, according to time order and function produce the switch pulse that transmitted by the level switch line one by one, the first grid pulse that is transmitted by first sweep trace and the second grid pulse that is transmitted by second sweep trace.
Afterwards, in step S803, first building-out capacitor is discharged and recharged to predeterminated voltage according to switch pulse.Next, in step S804, source voltage is loaded into first sub-pixel and first liquid crystal capacitance according to the first grid pulse.At last, in step S805, the electric charge that will be stored in first building-out capacitor and first liquid crystal capacitance according to the second grid pulse neutralizes.
In the present embodiment, according to switch pulse first building-out capacitor is discharged and recharged to the step S805 of predeterminated voltage and can comprise the following steps.At first, can transmit certain pulses through second sweep trace.Then, according to switch pulse certain pulses is loaded into first building-out capacitor, wherein the voltage level of certain pulses maintains predeterminated voltage.
Above-mentioned driving method is corresponding the first, second, third and the 4th embodiment, followingly reintroduces another kind of driving method with corresponding the 5th and the 6th embodiment.
Fig. 9 shows the driving method process flow diagram according to the display panels of another embodiment of the present invention.With reference to Fig. 9, in the present embodiment, the driving method of display panels comprises the following steps.At first, transmit source voltage (step S901) through data line.Then, in step S902, produce the second grid pulse that the first grid pulse that transmitted by first sweep trace and second sweep trace are transmitted one by one according to time order and function.
Afterwards, in step S903, according to the first grid pulse first building-out capacitor is discharged and recharged to predeterminated voltage, and source voltage is loaded into first sub-pixel and first liquid crystal capacitance.At last, in step S904, the electric charge that will be stored in first building-out capacitor and first liquid crystal capacitance according to the second grid pulse neutralizes.
It should be noted that in some other embodiment above-mentioned predeterminated voltage is equal to the common voltage of display panels, and this predeterminated voltage can be different according to those of ordinary skills' demand.
In sum, the present invention is the charging neutrality that utilizes building-out capacitor and storage capacitors to carry out, and causes the side-looking of pixel identical with the penetration variable quantity of positive angle.In addition, building-out capacitor is before carrying out charging neutrality, and its quantity of electric charge will maintain a fixed value.Whereby, the present invention can solve further that the quantity of electric charge because of unpredictable building-out capacitor causes image residue and the uneven problem of picture in known technology.
Though described the present invention through preferred embodiment; But it is not to be used to limit the present invention; Those skilled in the art are under the situation that does not break away from the spirit and scope of the present invention; Can carry out suitable modification and variation, so protection scope of the present invention should be as the criterion with subsidiary claim.
Claims (15)
1. a display panels comprises a plurality of pixels, and each said pixel comprises:
First sub-pixel is coupled to the data line and first sweep trace, and the first grid pulse according to said first sweep trace is transmitted receives the source voltage that said data line transmits; And
Second sub-pixel is coupled to said data line, said first sweep trace, second sweep trace and level switch line, according to said first grid pulse, receives said source voltage, and wherein, said second sub-pixel comprises:
First liquid crystal capacitance is in order to be written into said source voltage; And
First building-out capacitor; Discharge and recharge to predeterminated voltage according to switch pulse that said level switch line transmitted; And carry out charging neutrality with said first liquid crystal capacitance according to second grid pulse that said second sweep trace transmitted; Wherein, said switch pulse, said first grid pulse and said second grid pulse are transmitted according to time order and function one by one.
2. display panels as claimed in claim 1, wherein, said second sub-pixel also comprises:
First switch, its first end is coupled to said data line, and its second end is coupled to first end of said first liquid crystal capacitance, and its control end is coupled to said first sweep trace, its first end of conducting and second end in order to the said first grid pulse of foundation;
Second switch; Its first end is coupled to first end of said first liquid crystal capacitance; Its second end is coupled to first end of said first building-out capacitor, and its control end is coupled to said second sweep trace, its first end of conducting and second end in order to the said second grid pulse of foundation;
The 3rd switch; Its first end is coupled to first end of said first building-out capacitor, and its second end is coupled to said second sweep trace, and its control end is coupled to said level switch line; Its first end of conducting and second end in order to the said switch pulse of foundation; To cause said first building-out capacitor to be written into the certain pulses that is transmitted by said second sweep trace, wherein, the voltage level of said certain pulses maintains said predeterminated voltage; And
First storage capacitors, parallel with one another with said first liquid crystal capacitance, wherein, second end of said first storage capacitors and said first building-out capacitor is coupled to the common voltage of said display panels.
3. display panels as claimed in claim 2, wherein, said first sub-pixel comprises:
The 4th switch, its first end is coupled to said data line, and its control end is coupled to said first sweep trace, its first end of conducting and second end in order to the said first grid pulse of foundation;
Second liquid crystal capacitance, its first end is coupled to second end of said the 4th switch, and its second end is coupled to said common voltage; And
Second storage capacitors, parallel with one another with said second liquid crystal capacitance.
4. display panels as claimed in claim 1, wherein, said second sub-pixel also comprises:
First switch, its first end is coupled to said data line, and its second end is coupled to first end of said first liquid crystal capacitance, and its control end is coupled to said first sweep trace, its first end of conducting and second end in order to the said first grid pulse of foundation;
Second switch; Its first end is coupled to first end of said first liquid crystal capacitance; Its second end is coupled to first end of said first building-out capacitor, and its control end is coupled to said second sweep trace, its first end of conducting and second end in order to the said second grid pulse of foundation;
The 3rd switch; Its first end is coupled to first end of said first building-out capacitor, and its second end is coupled to said second sweep trace, and its control end is coupled to said level switch line; Its first end of conducting and second end in order to the said switch pulse of foundation; To cause said first building-out capacitor to be written into the certain pulses that is transmitted by said second sweep trace, wherein, the voltage level of said certain pulses maintains said predeterminated voltage; And
First storage capacitors; Its first end is coupled to first end of said first liquid crystal capacitance; Its second end is coupled to said second sweep trace; And second end of said first liquid crystal capacitance is coupled to the common voltage of said display panels, and second end of said first building-out capacitor is coupled to said second sweep trace.
5. display panels as claimed in claim 4, wherein, said first sub-pixel comprises:
The 4th switch, its first end is coupled to said data line, and its control end is coupled to said first sweep trace, and in order to according to said first grid pulse and its first end of conducting and second end;
Second liquid crystal capacitance, its first end is coupled to second end of said the 4th switch, and its second end is coupled to said common voltage; And
Second storage capacitors, its first end is coupled to second end of said the 4th switch, and its second end is coupled to said second sweep trace.
6. display panels as claimed in claim 1, wherein, said second sub-pixel also comprises:
First switch, its first end is coupled to said data line, and its second end is coupled to first end of said first liquid crystal capacitance, and its control end is coupled to said first sweep trace, its first end of conducting and second end in order to the said first grid pulse of foundation;
Second switch; Its first end is coupled to first end of said first liquid crystal capacitance; Its second end is coupled to first end of said first building-out capacitor, and its control end is coupled to said second sweep trace, its first end of conducting and second end in order to the said second grid pulse of foundation;
The 3rd switch; Its first end is coupled to first end of said first building-out capacitor, and its second end is coupled to said second sweep trace, and its control end is coupled to said level switch line; And according to said switch pulse and its first end of conducting and second end; To cause said first building-out capacitor to be written into the certain pulses that is transmitted by said second sweep trace, wherein, the voltage level of said certain pulses maintains said predeterminated voltage;
Second building-out capacitor; Its first end is coupled to first end of said first building-out capacitor; Its second end is coupled to the level complement line; Wherein, second end of said first building-out capacitor is coupled to said level switch line, and the signal anti-phase each other of transmitting of the signal that transmitted of said level complement line and said level switch line; And
First storage capacitors, parallelly connected with said first liquid crystal capacitance, and second end of said first storage capacitors is coupled to a common voltage of said display panels.
7. display panels as claimed in claim 6, wherein, said first sub-pixel comprises:
The 4th switch, its first end is coupled to said data line, and its control end is coupled to said first sweep trace, its first end of conducting and second end in order to the said first grid pulse of foundation;
Second liquid crystal capacitance, its first end is coupled to second end of said the 4th switch, and its second end is coupled to said common voltage; And
Second storage capacitors, parallel with one another with said second liquid crystal capacitance.
8. display panels as claimed in claim 1, wherein, said second sub-pixel also comprises:
First switch, its first end is coupled to said data line, and its second end is coupled to first end of said first liquid crystal capacitance, and its control end is coupled to said first sweep trace, its first end of conducting and second end in order to the said first grid pulse of foundation;
Second switch; Its first end is coupled to first end of said first liquid crystal capacitance; Its second end is coupled to first end of said first building-out capacitor, and its control end is coupled to said second sweep trace, its first end of conducting and second end in order to the said second grid pulse of foundation;
The 3rd switch, its first end is coupled to first end of said first building-out capacitor, and its second end is coupled to said predeterminated voltage, and its control end is coupled to said level switch line, according to said switch pulse and its first end of conducting and second end; And
First storage capacitors, parallel with one another with said first liquid crystal capacitance, wherein, second end of said first storage capacitors and said first building-out capacitor is coupled to a common voltage of said display panels.
9. display panels as claimed in claim 8, wherein, said first sub-pixel comprises:
The 4th switch, its first end is coupled to said data line, and its control end is coupled to said first sweep trace, its first end of conducting and second end in order to the said first grid pulse of foundation;
Second liquid crystal capacitance, its first end is coupled to second end of said the 4th switch, and its second end is coupled to said common voltage; And
Second storage capacitors, parallel with one another with said second liquid crystal capacitance.
10. display panels as claimed in claim 1, wherein, said predeterminated voltage is equal to the common voltage of said display panels.
11. a display panels comprises a plurality of pixels, and each said pixel comprises:
First sub-pixel is coupled to the data line and first sweep trace, the first grid pulse that said first sweep trace of foundation is transmitted, and be written into the source voltage that said data line transmits; And
Second sub-pixel is coupled to said data line, said first sweep trace and second sweep trace, and in order to be written into said source voltage according to said first grid pulse, wherein said second sub-pixel comprises:
First liquid crystal capacitance is in order to be written into said source voltage; And
First building-out capacitor; Discharge and recharge to predeterminated voltage according to said first grid pulse; And carry out charging neutrality with said first liquid crystal capacitance according to second grid pulse that said second sweep trace transmitted; Wherein, said first grid pulse and said second grid pulse are transmitted according to time order and function one by one.
12. display panels as claimed in claim 11, wherein, said second sub-pixel also comprises:
First switch, its first end is coupled to said data line, and its second end is coupled to first end of said first liquid crystal capacitance, and its control end is coupled to said first sweep trace, its first end of conducting and second end in order to the said first grid pulse of foundation;
Second switch; Its first end is coupled to first end of said first liquid crystal capacitance; Its second end is coupled to first end of said first building-out capacitor, and its control end is coupled to said second sweep trace, its first end of conducting and second end in order to the said second grid pulse of foundation;
The 3rd switch, its first end is coupled to first end of said first building-out capacitor, and its second end is coupled to the level switch line; Its control end is coupled to said first sweep trace; Its first end of conducting and second end in order to the said first grid pulse of foundation, wherein, the voltage of signals level that said level switch line is transmitted; Can switch to bucking voltage from said predeterminated voltage along with said second grid pulse, and said bucking voltage is less than said predeterminated voltage; And
First storage capacitors; Its first end is coupled to first end of said first liquid crystal capacitance; Its second end is coupled to second end of said level switch line and said first building-out capacitor, and wherein, second end of said first liquid crystal capacitance is coupled to the common voltage of said display panels.
13. LCD as claimed in claim 11, wherein, said predeterminated voltage is equal to the common voltage of said display panels.
14. the driving method of a display panels; Wherein, Said display panels comprises a plurality of pixels, and each said pixel comprises first sub-pixel and second sub-pixel, and said second sub-pixel comprises first liquid crystal capacitance and first building-out capacitor; Wherein, Said first sub-pixel is coupled to the data line and first sweep trace, and said second sub-pixel is coupled to said data line, said first sweep trace, second sweep trace and level switch line, and the driving method of said display panels comprises the following steps:
Transmit source voltage through said data line;
According to time order and function produce the switch pulse that transmitted by said level switch line one by one, the first grid pulse that is transmitted by said first sweep trace and the second grid pulse that is transmitted by said second sweep trace;
According to said switch pulse said first building-out capacitor is discharged and recharged to predeterminated voltage;
According to said first grid pulse said source voltage is loaded into said first sub-pixel and said first liquid crystal capacitance; And
The electric charge that will be stored in said first building-out capacitor and said first liquid crystal capacitance according to said second grid pulse neutralizes,
Wherein, will said first building-out capacitor discharge and recharge according to said switch pulse to the step of said predeterminated voltage and comprise: through said second sweep trace transmission certain pulses; And according to said switch pulse and said certain pulses is loaded into said first building-out capacitor, wherein, the voltage level of said certain pulses maintains said predeterminated voltage.
15. the driving method of a display panels, wherein, said display panels comprises a plurality of pixels; Each said pixel comprises first sub-pixel and second sub-pixel; And said second sub-pixel comprises first liquid crystal capacitance and first building-out capacitor, and wherein, said first sub-pixel is coupled to the data line and first sweep trace; Said second sub-pixel is coupled to said data line, said first sweep trace and second sweep trace, and the driving method of said display panels comprises the following steps:
Transmit source voltage through said data line;
Produce first grid pulse that is transmitted by said first sweep trace and the second grid pulse that is transmitted by said second sweep trace one by one according to time order and function;
According to said first grid pulse said first building-out capacitor is discharged and recharged to predeterminated voltage, and said source voltage is loaded into said first sub-pixel and said first liquid crystal capacitance; And
The electric charge that will be stored in said first building-out capacitor and said first liquid crystal capacitance according to said second grid pulse neutralizes.
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CN103151001B (en) * | 2011-12-07 | 2015-11-25 | 群康科技(深圳)有限公司 | Liquid crystal indicator and image element driving method thereof |
CN103472639B (en) * | 2012-06-06 | 2016-03-09 | 群康科技(深圳)有限公司 | Display and driving method thereof |
CN103389590B (en) * | 2013-08-06 | 2015-08-19 | 南京中电熊猫液晶显示科技有限公司 | A kind of liquid crystal display start residual image improvement method and circuit thereof |
CN104122724B (en) * | 2014-07-04 | 2017-01-18 | 深圳市华星光电技术有限公司 | Low-color-error liquid crystal array substrate and drive method thereof |
CN107093412B (en) * | 2017-06-29 | 2019-06-04 | 京东方科技集团股份有限公司 | Display base plate, display device and pixel electrode driving method |
CN107507574B (en) * | 2017-08-31 | 2019-09-20 | 京东方科技集团股份有限公司 | OLED display panel and its compensation method and device, display device |
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