Embodiment
Hereinafter with reference to the accompanying drawings the present invention is done more fully and describe, embodiments of the invention have been shown in the accompanying drawing.It will be understood by those skilled in the art that described embodiment can revise in various mode, and do not deviate from the spirit or scope of the present invention.
In the accompanying drawings, for clarity, the thickness in layer, film, panel, zone etc. is by exaggerative.Identical in this manual Reference numeral refers to components identical all the time.Should be appreciated that when claim an element for example layer, film, zone or substrate on another element " time, can perhaps can also there be intermediary element in it directly on another element.On the contrary, when claim an element " directly exist " another element " on " time, do not have intermediary element.
Hereinafter, describe LCD according to an embodiment of the invention with reference to the accompanying drawings in detail.
Fig. 1 is the block diagram according to the LCD of the embodiment of the invention, Fig. 2 illustrates according to the structure of the LCD of the embodiment of the invention and the equivalent circuit diagram of a pixel, and Fig. 3 is the equivalent circuit diagram that illustrates according to a pixel of the LCD of the embodiment of the invention.
With reference to Fig. 1, comprise liquid crystal panel assembly 300, gate drivers 400, data driver 500, grayscale voltage generator 800 and signal controller 600 according to the LCD of the embodiment of the invention.
With reference to Fig. 1 and Fig. 3, in equivalent circuit diagram, liquid crystal panel assembly 300 comprises many signal wire G
i, D
jAnd D
J+1And a plurality of pixel PX, these a plurality of pixel PX are connected to many signal wires also basically by matrix arrangements.On the contrary, shown in figure 2 in the structural drawing, liquid crystal panel assembly 300 comprises top panel 100 respect to one another and lower panel 200 and is plugged between the two liquid crystal layer 3.
Signal wire G
i, D
jAnd D
J+1Many gate lines G that comprise transmission signal (being also referred to as " sweep signal ")
iWith the transmission data voltage many to data line D
jAnd D
J+1Gate lines G
iSubstantially the direction that follows is extended and is parallel to each other basically.Data line D
jAnd D
J+1Basic direction along row is extended and is parallel to each other substantially.
Each pixel PX (for example be connected to the i root (i=1,2 ..., n) gate lines G
iAnd j root and (j+1) root (j=1,2 ..., m) data line D
jAnd D
J+1Pixel PX) comprise and be connected to signal wire G
i, D
jAnd D
J+1The first switching device Qa and second switch device Qb, the liquid crystal capacitor Clc that is connected to switching device and the first holding capacitor Csta and the second holding capacitor Cstb.The first holding capacitor Csta and the second holding capacitor Cstb can omit where necessary.
The first switching device Qa/ second switch device Qb is a three terminal device, such as the thin film transistor (TFT) that is arranged in the lower panel 100.Its control end is connected to gate lines G
i, its input end is connected to data line D
j/ D
J+1, its output terminal is connected to liquid crystal capacitor Clc and the first holding capacitor Csta and the second holding capacitor Cstb.
With reference to Fig. 2 and Fig. 3, the first pixel electrode PEa of liquid crystal capacitor Clc employing lower panel 100 and the second pixel electrode PEb are as two terminals, and the liquid crystal layer 3 between the first pixel electrode PEa and the second pixel electrode PEb and top panel is as dielectric substance.
The first pixel electrode PEa is connected to the first on-off element Qa, and the second pixel electrode PEb is connected to second switch element Qb.
For Fig. 2, the second pixel electrode PEb can be arranged on the top panel 200 alternatively.In the case, the second pixel electrode PEb is free of attachment to on-off element and receives independent common electric voltage Vcom.
Liquid crystal layer 3 has dielectric anisotropy, and the liquid crystal molecule of liquid crystal layer 3 does not have by orientation and is the major axis perpendicular to the surface of two panels 100 and 200 when having electric field.
Comprise that the pixel electrode PE of the first pixel electrode PEa and the second pixel electrode PEb and public electrode CE can be formed in the different layers or in identical layer.Can overlap by each of the first pixel electrode PEa and the second pixel electrode PEb and the electrode (not shown) that is arranged on the lower panel 100 as the first auxiliary holding capacitor Csta of liquid crystal capacitor Clc and each of the second holding capacitor Cstb, wherein insulator is plugged in therebetween and forms.
Simultaneously, in order to realize colored the demonstration that only show a kind of primary colors (primarycolor) (space segmentation) or this pixel PX Alternation Display primary colors (time is cut apart) by allowing pixel PX, desired color is confirmed by the space or the time sum of primary colors.
Primary colors comprises that three kinds of primary colors are for example red, green and blue.
Fig. 2 shows each pixel PX of comprising color filter CF (one of display primaries in corresponding to the zone of the top panel 200 of the first pixel electrode PEa and the second pixel electrode PEb) example as space segmentation.
Alternatively for Fig. 2, color filter CF can be arranged on the first pixel electrode PEa of lower panel 100 and the second pixel electrode PEb above or below.
At least one polarizer (not shown) is arranged in the liquid crystal panel assembly 300.
Refer again to Fig. 1, grayscale voltage generator 800 produces all grayscale voltages relevant with the transmissivity of pixel PX or the grayscale voltage (being called " reference gray level voltage " hereinafter) of limited amount.
Reference gray level voltage can comprise with respect to common electric voltage Vcom have on the occasion of grayscale voltage and another grayscale voltage with negative value.
Gate drivers 400 is connected to the gate line of liquid crystal panel assembly 300, and applies by gate turn-on (gate-on) voltage Von and grid by the signal that constitutes of (gate-off) voltage Voff to gate line.
Data driver 500 is connected to the data line of liquid crystal panel assembly 300, selects the grayscale voltage that applies from grayscale voltage generator 800 and selected grayscale voltage is applied to data line as data voltage.
Yet, providing at grayscale voltage generator 800 under the situation of the reference gray level voltage of limited amount rather than total grayscale voltage, data driver 500 can produce desired data voltage by cutting apart reference gray level voltage.
Signal controller 600 control gate drivers 400 and data driver 500.
Driver 400,500,600 and each form with at least one IC chip of 800 are directly installed on the liquid crystal panel assembly, or with tape carrier package (TCP, tape carrier package) form is installed on the flexible printed circuit film (not shown) that is attached on the liquid crystal panel assembly 300, perhaps is installed on independent printed circuit board (PCB) (PCB) (not shown).
Alternatively, driver 400,500,600 and 800 can be integrated on the liquid crystal panel assembly 300 with signal wire and thin film transistor switch element.
In addition, driver 400,500,600 and 800 can be integrated with the form of single-chip.In the case, at least one in them or at least one circuit component of constituting them can place the outside of single-chip.
Hereinafter, with reference to Fig. 4 and Fig. 5 and Fig. 1 to Fig. 3, with the example that describes in detail according to the driving method of the LCD of the embodiment of the invention.
Fig. 4 is the schematic sectional view according to the LCD of the embodiment of the invention, and Fig. 5 illustrates the figure that is applied to according to the voltage of the data line of the LCD of the embodiment of the invention and pixel.
At first, with reference to Fig. 1, signal controller 600 receives received image signal R, G and B and from the input control signal of the demonstration of control received image signal R, the G of external graphics controller (not shown) and B.
Received image signal R, G and B comprise the monochrome information of each pixel, and this brightness has the gray scale of scheduled volume, and for example 1024 (=2
10), 256 (=2
8) or 64 (=2
6) gray scale.
Input control signal can comprise vertical synchronizing signal (Vsync), horizontal-drive signal (Hsync), master clock signal (MCLK), data enable signal (DE) etc.
Signal controller 600 condition of work according to liquid crystal panel assembly 300 on the basis of received image signal R, G, B and input control signal is handled received image signal R, G, B aptly.Signal controller 600 produces grid control signal CONT1 and data controlling signal CONT2, and grid control signal CONT1 is outputed to gate drivers 400 and data controlling signal CONT2 and treated picture signal DAT are outputed to data driver 500.
According to data controlling signal from signal controller 600, data driver 500 receptions are used for the data image signal DAT of one-row pixels and by selecting to convert each data image signal DAT to analog data voltage corresponding to the grayscale voltage of each data image signal DAT, then analog data voltage are applied to corresponding data line.
Gate drivers 400 is applied to gate lines G according to the grid control signal CONT1 from signal controller 600 with gate-on voltage Von
iBe connected to gate lines G with conducting
iThe first on-off element Qa and second switch element Qb.
Then, be applied to data line D
jAnd D
J+1Data voltage be applied to corresponding pixel PX by the first on-off element Qa and second switch element Qb.
Just, at the first data line D
jIn the data voltage that flows be applied to the first pixel electrode PEa by the first on-off element Qa, flow in the second data line D
J+1Data voltage be applied to the second pixel electrode PEb by second switch element Qb.
At this moment, the data voltage that is applied to the first pixel electrode PEa and the second pixel electrode PEb is the data voltage corresponding to the brightness that is shown by pixel PX, and has the reciprocal polarity with respect to common electric voltage Vcom.
Difference with two data voltages (it is applied to the first pixel electrode PEa and the second pixel electrode PEb) of opposed polarity is represented by the charging voltage (pixel voltage just) of liquid crystal capacitor Clc.
When electric potential difference was created between the two ends of liquid crystal capacitor Clc, the electric field that is parallel to the surface of panel 100 and 200 was created in the liquid crystal layer 3 between the first pixel electrode PEa and the second pixel electrode PEb, as shown in Figure 4.
Have at liquid crystal molecule 31 under the situation of positive dielectric anisotropy, thereby the major axis that liquid crystal molecule 31 tilts them is to be parallel to the amplitude (amplitude) that the angle of the direction of electric field and inclination is decided by pixel voltage by orientation.
This liquid crystal layer 3 is called electro-induction optical compensation (EOC) pattern.
The degree of the variation of the polarisation of light by liquid crystal layer 3 is decided by the angle of inclination of liquid crystal molecule 31.
Polarization variations is represented by the variation of the optical transmission rate by polarizer, shows the brightness of being represented by the gray scale of picture signal DAT by its pixel PX.
By (also being called " 1H " at a horizontal cycle, equal the one-period of horizontal-drive signal (Hsync) and data enable signal DE) repeat this process, gate turn-on signal voltage Von sequentially is applied to all gate lines and data voltage is applied to all pixel PX, thereby shows a two field picture.
After a frame stopped, next frame began.The state Be Controlled that is applied to the reverse signal RVS of data driver 500 makes the polarity of the data voltage be applied to each pixel PX be reversed to and before frame opposite (" frame counter-rotating ").
At this moment, flow in a data voltage in the data line polarity can according to the characteristic of reverse signal RVS (for example row counter-rotating and some counter-rotating) one image duration periodic variation or be applied to the polarity of the data voltage of a pixel column can alternately different each other (for example, row counter-rotating and point reverse).
Fig. 5 is illustrated in according to being respectively the figure that is applied to the voltage of every data lines when minimum voltage that 14V, 10V, 5V and 1V and LCD can use and maximum voltage are respectively 0V and 14V when the charging voltage of the liquid crystal capacitor of four neighbors in the LCD of the embodiment of the invention.
With reference to Fig. 5, each pixel is connected to two data lines D
j, D
J+1/ D
J+2, D
J+3/ D
J+4, D
J+5/ D
J+6, D
J+7The different data voltage that has opposed polarity with respect to common electric voltage Vcom is applied to the two data lines D that are connected to a pixel
j, D
J+1/ D
J+2, D
J+3/ D
J+4, D
J+5/ D
J+6, D
J+7Difference between two data lines is the pixel voltage among each pixel PX.For example, when common electric voltage Vcom was 7V, 14V and 0V can be applied to the first data line D respectively
jWith the second data line D
J+1And the object pixel voltage of first pixel is 14V, and 12V and 2V can be applied to the 3rd data line D respectively
J+2With the 4th data line D
J+3And the object pixel voltage of second pixel is 10V, and 9.5V and 4.5V can be applied to the 5th data line D respectively
J+4With the 6th data line D
J+5And the object pixel voltage of the 3rd pixel is 5V, and 7.5V and 6.5V can be applied to the 7th data line D
J+6With the 8th data line D
J+7And the object pixel voltage of the 4th pixel is 1V.
As mentioned above, by applying two data voltages to the pixel PX that has opposed polarity with respect to common electric voltage Vcom, driving voltage can increase, and the response speed of liquid crystal molecule can improve, and the transmissivity of LCD can be improved.In addition, has reciprocal polarity owing to be applied to two data voltages of a pixel PX, so can prevent because the degeneration of the picture quality that causes of flicker (flicker), even the counter-rotating type advantageously is similar under the situation of the row counter-rotating of a counter-rotating or row counter-rotating in data driver 500.
In addition, when the first on-off element Qa in a pixel and second switch element Qb by the time, the voltage that is applied to the first pixel electrode PEa and the second pixel electrode PEb side by side descends by corresponding flyback (kickback) voltage, thereby has only variation seldom in the charging voltage of pixel PX.Therefore, can improve the display characteristic of LCD.
And, under the situation of use, can improve the contrast of LCD and realize the good optical visual angle perpendicular to the liquid crystal molecule 31 of the surface orientation of liquid crystal panel 100 and 200.Because the liquid crystal molecule 31 with positive dielectric anisotropy has bigger dielectric anisotropy and the lower stagnant degree of rotation with respect to the liquid crystal molecule 31 with negative dielectric anisotropy, so can increase the response speed of liquid crystal molecule 31.In addition because the vergence direction of liquid crystal molecule 31 is easy to set for the direction of the electric field of generation, so even can obtain good display characteristic in the orientation of liquid crystal molecule 31 because externalities and when being disperseed.
Then, with reference to Fig. 6 to Figure 10 and above-mentioned Fig. 1 to Fig. 5, with another example that describes in detail according to the driving method of the LCD of the embodiment of the invention.
Fig. 6 illustrates the pixel electrode of LCD and the figure of structural region according to an embodiment of the invention.Fig. 7 is the schematic sectional view according to the LCD of the embodiment of the invention, and Fig. 8 is the figure that illustrates according to the order of the driving method of the LCD of the embodiment of the invention, and Fig. 9 is the figure that illustrates according to the driving method of the embodiment of the invention.Figure 10 illustrates the figure of driving method in accordance with another embodiment of the present invention.
At first, with reference to Fig. 6 and Fig. 7, also comprise top panel 100 respect to one another and lower panel 200 and be plugged between the two liquid crystal layer 3, the first pixel electrode 191a and the same being arranged on the lower panel 100 of liquid crystal panel assembly shown in the second pixel electrode 191b image pattern 2 according to the liquid crystal panel assembly of embodiment.
The liquid crystal molecule 31 of liquid crystal layer 3 has when no electric field by orientation and is the major axis perpendicular to the surface of two panels 100 and 200.
When two data voltages that have opposed polarity with respect to common electric voltage Vcom were applied to the first pixel electrode 191a and the second pixel electrode 191b, the liquid crystal molecule 31 of liquid crystal layer 3 tilted for being parallel to panel 100 and 200, as shown in Figure 7.Yet, with the first pixel electrode 191a and the second pixel electrode 191b at interval the liquid crystal molecule 31 of same distance can be not do not tilt and keep their initial orientation perpendicular to panel 100 and 200 to either side.Then, comparing the structure A that has than low-light level on every side with it can be created between two pixel electrode 191a and the 191b, as shown in Figure 6 and Figure 7.
With reference to Fig. 9, according to the driving method of the LCD of embodiment also comprise (with above-mentioned at Fig. 1 to the identical mode of the driving method of the LCD shown in Fig. 5) show the N two field picture preset time (for example per second shows 60 two field pictures in 60Hz drives) that will will be shown.After showing the N two field picture, show additionally that as shown in Figure 9 a frame hangs down gray level image Ig, show the N two field picture that will be shown then.
Under for example white situation of the high gray scale intensities of liquid crystal display displays, when liquid crystal molecule 31 received pressure from the outside, the liquid crystal molecule 31 in the structural region between two pixel electrode 191a and 191b can flatly be arranged with respect to display panel 100 and 200.The structural region that liquid crystal molecule 31 is flatly arranged (texture region) A can confirm as flaxen damage, because the transmissivity of horizontally disposed 31 pairs of LCD of liquid crystal molecule has contribution.Horizontally disposed liquid crystal molecule 31 among the structural region A remains on this state by the highfield in the liquid crystal layer 3, even remove pressure from the outside, thereby even such damage can not be removed as time passes yet.
When the two field picture with low gray scale shows after the image of the frame of demonstration predetermined number (as in an embodiment), the liquid crystal molecules of being arranged in panel 100 and 200 by the highfield level that remains 31 return to their the initial tilt state perpendicular to panel 100 and 200, when being removed from externalities.Therefore, damage is removed, and can the display white image.At this moment, the gray scale of low gray level image Ig can be equal to or less than gray scale (by this gray scale, the damage that appears in the high gray level image can be removed) after for example outside pressure of influence is removed.Alternatively, gray scale can be the gray scale corresponding to the data voltage of the data voltage that is equal to or less than 2/3 high gray scale.
For the foregoing description alternatively, the number of the frame of the low gray level image Ig of interpolation can be a frame or multiframe.
Then, with reference to Figure 10, will the driving method of the LCD of another embodiment according to the present invention be described.
With reference to Figure 10, delegation or multirow pixel show low gray scale in corresponding frame, and having this delegation of low gray scale or multirow pixel can be from the end to end roll display screen of screen, when in LCD during at n display image image duration.At this moment, gray scale with this delegation of low gray scale or multirow pixel can be equal to or less than such gray scale (by this gray scale, for example influence external pressure damage and can be removed after removing) in high gray level image maybe can be corresponding to being equal to or less than gray scale 2/3 and the data voltage corresponding data voltage of high gray scale.
Different with Figure 10, low gray scale row can roll from top to bottom, from left to right or from right to left.
Like this, the delegation of low gray scale or multirow (this is difficult to be identified) add every frame to and roll in mode same as the previously described embodiments, can discharge then owing to influence for example also externally makes liquid crystal molecule 31 turn back to their initial orientations after the pressure removal from the liquid crystal molecule 31 that the external pressure of highfield is arranged.Therefore, can remove for example flaxen damage etc. of display defect.
As mentioned above, add low gray level image or the low gray scale of delegation at least when in comprising, showing high gray level image by the LCD of the liquid crystal molecule 31 of vertical orientation, can recover liquid crystal molecule 31 (even itself since for example outside power of influence be arranged to be parallel to panel 100 and 200 and fettered by highfield remove externalities) turn back to initial orientation.
Hereinafter, with reference to Figure 11 and Figure 12 in detail, the example of above-mentioned liquid crystal panel assembly will be described.
Figure 11 is the layout according to the liquid crystal panel assembly of the embodiment of the invention, and Figure 12 is the sectional view that cuts open the liquid crystal panel assembly of getting along the XII-XII line of Figure 11.
With reference to Figure 11 and Figure 12, comprise lower panel 100 and top panel 200 and be plugged between the two liquid crystal layer 3 according to the liquid crystal panel assembly of the embodiment of the invention.
At first, lower panel 100 will be described.
The a plurality of grid conductors that comprise many gate lines 121 and Duo Gen storage electrode line 131 are formed on the insulated substrate 110.
Gate line 121 transmission signals and main along continuous straight runs extend.Every gate line 121 comprises project upwards many to first grid electrode 124a and second grid electrode 124b.
Every storage electrode line 131 receives for example common electric voltage Vcom of predetermined voltage, and main along continuous straight runs extends.Every storage electrode line 131 places between two adjacent gate polar curves 121 and the more close gate line 121 that places storage electrode line 131 belows.Every storage electrode line 131 comprises vertically extending many to the first storage electrode 133a and the second storage electrode 133b and storage extension 137 with wide zone.The first storage electrode 133a and the second storage electrode 133b form clavate, near the first grid electrode 124a of following gate line 121 and the second grid electrode 124b near last gate line 121.The square shape that storage extension 137 has essence, two angles that wherein are formed on the bottom of storage extension 137 are cut, and the lower end of the first storage electrode 133a and the second storage electrode 133b is interconnected.Yet the shape and the layout of storage electrode line 131 (comprising storage electrode 133a and 133b and storage extension 137) can change in every way.
Grid conductor 121 and 131 can have single layer structure or sandwich construction.
The gate insulator of being made by silicon nitride (SiNx), monox (SiOx) etc. 140 is formed on grid conductor 121 and 131.
By many first island N-type semiconductor N 154a and the second island N-type semiconductor N 154b being formed on the gate insulator 140 that the amorphous silicon of hydrogenation, polysilicon etc. are made.The first semiconductor 154a and the second semiconductor 154b place first grid electrode 124a and second grid electrode 124b top respectively.
A pair of island type Ohmic contact 163a and 165a are formed on each first semiconductor 154a, and a pair of island type Ohmic contact (not shown) is formed on each second semiconductor 154b.Ohmic contact 163a and 165a can for example the amorphous silicon etc. or the silicide of the n type impurity that is mixed with high concentration of n+ hydrogenation be made by material.
Comprise and many first data line 171a and 171b and many data conductors to the first drain electrode 175a and the second drain electrode 175b being formed on Ohmic contact 163a and 165a and the gate insulator 140.
The first data line 171a and the second data line 171b transmission of data signals also intersect with gate line 121 and storage electrode line 131 and are mainly vertically extending.The first data line 171a and the second data line 171b comprise with U-shaped many to the first source electrode 173a and the second source electrode 173b to first grid electrode 124a and second grid electrode 124b bending.
The first drain electrode 175a and the second drain electrode 175b comprise the first extension 177a and the second extension 177b, and its end has clavate and big zone.The end sections ground of the first drain electrode 175a and the second drain electrode 175b is centered on by the first source electrode 173a and the second source electrode 173b, and the two is bent and faces with each other around first grid electrode 124a and second grid electrode 124b.The profile of the outside of the first extension 177a and the second extension 177b is similar to the exterior contour that places the storage extension 137 below the first extension 177a and the second extension 177b in fact.The first extension 177a overlaps with the left-half of storage extension 137, and the second extension 177b overlaps with the right half part of storage extension 137.
First grid electrode 124a/ second grid electrode 124b, the first source electrode 173a/, the second source electrode 173b and the first drain electrode 175a/, the second drain electrode 175b constitute the first film transistor Qa/ second thin film transistor (TFT) Qb respectively with the first semiconductor 154a/, the second semiconductor 154b.The raceway groove of the first film transistor Qa/ second thin film transistor (TFT) Qb is respectively formed among the first semiconductor 154a/, the second semiconductor 154b between the first source electrode 173a/, second source electrode 173b and the first drain electrode 175a/, the second drain electrode 175b.
Data conductor 171a, 171b, 175a and 175b can have single layer structure or sandwich construction.
Ohmic contact 163a and 165a only are formed between the semiconductor 154a and data conductor 171a, 171b, 175a and 175b above 154b and Ohmic contact 163a and the 165a of Ohmic contact 163a and 165a below.Ohmic contact 163a and 165a have reduced the contact resistance between semiconductor 154a and 154b and data conductor 171a, 171b, 175a and the 175b.Semiconductor 154a and 154b are exposed between source electrode 173a and 173b and drain electrode 175a and the 175b.In addition, semiconductor 154a and 154b are exposed to data conductor 171a, 171b, 175a and 175b.
Can be formed on the expose portion of data conductor 171a, 171b, 175a and 175b and semiconductor 154a and 154b by the passivation layer 180 that inorganic insulator, organic insulator etc. is made.
The a plurality of contact hole 185a and the 185b that are used to expose the first extension 177a and the second extension 177b are formed on passivation layer 180.
Comprise many to the first pixel electrode 191a and the second pixel electrode 191b (its can by transparent material for example indium tin oxide (ITO), indium-zinc oxide (IZO) etc. or reflective metals for example aluminium, silver, chromium or its alloy are made) a plurality of pixel electrodes 191 be formed on the passivation layer 180.
As shown in figure 11, total profile of a pixel electrode 191 has quadrangle.The first pixel electrode 191a and the second pixel electrode 191b are bonded with each other and gap 91 betweens.The first pixel electrode 191a and the second pixel electrode 191b are usually with respect to virtual horizontal center line CL vertical symmetry and be separated into zone and lower area.
The first pixel electrode 191a comprises outshot, left vertical stem portion, horizontal stem portion (extending from the center of vertical stem portion) and a plurality of component down to the right.Place the component of horizontal center line CL top to extend obliquely along upper right direction from vertical stem portion or horizontal stem portion.Another component that places horizontal center line CL below from vertical stem portion or horizontal stem portion along the lower right to extending obliquely.Angle between component and gate line 121 or the horizontal center line CL can be approximately 45 degree.
The second pixel electrode 191b comprises following outshot, right vertical stem portion, goes up horizontal stem portion and following horizontal stem portion and a plurality of component.Going up horizontal stem portion and following horizontal stem portion flatly extends left from the lower end and the upper end of vertical stem portion respectively.The component that places horizontal center line CL top from vertical stem portion or go up horizontal stem portion along the lower left to extending obliquely.Another component that places horizontal central line CL below from vertical stem portion or down horizontal stem portion along the upper left side to extending obliquely.Angle between the component of the second pixel electrode 191b and gate line 121 or the horizontal center line CL also can be about 45 degree.Top set's part and inferior division part can be in the right angle around horizontal center line CL.
The component of the first pixel electrode 191a and the second pixel electrode 191b is bonded with each other with predetermined gap and alternately is provided with, thereby forms the pectination pattern.
The first pixel electrode 191a and the second pixel electrode 191b are respectively by contact hole 185a and 185b physics be electrically connected to the first drain electrode 175a and the second drain electrode 175b.The first pixel electrode 191a and the second pixel electrode 191b receive the data voltage from the first drain electrode 175a and the second drain electrode 175b.The first pixel electrode 191a and the second pixel electrode 191b constitute liquid crystal capacitor Clc with liquid crystal layer 3.Even the voltage that the first pixel electrode 191a and the second pixel electrode 191b keep being applied is after the first film transistor Qa and second thin film transistor (TFT) Qb shutoff.
Gate insulator 140 is plugged between the two with storage extension 137 overlappings for the first extension 177a that is connected to the first pixel electrode 191a and the second pixel electrode 191b of the first drain electrode 175a and the second drain electrode 175b and the second extension 177b, thereby constitutes the first holding capacitor Csta and the second holding capacitor Cstb.The first holding capacitor Csta and the second holding capacitor Cstb have strengthened the store voltages electric capacity of liquid crystal capacitor Clc.
Then, top panel 200 will be described.
Frequency modulated light spare 220 is formed on the insulated substrate of being made by clear glass, plastics etc. 210.Frequency modulated light spare 220 prevents that light from revealing and limiting the open area of pixel-oriented electrode 191 between pixel electrode 191.
A plurality of color filters 230 are formed on insulated substrate 210 and the frequency modulated light spare 220.The major part of color filter 230 is present in by in frequency modulated light spare 220 region surrounded.Color filter 230 can elongate on one-row pixels electrode 191.Each color filter 230 can show and comprises one of primary colors that three primary colors are for example red, green and blue.
Overlayer 250 is formed on color filter 230 and the frequency modulated light spare 220.Overlayer 250 can be made by (organic) insulator.Overlayer 250 prevents that color filter 230 is exposed and smooth surface is provided.Overlayer 250 can omit.
Both alignment layers 11 and 21 is applied on the inside surface of panel 100 and 200.Both alignment layers 11 and 21 can be a homeotropic alignment layer.
The polarizer (not shown) can be arranged on the outside surface of panel 100 and 200.
The liquid crystal layer 3 that is plugged between lower panel 100 and the top panel 200 has positive dielectric anisotropy.Liquid crystal molecule 31 can have when no electric field by orientation and is the major axis perpendicular to the surface of two panels 100 and 200.
When the data voltage with opposed polarity is applied to the first pixel electrode 191a and the second pixel electrode 191b, produce the electric field on the surface that is basically parallel to panel 100 and 200.The liquid crystal molecule of liquid crystal layer 3 (it is surface perpendicular to panel 100 and 200 by orientation at first) response electric field, the major axis of liquid crystal molecule by orientation for being parallel to electric field.The degree of the variation of the polarization of incident light in the liquid crystal layer 3 changes according to the inclined degree of liquid crystal molecule.The variation of polarization is represented by the variation of the transmissivity of polarizer, thus the liquid crystal display displays image.
Like this, be liquid crystal molecule by adopting perpendicular to the surface of panel 100 and 200 by orientation, can increase the contrast of LCD and realize wide visible angle.In addition, by applying two data voltages to the pixel PX that has opposed polarity with respect to common electric voltage Vcom, can increase driving voltage and improve response speed.In addition, as mentioned above, can remove the influence that flyback voltage brings, thereby prevent flicker etc.
Then, with reference to Figure 13, liquid crystal panel assembly in accordance with another embodiment of the present invention will be described.
Figure 13 is the equivalent circuit diagram that the pixel and the structure of display panels in accordance with another embodiment of the present invention are shown.
With reference to Figure 13, comprise also that according to the liquid crystal panel assembly of present embodiment signal wire (comprises many gate lines G
iWith many to data line D
jAnd D
J+1) and a plurality of pixel PX of being connected thereto.About the structure of LCD, LCD comprises lower panel 100 respect to one another and top panel 200 and is plugged between the two liquid crystal layer 3.
Each pixel PX comprises and is connected to signal wire G
i, D
jAnd D
J+1The first on-off element Qa and second switch element Qb, liquid crystal capacitor Clc and holding capacitor Cst.
Be different from the embodiment shown in Fig. 2 and Fig. 3, in the present embodiment, the stacked on top of each other and insulator of the first pixel electrode PEa and the second pixel electrode PEb is plugged between the two to form holding capacitor Cst.Like this,, do not need to be used to transmit the extra wiring of common electric voltage Vcom, thereby increased the aperture ratio by forming the holding capacitor Cst among each pixel PX.
The operation of LCD (comprising the first on-off element Qa and second switch element Qb, liquid crystal capacitor Clc, color filter CF, polarizer (not shown) and liquid crystal panel assembly) and the description of effect are referring to figs. 1 through the description of the same parts shown in Fig. 5.Therefore, will omit its detailed description.
Then, with reference to Figure 14, liquid crystal panel assembly in accordance with another embodiment of the present invention will be described.
Figure 14 is the equivalent circuit diagram that the structure of a pixel and display panels is shown according to a further embodiment of the invention.
With reference to Figure 14, comprise also that according to the liquid crystal panel assembly of present embodiment signal wire (comprises many gate lines G
iWith many to data line D
jAnd D
J+1) and a plurality of pixel PX of being connected thereto.About the structure of LCD, LCD comprises lower panel 100 respect to one another and top panel 200 and is plugged between the two liquid crystal layer 3.
Each pixel PX comprises and is connected to signal wire G
i, D
jAnd D
J+1The first on-off element Qa and second switch element Qb, liquid crystal capacitor Clc and the first holding capacitor Csta and the second holding capacitor Cstb.
The first on-off element Qa and second switch element Qb are that three-terminal element for example is arranged on the thin film transistor (TFT) in the lower panel 100.Its control end is connected to gate lines G
i, its input end is connected to data line D
jAnd D
J+1, its output terminal is connected to liquid crystal capacitor Clc and the first holding capacitor Csta and the second holding capacitor Cstb.
Liquid crystal capacitor Clc can adopt the first pixel electrode PEa of lower panel 100 and the second pixel electrode PEb as two terminals, perhaps can adopt the first pixel electrode PEa or the second pixel electrode PEb and public electrode CE as two terminals.The first pixel electrode PEa and the second pixel electrode PEb are connected to the first on-off element Qa and second switch element Qb.Public electrode CE is formed on the front surface of lower panel 100 and in the zone of a pixel PX, and is formed in the layer that is different from the layer that forms pixel electrode PE (comprising the first pixel electrode PEa and the second pixel electrode PEb).Predetermined voltage for example common electric voltage Vcom etc. is applied to public electrode CE.The data voltage that has opposed polarity with respect to common electric voltage Vcom is applied to the first pixel electrode PEa and the second pixel electrode PEb respectively.Simultaneously, liquid crystal layer 3 has positive dielectric anisotropy.The liquid crystal molecule of liquid crystal layer 3 has when no electric field by orientation and is the major axis perpendicular to the horizontal surface of panel 100 and 200.
Each of the first holding capacitor Csta and the second holding capacitor Cstb by with the first pixel electrode PEa and the second pixel electrode PEb each and public electrode CE is stacked and insulator is plugged in therebetween and forms.Yet the first holding capacitor Csta or the second holding capacitor Cstb can form by the stacked on top of each other and insulator of the first pixel electrode PEa or the second pixel electrode PEb and previous gate line (not shown) or extra signal wire (not shown) is plugged between the two.
The color filter 230 of one of display primaries is arranged in the zone corresponding to pixel electrode PE of top panel 200.Be different from Figure 14, color filter CF can place lower panel 100 pixel electrode PE above or below.
At least one polarizer (not shown) is arranged in the liquid crystal panel assembly.
Comprise the description of the description of the operation of LCD of liquid crystal panel assembly and effect referring to figs. 1 through the same parts shown in 5.Therefore, will omit detailed description.
Hereinafter, with reference to Figure 15 and 16, will the example of the liquid crystal panel assembly shown in Figure 14 be described.
Figure 15 is the layout according to the liquid crystal panel assembly of the embodiment of the invention, and Figure 16 is the sectional view of the liquid crystal panel assembly that obtains of the XVI-XVI line along Figure 15.
Layered structure according to the layered structure of the liquid crystal panel assembly of present embodiment and the liquid crystal panel assembly shown in Figure 11 and 12 is basic identical.
At first, lower panel 100 will be described.
Many gate lines 121 and Duo Gen public pressure wire 271 (comprising many to first grid electrode 124a and second grid electrode 124b) are formed on the insulated substrate 110.
Public pressure wire 271 transmission common electric voltage Vcom and edge are basically parallel to the horizontal direction of gate line 121 and extend.Public pressure wire 271 places between two adjacent gate polar curves 121 also spaced apart with two gate lines 121 by essentially identical distance.
A plurality of public electrodes 270 are formed on insulated substrate 110 and the public pressure wire 271.Public electrode 270 has quadrangle.Public electrode 270 is arranged to matrix and almost occupies space between the gate line 121.Public electrode 270 is connected to the public pressure wire 271 that will be applied in common electric voltage Vcom.Public electrode 270 can for example ITO, IZO etc. make by transparent conductive material.
Gate insulator 140 is formed on gate line 121, public pressure wire 271 and the public electrode 270.Gate insulator 140 prevents the short circuit and allow gate line 121 and public electrode 270 is electrically insulated from formation other conductive film thereon each other of gate line 121 and public electrode wire 270.
Many to the first island N-type semiconductor N 154a and the second island N-type semiconductor N 154b, many to the first island type Ohmic contact 163a and the second island type Ohmic contact 165a, many to the first data line 171a and the second data line 171b and many first drain electrode 175a and the second drain electrode 175b sequentially are formed on the gate insulator 140.
The following passivation layer 180p that is made by silicon nitride or monox is formed on the expose portion of the first data line 171a and the second data line 171b, the first drain electrode 175a and the second drain electrode 175b and the first semiconductor 154a and the second semiconductor 154b.
With predetermined interval separately and the frequency modulated light spare 220 with a plurality of openings 227 be formed on down on the passivation layer 180p.Frequency modulated light spare 220 can comprise the linear segment of vertical elongation and corresponding to four angle parts of thin film transistor (TFT).Frequency modulated light spare 220 prevents the light leakage.Place a plurality of through hole 225a and the 225b of the first drain electrode 175a and second drain electrode 175b top to be formed on the frequency modulated light spare 220.
A plurality of color filters 230 are formed on passivation layer 180p and the frequency modulated light spare 220.The major part of color filter 230 is arranged on by in the frequency modulated light spare 220 region surrounded scopes.
Here, following passivation layer 180p can prevent that the pigment of color filter 230 from entering into the expose portion of semiconductor 154a and 154b.
Last passivation layer 180q is formed on frequency modulated light spare 220 and the color filter 230.Last passivation layer 180q can for example silicon nitride, monox etc. be made by inorganic insulating material.By suppressing the pollution of liquid crystal layer 3, last passivation layer 180q prevents color filter 230 layerings and prevents the wrong image retention that for example can take place that when driving screen this is because organic material is for example caused by the solvent that color filter 230 is introduced.
Yet at least one frequency modulated light spare 220 and color filter 230 can place on the top panel 200.In the case, can omit one of the following passivation layer 180p of lower panel 100 and last passivation layer 180q.
The a plurality of contact hole 185a and the 185b that are used to expose the first drain electrode 175a and the second drain electrode 175b are formed on passivation layer 180q and following passivation layer 180p.
Many the first pixel electrode 191a and the second pixel electrode 191b are formed on the passivation layer 180q.The first pixel electrode 191a comprises a plurality of branch electrodes and the vertical coupling part that is connected branch electrodes with the second pixel electrode 191b.The public electrode 270 of the first pixel electrode 191a and the second pixel electrode 191b and the first pixel electrode 191a and second pixel electrode 191b below is stacked.
Vertically extend on the left side of public electrode 270 the vertical coupling part of the first pixel electrode 191a.Place the branch electrodes of public pressure wire 271 tops to have a down dip to the right and tiltedly extend from the coupling part, the branch electrodes that places public pressure wire 271 belows from the coupling part to the right updip tiltedly extend.
Vertically elongate on the right side of public electrode 270 the vertical coupling part of the second pixel electrode 191b.The branch electrodes that places public pressure wire 271 tops from the coupling part left updip tiltedly extend, place another branch electrodes of public pressure wire 271 belows to extend obliquely to left down from the coupling part.
The branch electrodes of the first pixel electrode 191a and the second pixel electrode 191b is engaged with each other with predetermined interval and alternately is provided with, thereby forms the pectination pattern.
The liquid crystal layer 3 that is plugged between lower panel 100 and the top panel 200 has positive dielectric anisotropy and comprises liquid crystal molecule 31.Liquid crystal molecule 31 has when not having electric field by orientation and is the major axis perpendicular to the surface of panel 100 and 200.
The first pixel electrode 191a and the second pixel electrode 191b (it is applied with the data voltage from the first drain electrode 175a and the second drain electrode 175b) constitute liquid crystal capacitor Clc together with the liquid crystal layer 3 that is plugged between the two.Even after the first film transistor Qa and second thin film transistor (TFT) Qb shutoff, the voltage that is applied also is stored.
Except gate insulator 140, last insulation course 180p and following insulation course 180q, the first pixel electrode 191a and the second pixel electrode 191b and public electrode 270 are also made by dielectric substance, so that constitute the first holding capacitor Csta and the second holding capacitor Cstb, thereby improve the store voltages performance of liquid crystal capacitor Clc.Some that place color filter 230 between the first pixel electrode 191a and the second pixel electrode 191b and the public electrode 270 are removed, and cause the memory capacitance of the first holding capacitor Csta and the second holding capacitor Cstb to increase.
The first extension 177a that is connected to the first pixel electrode 191a and the second pixel electrode 191b of the first drain electrode 175a and the second drain electrode 175b and the second extension 177b be stacked and gate insulator 140 betweens with storage extension 137, thereby form the first holding capacitor Csta and the second holding capacitor Cstb.The first holding capacitor Csta and the second holding capacitor Cstb have strengthened the store voltages performance of liquid crystal capacitor Clc.
Both alignment layers 11 and 21 is formed on the inside surface of lower panel 100 and top panel 200.Two both alignment layers 11 and 21 can be the horizontal direction matching layers.
When common electric voltage Vcom was applied to public electrode 270 and is applied to the first pixel electrode 191a and the second pixel electrode 191b with respect to two data voltages that common electric voltage Vcom has an opposed polarity, the electric field that is basically parallel to the horizontal surface of panel 100 and 200 produced in liquid crystal layer 3.Therefore, to have by orientation be the major axis of level in electric field to the liquid crystal molecule 31 of liquid crystal layer 3.The polarization of incident light degree changes according to the angle of inclination.Embodiment before being different from, in the present embodiment, by be created in the liquid crystal layer 3 between the first pixel electrode 191a and the second pixel electrode 191b electric field and by being created in the electric field in the liquid crystal layer 3 between the public electrode 270 and the first pixel electrode 191a and the second pixel electrode 191b, can increase the response speed of liquid crystal molecule 31 and further improve the transmissivity of LCD.Simultaneously, the horizontal component of electric field is basically perpendicular to the branch electrodes of the first pixel electrode 191a and the second pixel electrode 191b.As shown in figure 15, because the direction of orientation of branch electrodes differs from one another based on public pressure wire 271, can obtain wide visible angle by the direction of orientation that changes liquid crystal molecule 31.
Then, with reference to Figure 17, liquid crystal panel assembly in accordance with another embodiment of the present invention will be described.
Figure 17 illustrates according to the structure of the liquid crystal panel assembly of the embodiment of the invention and the equivalent circuit diagram of a pixel.
With reference to Figure 17, comprise also that according to the liquid crystal panel assembly of present embodiment signal wire (comprises a plurality of gate lines G
iAnd it is many to data line D
jAnd D
J+1) and a plurality of pixel PX that are connected to it as shown in figure 14.
Each pixel PX comprises that the first on-off element Qa and second switch element Qb (are connected to signal wire G
i, D
jAnd D
J+1), liquid crystal capacitor Clc, the first liquid crystal capacitor Clca and the second liquid crystal capacitor Clcb and the first holding capacitor Csta and the second holding capacitor Cstb.
Yet different with the embodiment shown in Figure 14, in the present embodiment, public electrode CE is formed on whole top panels 200.The first pixel electrode PEa/, the second pixel electrode PEb of the first liquid crystal capacitor Clca/, second liquid crystal capacitor Clcb employing lower panel 100 and the public electrode CE of top panel 200 are as its two terminals.The first pixel electrode PEa of liquid crystal capacitor Clc employing lower panel 100 and the second pixel electrode PEb are as two terminals.
By with pixel electrode PE (comprising the first pixel electrode PEa, the second pixel electrode PEb) and signal wire (not shown) or gate line (not shown) before is stacked in the top of corresponding gate line and insulator is plugged between the two, the first holding capacitor Csta and the second holding capacitor Cstb are configured.
In the present embodiment, the first pixel electrode PEa and the second pixel electrode PEb of the data voltage by being applied with opposed polarity, level is created in the liquid crystal layer 3 in the electric field of panel 100 and 200.Simultaneously, by the first pixel electrode PEa of lower panel 100 and the public electrode CE of the second pixel electrode PEb and top panel 200, extra electric field is created in the liquid crystal layer 3.The edge of the first pixel electrode PEa and the second pixel electrode PEb makes electric field distorting together with public electrode CE, thereby produces the horizontal component perpendicular to the edge of pixel electrode PEa and PEb.Therefore, for being parallel to electric field, the polarization of incident light intensity of variation in the liquid crystal layer 3 changes according to the angle of inclination of liquid crystal molecule the liquid crystal molecule of liquid crystal layer 3 with positive dielectric anisotropy by orientation.
Different with present embodiment, the first pixel electrode PEa and the second pixel electrode PEb can be stacked on top of each other, thereby form the holding capacitor (not shown).
Hereinafter, with reference to Figure 18 and Figure 19, will the example of the liquid crystal panel assembly shown in Figure 17 be described.
Figure 18 is the layout according to the liquid crystal panel assembly of the embodiment of the invention, and Figure 19 is the sectional view that cuts open the liquid crystal panel assembly of getting along the XIX-XIX line among Figure 18.
Basically the hierarchy with the liquid crystal panel assembly shown in Figure 11 and Figure 12 is identical according to the hierarchy of the liquid crystal panel assembly of present embodiment.
At first, lower panel 100 will be described.Many gate lines 121 (comprising many to first grid electrode 124a and second grid electrode 124b) and many storage electrode lines 131 are formed on the insulated substrate 110.Gate insulator 140 forms thereon.Many to the first linear semiconductor 151a and second linear semiconductor, many to the first linear Ohmic contact 161a and the second linear Ohmic contact (not shown), many to the first island type Ohmic contact 165a and the second island type Ohmic contact (not shown), many to the first data line 171a and the second data line 171b and many first drain electrode 175a and the second drain electrode 175b sequentially are formed on the gate insulator 140.Passivation layer 180, the first pixel electrode 191a and the second pixel electrode 191b and both alignment layers 11 sequentially form thereon.
Then, top panel 200 will be described.Light blocking part 220, color filter 230, overlayer 250, public electrode 270 and both alignment layers 21 sequentially are formed on the insulated substrate 210.
Different with the liquid crystal panel assembly shown in Figure 11 and Figure 12, in the present embodiment, the first linear semiconductor 151a and the second linear semiconductor (not shown) are linear and comprise respectively along source electrode 173a and 173b and drain electrode 175a and the outstanding first projection 154aa and the second projection 154bb of 175b.In addition, linear Ohmic contact 161a also extends linearly and comprises the outstanding projection 163a along source electrode 173a along data line 171a.And other linear Ohmic contact (not shown) extends linearly and comprises the outstanding projection (not shown) along source electrode 173b along data line 171b.Linear semiconductor 151a has basically and data line 171a, drain electrode 175a and Ohmic contact 161a, 163a and the essentially identical even shape of 165a (below data line 171a and drain electrode 175a).And the second linear semiconductor (not shown) has and data line 171b, drain electrode 175b and the essentially identical even shape of Ohmic contact (not shown) below data line 171b and drain electrode 175b.
In the method for making lower panel 100 according to an embodiment of the invention, data line 171a and 171b, drain electrode 175a and 175b, semiconductor 151a and Ohmic contact 161a, 163a and 165a form by a photoetching process.
Storage electrode line 131 places between two adjacent gate polar curves 121 and with essentially identical distance and two gate lines 121 and separates.The first pixel electrode 191a and the second pixel electrode 191b are stacked on the storage electrode line 131 and gate line insulation course 140 and passivation layer 180 are plugged between the two, thereby form the first holding capacitor Csta and the second holding capacitor Cstb.At this moment, the passivation layer 180 in the stacked mutually part of the first pixel electrode 191a and the second pixel electrode 191b and storage electrode line 131 can be removed.
Each of the first pixel electrode 191a and the second pixel electrode 191b has horizontal component and a plurality of vertical component.The horizontal component of the first pixel electrode 191a is positioned at the lower end, and a plurality of vertical components of the first pixel electrode 191a extend upward from horizontal component.The horizontal component of the second pixel electrode 191b is positioned at the upper end, and a plurality of vertical components of the second pixel electrode 191b extend downwards from horizontal component.Horizontal component and the vertical component of the first pixel electrode 191a and the second pixel electrode 191b are perpendicular to one another in fact.The vertical component of the first pixel electrode 191a and the second pixel electrode 191b alternately is provided with.
In addition, the liquid crystal panel assembly shown in Fig. 1, Fig. 5, Fig. 6 and Fig. 7 and comprise that the various characteristics of its LCD also can be applied to the liquid crystal panel assembly shown in Figure 18 and Figure 19.
Then, with reference to Figure 20, liquid crystal panel assembly in accordance with another embodiment of the present invention will be described.
Figure 20 illustrates according to the structure of the liquid crystal panel assembly of the embodiment of the invention and the equivalent circuit diagram of a pixel.
With reference to Figure 20, comprise also that according to the liquid crystal panel assembly of present embodiment signal wire (comprises many gate lines G
iWith many to data line D
jAnd D
J+1) and a plurality of pixel PX of being connected thereto, embodiment as shown in Figure 8.
In the present embodiment, each pixel PX comprises that the first on-off element Qa and second switch element Qb (are connected to signal wire G
i, D
jAnd D
J+1), liquid crystal capacitor Clc and the first holding capacitor Csta and the second holding capacitor Cstb.
The control end of each of the first on-off element Qa/ second switch element Qb is connected to gate lines G
i, its input end is connected to gate line D
j/ D
J+1, its output terminal is connected to the first pixel electrode PEa/, the second pixel electrode PEb.
The first pixel electrode PEa of liquid crystal capacitor Clc employing lower panel 100 and the second pixel electrode PEb are as two terminals.Liquid crystal capacitor Clc adopts the first pixel electrode PEa and the second pixel electrode PEb, and comprises that liquid crystal layer 3 is as dielectric substance.Distance between the first pixel electrode PEa and the second pixel electrode PEb is decided by the position of the first pixel electrode PEa and the second pixel electrode PEb.The data voltage that has opposed polarity with respect to common electric voltage Vcom is applied to the first pixel electrode PEa and the second pixel electrode PEb.Simultaneously, liquid crystal layer 3 has positive dielectric anisotropy.The liquid crystal molecule of liquid crystal layer 3 has when no electric field by orientation and is the major axis perpendicular to the surface of panel.
By above corresponding gate line, the first pixel electrode PEa and the second pixel electrode PEb being stacked on extra signal wire (not shown) or the previous gate line (not shown) and insulator is plugged between the two, form the first holding capacitor Csta and the second holding capacitor Cstb.
Be different from present embodiment, the first pixel electrode PEa and the second pixel electrode PEb can be stacked on top of each other and insulator is plugged between the two, thereby form a holding capacitor (not shown).
By the first pixel electrode PEa and the second pixel electrode PEb, it is applied with the data voltage that has opposed polarity with respect to common electric voltage Vcom, and basic horizontal is created in the liquid crystal layer 3 in the electric field of panel 100 and 200.Nearer each other as the first pixel electrode PEa and the second pixel electrode PEb, to compare with the situation that the first pixel electrode PEa and the second pixel electrode PEb are far away each other, it is stronger that electric field becomes.Therefore, place the angle of inclination of liquid crystal molecule in the more close each other place of the first pixel electrode PEa and the second pixel electrode PEb relative big, so that more be parallel to electric field, so transmittance increases.Like this, because having two zones of different transmittances is present among the pixel PX, by suitably adjusting the distance between the first pixel electrode PEa and the second pixel electrode PEb, the side gamma curve can be the biglyyest near preceding gamma curve, thereby has improved the side visuality.In addition, by alternately mixing the first pixel electrode PEa and second pixel electrode PEb part far away each other and the first pixel electrode PEa and the nearer each other part of the second pixel electrode PEb, can improve the transmissivity of LCD.
In addition, according to an embodiment of the invention the description of the operation of LCD (comprising color filter CF, polarizer (not shown) and liquid crystal panel assembly) and effect referring to figs. 1 through the description of the same parts shown in Fig. 5.Therefore, will omit detailed description.
Hereinafter, with reference to Figure 21 and Figure 22, will the example of the liquid crystal panel assembly shown in Figure 20 be described.
Figure 21 is the layout according to the liquid crystal panel assembly of the embodiment of the invention, and Figure 22 is the sectional view of the liquid crystal panel assembly that obtains along XXII-XXII line among Figure 21.
Basically the hierarchy with the liquid crystal panel assembly shown in Figure 11 and Figure 12 is identical according to the hierarchy of the liquid crystal panel assembly of present embodiment.
At first, lower panel 100 will be described.Many gate lines 121 (comprising many to first grid electrode 124a and second grid electrode 124b) and a plurality of storage electrode line 131 are formed on the insulated substrate 110.Gate insulator 140 forms thereon.Many to the first island N-type semiconductor N 154a and the second island N-type semiconductor N 154b, many to the first island type Ohmic contact 163a and the second island type Ohmic contact 165a, many to the first data line 171a and the second data line 171b and many first drain electrode 175a and the second drain electrode 175b sequentially are formed on the gate insulator 140.Passivation layer 180, the first pixel electrode 191a with a plurality of components and the second pixel electrode 191b and both alignment layers 11 sequentially form thereon.The component of the first pixel electrode 191a and the second pixel electrode 191b extends and obliquely with respect to the tilt angles of about 45 degree of gate line 121 or storage electrode line 131.
Then, top panel 200 will be described.Light blocking part 220, color filter 230, overlayer 250, public electrode 270 and both alignment layers 21 sequentially are formed on the insulated substrate 210.
Different with the embodiment shown in Figure 11 and Figure 12, in the present embodiment, there are low gray areas LA (wherein the component of the first pixel electrode 191a and the second pixel electrode 191b is far away each other) and high gray areas (wherein the component of the first pixel electrode 191a and the second pixel electrode 191b is nearer each other), just the zone except low gray areas LA.High gray areas is divided into three parts for example top, bottom and middle part.Low gray areas LA places between the top or bottom and middle part of high gray areas, and has the shape of "<".Gap in low gray areas LA between the component of the first pixel electrode 191a and the second pixel electrode 191b can be at 6 μ m in the scope of 20 μ m.Gap in high gray areas between the component of the first pixel electrode 191a and the second pixel electrode 191b can be at 2 μ m in the scope of 5 μ m.Yet in low gray areas LA and high gray areas, the gap between the component of the first pixel electrode 191a and the second pixel electrode 191b and the width of component can change.
By changing the gap between the first pixel electrode 191a and the second pixel electrode 191b in the pixel, can change the pitch angle of liquid crystal molecule and show different brightness as information about set of diagrams.In addition, by the gap between the component of suitably adjusting the first pixel electrode 191a and the second pixel electrode 191b, can make the image of watching from the side the biglyyest near the image of watching from the place ahead.Therefore, it is visual and strengthen transmissivity to improve side.
In addition, storage electrode line 131 comprises outstanding a plurality of storage electrodes 137 downwards.Each of the first drain electrode 175a and the second drain electrode 175b and storage electrode 137 are stacked, thereby form the first holding capacitor Csta and the second holding capacitor Cstb.
In addition, the first data line 171a and the second data line 171b comprise to first grid electrode 124a and second grid electrode 124b and bend to C shape or bend to C shape many to the first drain electrode 173a and the second drain electrode 173b of upset sidewards.
In addition, the liquid crystal panel assembly shown in Fig. 1, Fig. 5, Fig. 6 and Fig. 7 and comprise that the various characteristics of its LCD also can be applied to the liquid crystal panel assembly shown in Figure 21 and Figure 22.
Then, to Figure 25, will another example of the liquid crystal panel assembly shown in Figure 20 be described with reference to Figure 23.
Figure 23 is a layout according to the liquid crystal panel assembly of the embodiment of the invention to Figure 25.
At first, will the liquid crystal panel assembly shown in Figure 23 be described.
Liquid crystal panel assembly according to present embodiment is identical with the liquid crystal panel assembly shown in Figure 21 and Figure 22 basically.
Yet except top panel 100 or lower panel 200, the liquid crystal panel assembly also comprises light blocking part 220.Light blocking part 220 prevents that the light between the pixel electrode 191 from revealing and the open area of definition pixel-oriented electrode.
In addition, the first pixel electrode 191a and the second pixel electrode 191b low gray areas far away each other is with respect to high gray areas (wherein the first pixel electrode 191a and the second pixel electrode 191b are nearer each other), just the zone except low gray areas LA places the upper and lower dividually.Gap between the first pixel electrode 191a and the second pixel electrode 191b can with Figure 21 in different.Gap between first pixel electrode 191a among the low gray areas LA and the component of the second pixel electrode 191b can be at 6 μ m in the scope of 20 μ m.Gap in the high gray areas between the component of the first pixel electrode 191a and the second pixel electrode 191b can be at 2 μ m in the scope of 5 μ m.
Then, will the liquid crystal panel assembly shown in Figure 24 be described.
Basically the hierarchy with the liquid crystal panel assembly shown in Figure 21 and Figure 22 is identical according to the hierarchy of the liquid crystal panel assembly of present embodiment.Hereinafter, with the main embodiment difference shown in description and Figure 21 and Figure 22.
At first, the lower panel (not shown) will be described.Comprise many to first grid electrode 124a and second grid electrode 124b many gate lines 121 and comprise that a plurality of grid conductors of many storage electrode lines 131 are formed on the insulated substrate (not shown).
Storage electrode line 131 comprises many to the first storage electrode 133a and the second storage electrode 133b.The first storage electrode 133a and the second storage electrode 133b are spaced apart from each other within a predetermined distance.Each of the first storage electrode 133a and the second storage electrode 133b vertically stretches and is included in the extension of its lower end.Above storage electrode line 131, comprise that the storage electrode line 131 of storage electrode 133a and 133b is stacked by the first pixel electrode 191a and the second pixel electrode 191b, thereby form the first holding capacitor Csta and the second holding capacitor Cstb.
Gate insulator (not shown), many to the first island N-type semiconductor N 154a and the second island N-type semiconductor N 154b, many to the first island type Ohmic contact and the second island type Ohmic contact (not shown), many to the first data line 171a and the second data line 171b and many first drain electrode 175a and the second drain electrode 175b sequentially are formed on grid conductor 121 and 131.
The first data line 171a and the second data line 171b comprise and bend to W shape and extend many to the first drain electrode 173a and the second drain electrode 173b towards first grid electrode 124a and second grid electrode 124b across the land.The first drain electrode 175a and the second drain electrode 175b comprise a pair of excellent type end and other end with big size.
Passivation layer 180 is formed on the expose portion of the first data line 171a and the second data line 171b, the first drain electrode 175a and the second drain electrode 175b and semiconductor 154a and 154b.The first pixel electrode 191a and the second pixel electrode 191b form thereon.
The first pixel electrode 191a comprises vertical component 192a, horizontal component 193a, the part 194a of top set and inferior division part 195a.Horizontal component 193a substantially vertically divides vertical component 192a equally and extends to the right.The part 194a of top set place horizontal component 193a top and from vertical component 192a or horizontal component 193a obliquely to upper right extension.Inferior division part 195a places horizontal component 193a below and extends down to the right obliquely from vertical component 192a or horizontal component 193a.
The second pixel electrode 191b comprises vertical component 192b, last horizontal component 193b1, following horizontal component 193b2, the part 194b of top set and inferior division part 195b.Vertical component 192b is relative with vertical component 192a via the horizontal component 193a of the first pixel electrode 191a.Last horizontal component 193b1 and following horizontal component 193b2 extend to the left in the top and bottom of vertical component 192b respectively, and tilt with respect to vertical component 192b basically with meeting at right angles.The part 194b of top set places the horizontal component 193a top of the first pixel electrode 191a and from the vertical component 192b of the second pixel electrode 191b or go up horizontal component 193b1 and extend obliquely to left down.Inferior division part 195b place the first pixel electrode 191a horizontal component 193a below and from the vertical component 192b of the second pixel electrode 191b or down horizontal component 193b2 left updip tiltedly extend.
Component 194a, 194b, 195a and the 195b of the first pixel electrode 191a and the second pixel electrode 191b can be with respect to gate line 121 or the about miter angle of storage electrode line 131 inclinations.
The part 194a of top set, 194b and inferior division part 195a, the 195b of the first pixel electrode 191a and the second pixel electrode 191b are arranged alternately.Zone that the first adjacent pixel electrode 191a and the second pixel electrode 191b are far away each other and the first adjacent pixel electrode 191a and the nearer each other zone of the second pixel electrode 191b are arranged alternately.Just, compare with the part 194a/ of the top set inferior division part 195a of the below/top that is arranged on the part 194b/ of top set inferior division part 195b, the part 194b/ of this top set inferior division part 195b of the second pixel electrode 191b is more approaching to be arranged on the part 194a/ of the top set inferior division part 195a of the first pixel electrode 191a of top/below of the part 194b/ of this top set inferior division part 195b.Alternatively, the part 194b/ of the top set inferior division part 195b of the second pixel electrode 191b can more approachingly be positioned at the part 194a/ of the top set inferior division part 195a of the first pixel electrode 191a of the part 194b/ of top set inferior division part 195b below/top.
In this mode, by being arranged alternately the first pixel electrode 191a and the second pixel electrode 191b zone far away each other and the first pixel electrode 191a and the nearer each other zone of the second pixel electrode 191b, can changing in liquid crystal layer 3 electric field intensity that produces and change the pitch angle of liquid crystal molecule 31.In addition, can improve the side visuality (side visibility) and the transmissivity of LCD.
Be different from present embodiment, the first pixel electrode 191a and the second pixel electrode 191b several zones far away each other can be positioned near the nearer each other zone of the first pixel electrode 191a and the second pixel electrode 191b.In addition, the first pixel electrode 191a and the nearer each other several zones of the second pixel electrode 191b can be positioned near the first pixel electrode 191a and the second pixel electrode 191b zone far away each other.In addition, by adjusting the distance between the first pixel electrode 191a and the second pixel electrode 191b or adjusting the first pixel electrode 191a and the layout in the zone that zone that the second pixel electrode 191b is far away each other and the first pixel electrode 191a and the second pixel electrode 191b are nearer each other, can make the transmissivity maximization and improve the side visuality.
Then, the both alignment layers (not shown) is formed on passivation layer (not shown) and pixel electrode 191a and the 191b.
Below, will be described the top panel (not shown).Light blocking part (not shown), color filter (not shown), overlayer (overcoat) (not shown) and both alignment layers (not shown) are formed on the insulated substrate (not shown) in turn.
In addition, the various characteristics of the liquid crystal panel assembly shown in Figure 21 and Figure 22 also can be applied to the liquid crystal panel assembly shown in Figure 24.
Next, will be described the liquid crystal panel assembly shown in Figure 25.
Liquid crystal panel assembly and the liquid crystal panel assembly shown in Figure 24 according to present embodiment are basic identical.
Below, will the place that be different from the embodiment shown in Figure 24 be described mainly.
Be different from the liquid crystal panel assembly shown in Figure 24, in the present embodiment, storage electrode line 131 is near the following gate line 121 in two gate lines 121, respectively with the upper strata in the first drain electrode 175a and the second drain electrode 175b stacked, and comprise the first storage electrode 133a and the second storage electrode 133b that projects upwards.The first storage electrode 133a and the second storage electrode 133b respectively with the big overlay area of the part of the first drain electrode 175a and the second drain electrode 175b, and have the insulator 140 that is plugged between the two, thereby form the first holding capacitor Csta and the second holding capacitor Cstb.
In addition, the liquid crystal panel assembly according to present embodiment comprises the first pixel electrode 191a and the second pixel electrode 191b that is formed on the passivation layer 180.The general outline of the first pixel electrode 191a and the second pixel electrode 191b has rectangular shape.
The first pixel electrode 191a be included in left vertical component 192a that vertical direction extends longways, right vertical component 198a that vertical direction is extended shortly, on horizontal component 193a, a plurality of curved branches of extending from part 192a, 193a, 198a divide 195a and a plurality of linear branch part 197a, and crooked three times and a pair of center curvature part 196a that extends longways in vertical direction.The right vertical component 192b that the second pixel electrode 191b is included in left vertical component 198b that vertical direction extends shortly, extend longways in vertical direction, horizontal component 193b, a plurality of curved branches of extending from part 192b, 193b and 198b are divided 195b and a plurality of linear branch part 197b down, and crooked three times and a pair of center curvature part 196b that extends longways in vertical direction.
The curved branches of the first pixel electrode 191a divides the curved branches of 195a, linear branch part 197a and the center curvature part 196a and second pixel electrode to divide 195b, linear branch part 197b and center curvature part 196b to be arranged alternately respectively.Adjacent curved branches divides distance or adjacent linear branch part 197a and the distance between the 197b between 195a and the 195b bigger than adjacent center curvature part 196a and the distance between the 196b.Thereby, be better than curved branches in the electric field intensity that produces between center curvature part 196a and the 196b and divide the electric field intensity that produces between 195a and the 195b or be better than the electric field intensity that produces between linear branch part 197a and the 197b.The pitch angle of the liquid crystal molecule of the liquid crystal layer (not shown) in center curvature part 196a and 196b is greater than dividing among 195a and the 195b in curved branches or the pitch angle of the liquid crystal molecule of the liquid crystal layer in linear component 197a and 197b.Can change the brightness of this pixel by the pitch angle that changes the liquid crystal molecule in a pixel or improve the side visuality of liquid crystal molecule display by adjusting gap between pixel electrode 191a and the 191b.
Then, with reference to Figure 26, will liquid crystal panel assembly according to another embodiment of the invention be described.
Figure 26 illustrates the structure of liquid crystal panel assembly and the equivalent circuit diagram of a pixel according to an embodiment of the invention.
With reference to Figure 26, each pixel PX comprises a pair of first sub-pixel PXh and the second sub-pixel PXl.The first sub-pixel PXh and the second sub-pixel PXl comprise liquid crystal capacitor Clch and Clcl and holding capacitor Csth and Cstl.At least one of the first sub-pixel PXh and the second sub-pixel PXl comprises two on-off element (not shown) and liquid crystal capacitor Clch and the Clcl that is connected to gate line, data line.
First pixel electrode PEha of liquid crystal capacitor Clch and Clcl employing lower panel 100 and PEla and the second pixel electrode PEhb and PElb are as two terminals.Liquid crystal layer 3 between the first pixel electrode PEha and PEla and the second pixel electrode PEhb and the PElb plays dielectric substance.The second pixel electrode PEhb and PElb are connected respectively to on-off element (not shown) separately.At least one of the first pixel electrode PEha and PEla also is connected to an on-off element (not shown) that separates.Yet in contrast, the second pixel electrode PEhb and PElb can be arranged on the top panel 200.Simultaneously, the second pixel electrode PEhb and PElb can be applied in additional common electric voltage Vcom and be free of attachment to on-off element.Simultaneously, the liquid crystal molecule of liquid crystal layer 3 have positive dielectric anisotropy and by orientation for perpendicular to panel 100 and 200.
The holding capacitor Csth/Cstl that carries out the booster action of liquid crystal capacitor Clch/Clcl is formed by the first pixel electrode PEha/PEla that is inserted with insulator between the lower panel 100 and the second pixel electrode PEhb/PElb.
In addition, identical to the description of color filter CF and polarizer (not shown) with former embodiment, therefore omit description to it.
Below, with reference to Figure 27, will the example of the liquid crystal panel assembly shown in Figure 26 be described in detail.
Figure 27 is the equivalent circuit diagram that two sub-pixels of liquid crystal panel assembly according to another embodiment of the invention are shown.
With reference to Figure 27, comprise that according to the liquid crystal panel assembly of present embodiment (it comprises gate lines G to signal wire
iAnd the first data line D adjacent one another are
jWith the second data line D
J+1) and be connected to the pixel PX of signal wire.
Pixel PX comprises a pair of first sub-pixel PXh and the second sub-pixel PXl.Each of the first sub-pixel PXh and the second sub-pixel PXl comprises and is connected to gate lines G
iAnd data line D
jAnd D
J+1The first on-off element Qha and Qla and second switch element Qhb and Qlb, be connected to the liquid crystal capacitor Clch and the Clcl of on-off element and the first holding capacitor Cstha and the Cstla and second holding capacitor Csthb and the Cstlb.
The data voltage that has reciprocal polarity with respect to common electric voltage Vcom is applied to the first data line D
jWith the second data line D
J+1
The control end and the input end of each of the first on-off element Qha/Qla of the first sub-pixel PXh/, the second sub-pixel PXl are connected respectively to gate lines G
iWith the first data line D
jThe control end and the input end of each of the second switch element Qhb/Qlb of the first sub-pixel PXh/, the second sub-pixel PXl are connected respectively to gate lines G
iWith the second data line D
J+1In addition, the output terminal of each of the first on-off element Qha/Qla is connected to the liquid crystal capacitor Clch/Clcl and the first holding capacitor Cstha/Cstla.The output terminal of each of second switch element Qhb/Qlb is connected to the liquid crystal capacitor Clch/Clcl and the second holding capacitor Csthb/Cstlb.
The first on-off element Qha/Qla of the first sub-pixel PXh/, the second sub-pixel PXl and the drain electrode of second switch element Qhb/Qlb and gate electrode constitute the first capacitor parasitics Cgdha/Cgdla and the second capacitor parasitics Cgdhb/Cgdlb.
In the present embodiment, can change the size of flyback voltage (kickback voltage) at place, two ends by the capacity of adjusting the first capacitor parasitics Cgdha, Cgdla and the second capacitor parasitics Cgdhb, Cgdlb, cause each the charging voltage of sub-pixel PXh or PXl to change in each of liquid crystal capacitor Clch and Clcl.
For example, 7V and-voltage of 7V is applied to the first data line D
jWith the second data line D
J+1Situation in, the size of the flyback voltage among the second capacitor parasitics Cgdhb of the first sub-pixel PXh and the first capacitor parasitics Cgdla of the second sub-pixel PXl is 0.5V, the size of the flyback voltage among the first capacitor parasitics Cgdha of the first sub-pixel PXh and the second capacitor parasitics Cgdlb of the second sub-pixel PXl is 1V, will be described respectively it.Then, be applied to gate lines G as grid cut-off voltage Voff
iThe time, each of the voltage at the two ends of liquid crystal capacitor Clch and Clcl reduced by flyback voltage.As a result, 6V and-7.5V is applied to the two ends of liquid crystal capacitor Clch, charging voltage becomes 13.5V.In addition, 6.5V and-8V is applied to the two ends of liquid crystal capacitor Clcl, charging voltage becomes 14.5V.Therefore, the pixel voltage of the first sub-pixel PXh and the second sub-pixel PXl becomes 13.5V and 14.5V respectively, thereby the pitch angle of liquid crystal molecule is differed from one another and has changed transmittance among the first sub-pixel PXh and the second sub-pixel PXl.As mentioned above, by adjusting the capacity of the first capacitor parasitics Cgdha, Cgdla and the second capacitor parasitics Cgdhb, Cgdlb, can under the prerequisite that does not reduce data voltage, improve the transmissivity of the visual of LCD and enhancing LCD.
To identical among the description of liquid crystal capacitor Clch and Clcl, the first holding capacitor Cstha, Cstla and the second holding capacitor Csthb, Cstlb and the former embodiment.Therefore, omitted detailed description to them.
Below, with reference to figure 28A and 28B, the example of the liquid crystal panel assembly shown in Figure 27 is described.
Figure 28 A is the layout of liquid crystal panel assembly according to an embodiment of the invention, and Figure 28 B is the layout of amplification of the on-off element of the liquid crystal panel assembly shown in Figure 28 A.
Hierarchy according to the hierarchy of liquid crystal panel assembly of the present invention and the liquid crystal panel assembly shown in Figure 21 and Figure 22 is basic identical.
At first, will be described the lower panel (not shown).Comprise many many gate lines 121, comprise that the many of a plurality of storage electrode 133h and 133l are formed on the insulated substrate (not shown) last storage electrode line 131h and following storage electrode line 131l first grid electrode 124ha and 124la and second grid electrode 124hb and 124lb.The gate insulator (not shown), many to the first semiconductor 154ha and the 154la and second semiconductor 154hb and the 154lb, many to the first island type Ohmic contact (not shown) and the second island type Ohmic contact (not shown), comprise that the first source electrode 173ha and 173la and the second source electrode 173hb and 173lb's is many to the first data line 171a and the second data line 171b, many to the first drain electrode 175ha and the 175la and second drain electrode 175hb and the 175lb, comprise a plurality of contact hole (185ha, 1851a, 185hb, passivation layer (not shown) 185lb), and many first pixel electrode 191ha and 191la and the second pixel electrode 191hb and 191lb are formed on the lower panel in turn.
Then, will be described the top panel (not shown).Light blocking part (not shown), color filter (not shown), overlayer (not shown) and both alignment layers (not shown) are formed on the insulated substrate (not shown) in turn.
Gate line 121 and storage electrode line 131h and 131l extend and intersect with the center of pixel PX.Gate line 121 is between storage electrode line 131h and 131l.
The first pixel electrode 191ha and the second pixel electrode 191hb of the first sub-pixel PXh are positioned at gate line 121 tops.The first pixel electrode 191la and the second pixel electrode 191lb of the second sub-pixel PXl are positioned at gate line 121 belows.In the first sub-pixel PXh and the second sub-pixel PXl, the first pixel electrode 191ha and 191la and the second pixel electrode 191hb and 191lb comprise a plurality of components that extend to gate line 121 obliquely, and the component of the first pixel electrode 191ha and 191la and the second pixel electrode 191hb and 191lb is arranged alternately.
In the present embodiment, shown in Figure 28 B, the second grid electrode 124hb and the overlay area between the second drain electrode 175hb that constitute the second switch element Qhb of the first sub-pixel PXh can be less than the first grid electrode 124ha of the first on-off element Qha that constitutes the first sub-pixel PXh and the overlay areas between the first drain electrode 175ha.For example, constituting the second grid electrode 124hb of second switch element Qhb and the first grid electrode 124ha of the overlay area between the second drain electrode 175hb and the first on-off element Qha and the ratio of the overlay area between the first drain electrode 175ha can be 1: 1.1 to 1: 10 or 1: 2 to 1: 6.And, with stacked drain electrode 175ha of gate electrode 124ha and 124hb and 175hb be that the ratio of this overlay area equals the width ratio between drain electrode 175ha and the 175hb in the linear situation.Just, the ratio of the width D 1 of the width D 2 of the second drain electrode 175hb and the first drain electrode 175ha can be about 1: 1.1 to about 1: 10 or about 1: 2 to about 1: 6.
The first grid electrode 124la and the overlay area between the first drain electrode 175la that constitute the first on-off element Qla of the second sub-pixel PXl can be less than the second grid electrode 124lb of the second switch element Qlb that constitutes the second sub-pixel PXl and the overlay areas between the second drain electrode 175lb.
For example, constitute the first grid electrode 124la of the first on-off element Qla and the overlay area between the first drain electrode 175la and constitute the second grid electrode 124lb of second switch element Qlb and the ratio of the overlay area between the second drain electrode 175lb can be about 1: 1.1 to about 1: 10 or about 1: 2 to about 1: 6.And, with stacked drain electrode 175la of gate electrode 124la and 124lb and 175lb be that the ratio of this overlay area equals the width ratio between drain electrode 175la and the 175lb in the linear situation.Just, the ratio of the width D 4 of the width D 3 of the first drain electrode 175la and the second drain electrode 175lb can be about 1: 1.1 to about 1: 10 or about 1: 2 to about 1: 6.
As mentioned above, by adjusting the ratio of the overlay area between first grid electrode 124ha, 124la and second grid electrode 124hb, 124lb and the first drain electrode 175ha, 175la and the second drain electrode 175hb, the 175lb, can adjust the capacity of capacitor parasitics Cgdha, Cgdla, Cgdhb and Cgdlb.
Like this, can make the capacity of the volume ratio second capacitor parasitics Cgdhb of the first capacitor parasitics Cgdha of the first sub-pixel PXh big 1.1 times to 10 times, and make the capacity of the volume ratio first capacitor parasitics Cgdla of the second capacitor parasitics Cgdlb of the second sub-pixel PXl big 1.1 times to 10 times.
In addition, the capacity of the first capacitor parasitics Cgdha of the first sub-pixel PXh can equal the capacity of the second capacitor parasitics Cgdlb of the second sub-pixel PXl substantially.In addition, the capacity of the second capacitor parasitics Cgdhb of the first sub-pixel PXh can equal the capacity of the first capacitor parasitics Cgdla of the second sub-pixel PXl substantially.
Therefore, the charging voltage (pixel voltage just) of the first sub-pixel PXh and the second sub-pixel PXl is differed from one another and improve the side visuality.
Has reciprocal polarity because be applied to the data voltage of the first data line 171a and the second data line 171b, so by increasing the transmissivity that driving voltage can increase the response speed of liquid crystal molecule and improve LCD.
In addition, the various characteristics among the embodiment shown in Figure 21 and Figure 22 can be applied to present embodiment.
Below, with reference to Figure 29, another example of the liquid crystal panel assembly shown in Figure 26 is described.
Figure 29 is the equivalent circuit diagram of two sub-pixels of liquid crystal panel assembly according to another embodiment of the invention.
Be different from the liquid crystal panel assembly shown in Figure 27, in the liquid crystal panel assembly according to present embodiment, the first sub-pixel PXh or the second sub-pixel PXl comprise a holding capacitor Csth or Cstl.Therefore, when a holding capacitor Csth or Cstl are formed among each sub-pixel PXh or the PXl, do not need to be formed for transmitting the additional wiring of common electric voltage Vcom, thereby increased the aperture ratio.
Then, add Figure 30 to Figure 33, will another example of the liquid crystal panel assembly shown in Figure 26 be described with reference to above-mentioned Fig. 1.
Figure 30 is a equivalent circuit diagram according to two pixels of the liquid crystal panel assembly of another example of the present invention to Figure 33.
With reference to Figure 30, comprise that according to the liquid crystal panel assembly of present embodiment (it comprises gate lines G to signal wire
i, first to the 4th data line D adjacent one another are
j, D
J+1, D
J+2And D
J+3) and be connected to the pixel PX of signal wire.
Pixel PX comprises a pair of first sub-pixel PXh and the second sub-pixel PXl.Each of the first sub-pixel PXh/, the second sub-pixel PXl comprises and is connected to gate lines G
iAnd data line D
jAnd D
J+1/ D
J+2And D
J+3The first on-off element Qha/Qla and second switch element and Qhb/Qlb, the liquid crystal capacitor Clch that is connected to on-off element and Clcl and holding capacitor Csth and Cstl.
In the LCD that comprises this liquid crystal panel assembly, signal controller 600 receives the received image signal R, the G that are used for a pixel PX and B and converts received image signal R, G and B to output image signal DAT and is used for two sub-pixel PXh and PXl and is transferred to data driver 500.Alternatively, the grayscale voltage that is used for two sub-pixel PXh and PXl is grayscale voltage generator 800 independent generations, and alternately be provided to data driver 500 or in data driver by alternate selection, thereby apply different voltage to two sub-pixel PXh with PXl.Yet at this moment, picture signal can be corrected or can produce grayscale voltage and be arranged so that the synthetic gamma curve approaching preceding (at the front) of two sub-pixel PXh and PXl is with reference to gamma curve.For example, preceding synthetic gamma curve can meet be confirmed as to Liquid crystal module be only before with reference to gamma curve, the synthetic gamma curve of side (at the side) can be the most approaching before with reference to gamma curve.Thereby, can improve the side visuality of LCD.
In addition, by to the data line D that is connected to the first sub-pixel PXh/, the second sub-pixel PXl
jAnd D
J+1/ D
J+2And D
J+3Apply data voltage, can increase driving voltage and improve transmissivity and response speed with reciprocal polarity.
Then, be different from the liquid crystal panel assembly shown in Figure 30, with reference to Figure 31, in the liquid crystal panel assembly according to present embodiment, each of the first sub-pixel PXh or the second sub-pixel PXl comprises a holding capacitor Csth or Cstl.In addition, the description to the embodiment shown in Figure 13 or Figure 30 can be applied to present embodiment.
Then, with reference to Figure 32, comprise that according to the liquid crystal panel assembly of present embodiment (it comprises first grid polar curve G to signal wire
i, second grid line G
I+1, data line D adjacent one another are
jAnd D
J+1) and be connected to the pixel PX of signal wire.
Pixel PX comprises a pair of first sub-pixel PXh and the second sub-pixel PXl.The first sub-pixel PXh/, the second sub-pixel PXl comprises the first on-off element Qha/Qla and second switch element Qhb/Qlb, is connected to liquid crystal capacitor Clch/Clcl and the first holding capacitor Cstha/Cstla and the second holding capacitor Csthb/Cstlb of on-off element.
Be different from the liquid crystal panel assembly shown in Figure 31, in the liquid crystal panel assembly according to present embodiment, the first sub-pixel PXh and the second sub-pixel PXl that constitute a pixel PX are adjacent one another are at column direction, and are connected to different gate lines G
iAnd G
I+1Among the embodiment shown in Figure 26, the first sub-pixel PXh is applied simultaneously different data voltages with the second sub-pixel PXl, and the first sub-pixel PXh applies different data voltages with the second sub-pixel PXl with the mistiming in the present embodiment.As mentioned above, can improve visuality by the pixel voltage that changes two sub-pixel PXh and PXl.In addition, identical with former embodiment, the voltage that is applied to the two ends of the liquid crystal capacitor Clch of the first sub-pixel PXh and the second sub-pixel PXl and Clcl has different polarity with respect to common electric voltage Vcom, thereby obtains identical effect.
Simultaneously, be different from the liquid crystal panel assembly shown in Figure 32, in the liquid crystal panel assembly shown in Figure 33, each of the first sub-pixel PXh and the second sub-pixel PXl comprises a holding capacitor Csth or Cstl.
Then, with reference to Figure 34, will another example of the liquid crystal panel assembly shown in Figure 26 be described.
Figure 34 is the equivalent circuit diagram according to two sub-pixels of the liquid crystal panel assembly of another example of the present invention.
With reference to Figure 34, comprise that according to the liquid crystal panel assembly of present embodiment (it comprises gate lines G to signal wire
i, the first data line D adjacent one another are
jWith the second data line D
J+1) and be connected to the pixel PX of signal wire.Below, will mainly describe and the former embodiment difference shown in Figure 24.
Pixel PX comprises a pair of first sub-pixel PXh and the second sub-pixel PXl and the coupling condenser Ccp that is connected to these two sub-pixel PXh and PXl.The first sub-pixel PXh comprises the first on-off element Qa and second switch element Qb, is connected to liquid crystal capacitor Clch and the first holding capacitor Csta and the second holding capacitor Cstb of on-off element.The second sub-pixel PXl comprises the second switch element Qb that is connected to capacitor Ccp, the liquid crystal capacitor Clcl that is connected to on-off element and the second holding capacitor Cstb.
According to from gate lines G
iSignal, the first on-off element Qa will be from data line D
jData voltage be applied to liquid crystal capacitor Clch and coupling condenser Ccp, second switch element Qb is from data line D
J+1Receive and data line D
jThe opposite data voltage of data voltage to apply this data voltage to two liquid crystal capacitor Clch and Clcl.Therefore, because by being applied to the voltage of coupling condenser Ccp, the voltage at two ends of liquid crystal capacitor Clcl that is applied to the second sub-pixel PXl is less than the voltage at the two ends of the liquid crystal capacitor Clch that is applied to the second sub-pixel PXl, so the charging voltage among the liquid crystal capacitor Clcl is always less than the charging voltage among the liquid crystal capacitor Clch.
The suitable charging voltage of liquid crystal capacitor Clcl and liquid crystal capacitor Clch is than obtaining by the electric capacity of adjusting coupling condenser Ccp.Therefore, can improve the side visuality of LCD.
Various characteristics among the former embodiment also can be applied to the liquid crystal panel assembly according to present embodiment.
Then, with reference to Figure 35, will the example of the liquid crystal panel assembly shown in Figure 34 be described.
Figure 35 is the layout of liquid crystal panel assembly according to an embodiment of the invention.
Hierarchy according to the liquid crystal panel assembly of present embodiment is basic identical with the liquid crystal panel assembly shown in Figure 21 and Figure 22.
At first, will be described the lower panel (not shown).Comprise many many gate lines 121, many storage electrode lines 131 and comprise that a plurality of connection electrode 135 of horizontal electrode 137 are formed first grid electrode 124a and second grid electrode 124b.Gate insulator (not shown), many to the first semiconductor 154a and the second semiconductor 154b, many to the first island type Ohmic contact (not shown) and the second island type Ohmic contact (not shown), many to the first data line 171a and the second data line 171b, many to the first drain electrode 175a and the second drain electrode 175b, passivation layer (not shown), and comprise that the many first pixel electrode 191a and second pixel electrode 191b to the first pixel electrode 191ha and the second pixel electrode 191la form thereon in turn.
The first pixel electrode 191ha comprises pixel electrode 191hau and following pixel electrode 191had, and the second pixel electrode 191la is between last pixel electrode 191hau and following pixel electrode 191had.Last pixel electrode 191hau and following pixel electrode 191had are connected to connection electrode 135 below last pixel electrode 191hau and following pixel electrode 191had to be applied in identical voltage by contact hole 187d and 187u.
The last pixel electrode 191hau of the first pixel electrode 191ha and following pixel electrode 191had have vertical component and a plurality of component respectively.The second pixel electrode 191la comprises horizontal component 197la and component.The second pixel electrode 191b is included in vertical component, horizontal component and a plurality of component of vertical direction elongation.The component of the component of the first pixel electrode 191a and the second pixel electrode 191b is arranged alternately.First pixel electrode 191a adjacent one another are and the component of the second pixel electrode 191b and the liquid crystal layer 3 that is positioned between the two constitute liquid crystal capacitor Clch and Clcl.The horizontal component 197la of the second pixel electrode 191la is stacked with the transverse electrode 137 of connection electrode 135 (it is applied in the identical voltage with the first pixel electrode 191ha), thereby constitutes coupling condenser Ccp.Storage electrode line 131, the first pixel electrode 191a and the second pixel electrode 191b are stacked on top of each other, thereby constitute the first holding capacitor Csta and the second holding capacitor Cstb.
In addition, the various characteristics of liquid crystal panel assembly shown in Figure 34 and former embodiment also can be applied to present embodiment.
Then, with reference to Figure 36, will another example of the liquid crystal panel assembly shown in Figure 26 be described.
Figure 36 is the equivalent circuit diagram of two sub-pixels of liquid crystal panel assembly according to another embodiment of the invention.
With reference to Figure 36, comprise that according to the liquid crystal panel assembly of present embodiment (it comprises two gate lines G adjacent one another are to signal wire
iAnd G
I+1, the first data line D
jWith the second data line D
J+1And public pressure wire (not shown)) and be connected to a plurality of pixel PX of signal wire.
Each pixel PX comprises the first sub-pixel PXh and the second sub-pixel PXl and (boost-up) the unit B U that boosts.The first sub-pixel PXh/, the second sub-pixel PXl comprises the first on-off element Qha/Qla, second switch element Qb, liquid crystal capacitor Clch/Clcl, the first holding capacitor Cstha/Cstla and the second holding capacitor Cstb.Boosting unit BU comprises the 3rd on-off element Qc, the 4th on-off element Qd and boost capacitor Cb.
The control end of the first on-off element Qha/Qla of the first sub-pixel PXh/, the second sub-pixel PXl is connected to gate lines G
i, its input end is connected to the first data line D
j, its output terminal is connected to the liquid crystal capacitor Clch/Clcl and the first holding capacitor Cstha/Cstla.The control end of second switch element Qb is connected to gate lines G
i, the input end of second switch element Qb is connected to the second data line D
J+1, the output terminal of second switch element Qb is connected to liquid crystal capacitor Clch and the Clcl and the second holding capacitor Cstb.
The control end of the 3rd on-off element Qc is connected to gate lines G
i, the input end of the 3rd on-off element Qc is connected to the public pressure wire (not shown), and the output terminal of the 3rd on-off element Qc is connected to the 4th on-off element Qd and boost capacitor Cb.
The control end of the 4th on-off element Qd is connected to next root gate lines G
I+1, the input end of the 4th on-off element Qd is connected to output terminal, liquid crystal capacitor Clcl and the first holding capacitor Cstla of the first on-off element Ql, and the output terminal of the 4th on-off element Qd is connected to output terminal and the boost capacitor Cb of the 3rd on-off element Qc.
Below, will be described comprising operation according to the LCD of the liquid crystal panel assembly of present embodiment.
At first, will be applied to data line D with respect to the data voltage that common electric voltage Vcom has positive polarity
jBe applied to data line D with the data voltage that has negative polarity with respect to common electric voltage Vcom
J+1Situation as an example.
Von is applied to gate lines G when gate-on voltage
iThe time, be connected to gate lines G
iFirst to the 3rd on-off element Qha, Qla, Qb and Qc conducting.
Therefore, data line D
jFirst on-off element Qha and the Qla of positive data voltage by conducting each the end that is applied to liquid crystal capacitor Clch and Clcl, data line D
J+1Negative data voltage be applied to each the other end of liquid crystal capacitor Clch and Clcl by second switch element Qb.
Simultaneously, common electric voltage Vcom is applied to the end of boost capacitor Cb by the 3rd on-off element Qc, and boost capacitor Cb is by output terminal and the charging of the voltage difference between the common electric voltage Vcom of the first on-off element Qha.
Then, be applied to gate lines G as grid cut-off voltage Voff
iAnd gate-on voltage Von is applied to next root gate lines G
I+1The time, first to the 3rd on-off element Qha, Qla, Qb and Qc turn-off, the 4th on-off element Qd conducting.
Then, accumulate in the positive charge of output terminal of the first on-off element Qla and the negative charge that accumulates in the output terminal of the 3rd on-off element Qc and mix, thereby the voltage of the output terminal of the first on-off element Qla reduces, the voltage of the output terminal of the 3rd on-off element Qc increases.When the voltage as the output terminal of the 3rd on-off element Qc of the end of boost capacitor Cb increased, the voltage of the output terminal of the first on-off element Qha of isolation also increased thereupon, thereby has increased the voltage difference at the two ends of liquid crystal capacitor Clch.On the contrary, the voltage of the output terminal of the first on-off element Qla reduces, thereby has reduced the voltage at the two ends of liquid crystal capacitor Clcl.
Alternatively, will be applied to the first data line D with respect to the data voltage that common electric voltage Vcom has a negative polarity
jThe time, accumulate in capacitor Clch, Clcl, Cstha, Cstla, Cb and Cstb each two ends electric charge can with former description in opposite.
In the present embodiment, always the charging voltage of the liquid crystal capacitor Clch of the first sub-pixel PXh can be higher than the second sub-pixel PXl liquid crystal capacitor Clcl charging voltage and no matter the polarity of the data voltage that applies.Thereby, can change the brightness of two sub-pixel PXh and PXl and not reduce brightness and transmissivity substantially by the charging voltage that changes liquid crystal capacitor Clch and Clcl.
No matter when gate-on voltage is applied to gate lines G
i, the voltage of boost capacitor Cb returns to common electric voltage Vcom by the 3rd on-off element Qc, thereby removes the image retention that is caused by before frame.
Simultaneously, the data voltage with different polarity is applied to the first data line D
jWith the second data line D
J+1Thereby, can improve the transmissivity and the response speed of LCD, and the various effects among the former embodiment can be applied to present embodiment.
In optional embodiment, replace the first holding capacitor Cstha/Cstla and the second holding capacitor Cstb, each of the first sub-pixel PXh/, the second sub-pixel PXl can comprise a holding capacitor (not shown).
Then, with reference to Figure 37, will another example of the liquid crystal panel assembly shown in Fig. 2 be described.
Figure 37 is the equivalent circuit diagram of two pixels of liquid crystal panel assembly according to an embodiment of the invention.
At first, referring to figs. 2 and 37, also comprise top panel 100 respect to one another and lower panel 200 and be plugged in liquid crystal layer 3 between the two according to the liquid crystal panel assembly of present embodiment.
Liquid crystal panel assembly according to present embodiment comprises that (it comprises gate lines G to signal wire
i, the first data line D
j, the second data line D
J+1With the 3rd data line D
J+2) and the first pixel PX
nWith the second pixel PX
N+1
Gate lines G
i, data line D
j, D
J+1And D
J+2And first pixel electrode PEa and the second pixel electrode PEb form by patterned metal layer.
Gate lines G
iWith data line D
j, D
J+1And D
J+2Be formed in the different layers, and insulation course can be plugged between the two.The first pixel electrode PEa and the second pixel electrode PEb can be formed in the different layers or in the identical layer.
First to the 3rd data line D of the liquid crystal panel assembly shown in Figure 37
j, D
J+1And D
J+2Be formed in the identical layer.
Pixel PX
nAnd PX
N+1Each comprise the first on-off element Qa, second switch element Qb, liquid crystal capacitor Clc and the first holding capacitor Csta and the second holding capacitor Cstb.
The first pixel PX
nThe first on-off element Qa be connected to gate lines G
iWith the first data line D
jThe first pixel PX
nSecond switch element Qb be connected to gate lines G
iWith the second data line D
J+1The second pixel PX
N+1The first on-off element Qa be connected to gate lines G
iWith the 3rd data line D
J+2The second pixel PX
N+1Second switch element Qb be connected to gate lines G
iWith the second data line D
J+1Just, the first pixel PX adjacent one another are
nThe second switch element and the second pixel PX
N+1Second switch element Qb be connected to identical data line D
J+1(below, be called as " shared data line ").
Each of the first on-off element Qa and second switch element Qb is that three-terminal element for example is arranged on the thin film transistor (TFT) in the lower panel 100.The control end of the first on-off element Qa and second switch element Qb is connected to gate lines G
i, its input end is connected to data line D
j, D
J+1And D
J+2, its output terminal is connected respectively to liquid crystal capacitor Clc, the first holding capacitor Csta and the second holding capacitor Cstb.
With reference to figure 2, liquid crystal layer 3 has dielectric anisotropy again, is not having under the situation of electric field, and the liquid crystal molecule of liquid crystal layer 3 can have by orientation and is the major axis perpendicular to the horizontal surface of panel 100 and 200.In contrast, do not having under the situation of electric field, it is that level (or parallel) is in the major axis of the horizontal surface of panel 100 and 200 that liquid crystal molecule can have by orientation.
In addition, liquid crystal capacitor Clc and holding capacitor Csta and Cstb have been described, so omitted detailed description among the former embodiment.
Below, with reference to Figure 38 and Figure 39, will be described the operation of LCD according to an embodiment of the invention.
Figure 38 and Figure 39 be illustrate when liquid crystal capacitor adopted according to an embodiment of the invention minimum voltage be 0V, ceiling voltage be 14V, when common electric voltage Vcom is 7V, the charging voltage of the liquid crystal capacitor of four neighbors and be applied to the curve map of the voltage of data line in two successive frames.
With reference to Figure 38 and Figure 39, a data lines is present between two pixel PX, and two pixel PX jointly are connected to shared data line D
J+1And D
J+4For every frame, high driving voltage (for example, 14V) and minimum drive voltage (for example, 0V) alternately be applied to shared data line D
J+1And D
J+4Just, in a frame, be applied to shared data line D as 0V as shown in Figure 38
J+1And D
J+4The time, 14V is applied to shared data line D in next frame as shown in figure 39
J+1And D
J+4
At first, with reference to Figure 38,0V is applied to shared data line D
J+1And D
J+4, the data voltage of 14V is applied to the first data line D
j(target charging voltage) with first pixel of 14V.10V is applied to the second data line D
J+2(target charging voltage) with second pixel of 10V.5V is applied to the 3rd data line D
J+3(target charging voltage) with the 3rd pixel of 5V.1V is applied to the 4th data line D
J+5(target charging voltage) with the 4th pixel of 1V.At this moment, the voltage that has an opposite polarity with respect to the voltage that is applied to left pixel is applied to the adjacent pixels on the right side, causes carrying out the reverse drive operation.In addition, can improve display characteristic.
As shown in figure 39, the high driving voltage of 14V is applied to shared data line D in next frame
J+1And D
J+4Because the target charging voltage of first pixel is 13V, so the data of 1V are applied to the first data line D
jBecause the target charging voltage of second pixel is 8V, so 6V is applied to the second data line D
J+2Because the target charging voltage of the 3rd pixel is 6V, so 8V is applied to the 3rd data line D
J+3Because the target charging voltage of the 4th pixel is 3V, so 11V is applied to the 4th data line D
J+5Thereby the voltage with polarity opposite with polarity of voltage in the former frame is applied to each pixel, and adjacent pixels also can be applied in the voltage of polarity opposite each other.
In the present embodiment, because the shared data line is arranged between the adjacent pixels, so can increase the manufacturing cost that LCD is compared and can reduce by the number that reduces data driver in the aperture of liquid crystal panel assembly by the quantity that reduces data line.
Below, with reference to Figure 40, will liquid crystal panel assembly according to another embodiment of the invention be described in detail.
Figure 40 is the equivalent circuit diagram of two pixels of liquid crystal panel assembly according to another embodiment of the invention.
With reference to Figure 40, comprise also that according to the liquid crystal panel assembly of present embodiment (it comprises gate lines G to signal wire
i, the first data line D adjacent one another are
j, the second data line D
J+1With the 3rd data line D
J+2) and the first pixel PX that is connected to signal wire
nWith the second pixel PX
N+1, pixel PX
nAnd PX
N+1Each comprise the first on-off element Qa and second switch element Qb and liquid crystal capacitor Clc.
Yet, be different from the liquid crystal panel assembly shown in Figure 37, in the liquid crystal panel assembly shown in Figure 40, pixel PX
nAnd PX
N+1Each comprise a holding capacitor Cst, do not need to be formed for the additional independent wiring of common electric voltage Vcom thus, thereby improved the aperture ratio.Holding capacitor Cst can be plugged between the two by the output terminal of the first on-off element Qa and second switch element Qb is stacked on top of each other and insulator and form.
Below, with reference to Figure 41 and Figure 42 and Fig. 1 described above, according to another embodiment of the invention liquid crystal panel assembly is described.
Figure 41 and Figure 42 are according to various other the equivalent circuit diagrams of two pixels of liquid crystal panel assembly of embodiment of the present invention.
With reference to Figure 41 and Figure 42, comprise that according to the liquid crystal panel assembly of present embodiment (it comprises gate lines G to signal wire
i, the first data line D
jWith the second data line D
J+1) and the first pixel PX that is connected to signal wire
nWith the second pixel PX
N+1, pixel PX
nAnd PX
N+1Each comprises the first on-off element Qa and second switch element Qb and liquid crystal capacitor Clc.
In the liquid crystal panel assembly shown in Figure 41 and Figure 42, pixel PX
nAnd PX
N+1Each comprises holding capacitor Cst.Yet, pixel PX
nAnd PX
N+1Can comprise the first on-off element Qa and second switch element Qb and be connected respectively to the first on-off element Qa and the first and second holding capacitor (not shown) of second switch element Qb.
Yet, be different from the liquid crystal panel assembly shown in Figure 37 or Figure 40, in the liquid crystal panel assembly shown in Figure 41 and Figure 42, data line does not form between pixel.The liquid crystal panel assembly comprises and forming and gate lines G
iThe shared data line D of level
kShared data line D
kNot with other data lines D
jAnd D
J+1Be formed in the identical layer, and and gate lines G
iBe formed in the identical layer.Shared data line D
kBe not connected to data driver 500, unlike other data line D
jAnd D
J+1Thereby voltage does not apply from data driver 500, but the ceiling voltage and the minimum voltage that change with every frame unit can apply from the outside separately.
Yet, in the liquid crystal panel assembly shown in Figure 41, with respect to corresponding pixel PX
n, shared data line D
kBe arranged on and gate lines G
iHomonymy, in the liquid crystal panel assembly shown in Figure 42, with respect to corresponding pixel PX
n, shared data line D
kBe arranged on and gate lines G
iOpposite side.
Compare with the liquid crystal panel assembly shown in Figure 37 or Figure 40, the liquid crystal panel assembly shown in Figure 41 and Figure 42 can reduce the quantity of data line and the quantity of data driver 500, thereby improves the aperture ratio of liquid crystal panel assembly and reduce manufacturing cost.
Below, with reference to figure 2 and Figure 42, will liquid crystal panel assembly according to another embodiment of the invention be described in detail.
Figure 43 is the equivalent circuit diagram of two pixels of liquid crystal panel assembly according to an embodiment of the invention.
With reference to figure 2 and Figure 43, basic identical according to the liquid crystal panel assembly and the liquid crystal panel assembly shown in Figure 37 of present embodiment.
Yet, pixel PX
nAnd PX
N+1Each comprises the first liquid crystal capacitor Clch and the second liquid crystal capacitor Clcl with different electric capacity.As shown in figure 43, the distance between the first liquid crystal capacitor Clch two ends is greater than the distance between the second liquid crystal capacitor Clcl two ends.Thereby, even identical voltage is applied to each the two ends of the first liquid crystal capacitor Clch and the second liquid crystal capacitor Clcl, as the electric field intensity that produces in the liquid crystal layer 3 of dielectric substance is different, and the molecule of two liquid crystal capacitor Clch and Clcl has different degree of tilt.Thereby,, can make the image visual of watching from the side of LCD maximum, thereby improve the side visuality so that near image from watching previously by the distance between the end of adjusting liquid crystal capacitor Clch and Clcl.
In addition, to gate lines G
i, data line D
j, D
J+1And D
J+2, the first on-off element Qa, second switch element Qb and holding capacitor Csta and Cstb description and the embodiment shown in Figure 37 in identical, thereby omitted description of them.
Below,, will the example of the liquid crystal panel assembly shown in Figure 43 be described in detail to Figure 47 with reference to Figure 44.
Figure 44 is two the pixel PX and the PX of liquid crystal panel assembly according to an embodiment of the invention to Figure 47
N+1Layout.
With reference to Figure 44, basic identical according to the planar structure and the hierarchy of the planar structure of the liquid crystal panel assembly of present embodiment and the liquid crystal panel assembly shown in hierarchy and Figure 21 and Figure 22.Below, with mainly description and the different place of embodiment shown in Figure 21 and Figure 22.
Be different from the liquid crystal panel assembly shown in Figure 21 and Figure 22, comprise many data lines 171 and be positioned at adjacent pixels PX according to the liquid crystal panel assembly of present embodiment
nAnd PX
N+1Between many shared data lines 172.
Then, will be to being included in pixel PX
nAnd PX
N+1Each in the first pixel electrode 191a and the second pixel electrode 191b be described in detail.
The first pixel electrode 191a is included in left vertical component 192a that vertical direction extends longways, extends to central horizontal part 193a and a plurality of part 194a of top set and the inferior division part 195a on right side from the center of left vertical component 192a.The part 194a of top set is positioned at central horizontal part 193a top, and from left vertical component 192a and central horizontal part 193a obliquely to upper right extension.Inferior division part 195a is positioned at central horizontal part 193a below, and extends down to the right from left vertical component 192a and central horizontal part 193a.At each pixel PX
nPerhaps PX
N+1Core and top and lower part, the gap between gap between the part 194a of top set and the inferior division part 195a is relatively narrow, except each pixel PX
nPerhaps PX
N+1Core and the low gray areas LA outside the zone of top and lower part in these gaps relatively big.
The second pixel electrode 191b is included in right vertical component 192b that vertical direction extends longways, extends to last horizontal component 193b1 and following horizontal component 193b2 and a plurality of part 194b of top set and the inferior division part 195b in left side from the top and bottom of right vertical component 192b.The part 194b of top set is positioned at central horizontal part 193a top, and from right vertical component 192b and last horizontal component 193b1 below extension left obliquely.Inferior division part 195b is positioned at central horizontal part 193a below, and extends to the upper left side obliquely from right vertical component 192b and following horizontal component 193b2.At each pixel PX
nPerhaps PX
N+1Core and top and lower part, the gap between gap between the part 194b of top set and the inferior division part 195b is also relatively narrow, except each pixel PX
nPerhaps PX
N+1Core and the low gray areas LA outside the zone of top and lower part in these gaps relatively big.
Component 194a, 194b, 195a and the 195b of the first pixel electrode 191a and the second pixel electrode 191b are arranged alternately.With in other parts, compare, the gap between component 194a, 194b, 195a and the 195b is bigger in low gray scale.Final effect is identical with effect among other embodiment that comprise the embodiment shown in Figure 21 and Figure 22, thereby will omit description of them.
In addition, at each pixel PX
nOr PX
N+1In, first grid electrode 124a/ second grid electrode 124b, the first source electrode 173a/, the second source electrode 173b and the first drain electrode 175a/, the second drain electrode 175b constitute the first film transistor Qa/ second thin film transistor (TFT) Qb with the first semiconductor 154a/, the second semiconductor 154b.The raceway groove of the first film transistor Qa and the second thin film transistor (TFT) Qb is formed among the first semiconductor 154a and the second semiconductor 154b between the first source electrode 173a and the second source electrode 173b and the first drain electrode 175a and the second drain electrode 175b.
Two adjacent pixel PX
nAnd PX
N+1Be connected to shared data line 172 on right side and left side respectively.Left side pixel PX
nThe first pixel electrode 191a be applied with data voltage by the first film transistor Qa from data line 171, the second pixel electrode 191b is applied with driving voltage or minimum driving voltage from the maximum of shared data line 172 by the second thin film transistor (TFT) Qb.In addition, right pixel PX
N+1The first pixel electrode 191a be applied with driving voltage or minimum driving voltage by the second thin film transistor (TFT) Qb from the maximum of shared data line 172, the second pixel electrode 191b is applied with voltage from data line 171 by the first film transistor Qa.
Then, with reference to Figure 45, liquid crystal panel assembly and the above-mentioned liquid crystal panel assembly shown in Figure 44 according to present embodiment are basic identical, but the gap between the component of the first pixel electrode 191a and the second pixel electrode 191b is bigger, and the gap in low gray areas LA between the component of the first pixel electrode 191a and the second pixel electrode 191b is little.
Then, with reference to Figure 46, also basic identical with the hierarchy of the liquid crystal panel assembly shown in Figure 24 according to the hierarchy of the liquid crystal panel assembly of present embodiment.Below, will the place different with the embodiment shown in Figure 24 be described mainly.
Liquid crystal panel assembly according to present embodiment comprises many data lines 171 and is positioned at adjacent pixels PX
nAnd PX
N+1Between shared data line 172.
Will be to being included in pixel PX
nAnd PX
N+1Each in the first pixel electrode 191a and the second pixel electrode 191b be described in detail.
The first pixel electrode 191a comprises and is positioned at pixel PX
nAnd PX
N+1Each the bottom horizontal component 193a and a plurality ofly tilt to extend upward and divide 196a with the curved branches that forms two ">" number shapes connected vertically crooked three times from horizontal component 193a.The second pixel electrode 191b also comprises and is arranged on pixel PX
nAnd PX
N+1The horizontal component 193b and a plurality of being tilted to down at top from horizontal component 193b extend and divide 196b with the curved branches that forms two ">" number shapes connected vertically crooked three times.The curved branches of the first pixel electrode 191a and the second pixel electrode 191b divides 196a and curved branches to divide 196b to be arranged alternately.At pixel PX
nAnd PX
N+1Each left zone in, it is little that curved branches divides 196a and curved branches to divide the gap between the 196b; In right zone, it is big that curved branches divides 196a and curved branches to divide the gap between the 196b.The description of final effect is identical with effect among other embodiment that comprise the embodiment shown in Figure 21 and Figure 22, thereby will omit the description to it.
In addition, identical to the description of data line 171, shared data line 172, the first pixel electrode 191a, the second pixel electrode 191b with former embodiment, thus will omit description to it.
Then, with reference to Figure 47, also the hierarchy with the liquid crystal panel assembly shown in Figure 25 is identical according to the hierarchy of the liquid crystal panel assembly of present embodiment.Below, will the place different with the embodiment shown in Figure 25 be described mainly.
Liquid crystal panel assembly according to present embodiment also comprises many data lines 171 and is positioned at pixel PX
nAnd PX
N+1Between many shared data lines 172.
Will be to being included in pixel PX
nAnd PX
N+1Each in the first pixel electrode 191a and the second pixel electrode 191b be described in detail.
The first pixel electrode 191a is included in left vertical component 192a that vertical direction extends longways, goes up horizontal component 193a, transverse curvature three times and a pair of vertical curve part 196a, the horizontal component 197a that extends to the right from the center of vertical curve part 196a that extend from last horizontal component 193a downwards, extend downwards from the following bending point of vertical curve part 196a vertical component 198a and a plurality of inclination component.The second pixel electrode 191b comprises right vertical component 192b, down horizontal component 193b, transverse curvature three times and the last horizontal component 197b that extends to the left from the upwardly extending a pair of vertical curve part 196b of lateral part 193b down, from the last bending point of vertical curve part 196b, the following horizontal component 198b and a plurality of inclination component that extend to the left from the following bending point of vertical curve part 196b.The inclination component of the first pixel electrode 191a and the second pixel electrode 191b can be with respect to about 45 degree of gate line 121 inclinations.
The inclination component of the first pixel electrode 191a and the second pixel electrode 191b is arranged alternately, and can have the interval of rule.The vertical curve part 196a of the first pixel electrode 191a and the second pixel electrode 191b and the gap between the 196b are less than the gap between the inclination component of the first adjacent pixel electrode 191a and the second pixel electrode 191b, thereby the pitch angle of the liquid crystal molecule of liquid crystal layer 3 is bigger, so transmissivity is higher.In addition, can use description among other embodiment that comprise the embodiment shown in Figure 21 and Figure 22.
In addition, to identical among the description of data line 171, shared data line 172 and the first pixel electrode 191a and the second pixel electrode 191b and the former embodiment, therefore omitted description of them.
At Figure 44 in the embodiment shown in Figure 47, at a pixel PX
nPerhaps PX
N+1In, the first pixel electrode 191a and the second pixel electrode 191b far away each other the zone and at a pixel PX
nPerhaps PX
N+1In the first pixel electrode 191a and the nearer each other zone of the second pixel electrode 191b be arranged alternately, thereby can change the electric field intensity that in liquid crystal layer 3, produces, and can change the pitch angle of liquid crystal molecule 31, can improve the side visuality and the transmissivity of improving LCD of LCD.
Alternatively, the first pixel electrode 191a and the nearer each other zone of the second pixel electrode 191b can be followed in the first pixel electrode 191a and the second pixel electrode 191b several zones far away each other.In addition, the first pixel electrode 191a and second pixel electrode 191b zone far away each other can be followed in the first pixel electrode 191a and the nearer each other several zones of the second pixel electrode 191b.In addition, by adjusting the distance between the first pixel electrode 191a and the second pixel electrode 191b or adjusting the first pixel electrode 191a and the layout in the zone that zone that the second pixel electrode 191b is far away each other and the first pixel electrode 191a and the second pixel electrode 191b are nearer each other, can make transmissivity maximum and improve the side visuality.
Below, with reference to Figure 48, will the liquid crystal panel assembly of an alternative embodiment of the invention be described in detail.
Figure 48 is the equivalent circuit diagram that the structure and a pixel of liquid crystal panel assembly according to another embodiment of the invention are shown.
With reference to Figure 48, each pixel PX comprises a pair of sub-pixel, and each sub-pixel comprises liquid crystal capacitor Clch and Clcl and holding capacitor Csth and Cstl.At least one of two sub-pixels comprises two on-off element (not shown) that are connected to gate line, data line and liquid crystal capacitor Clch and Clcl.
First pixel electrode PEha of liquid crystal capacitor Clch and Clcl employing lower panel 100 and PEla and the second pixel electrode PEhb and PElb are as two ends.Liquid crystal layer 3 between the first pixel electrode PEha and PEla and the second pixel electrode PEhb and the PElb is as dielectric substance.Each of the second pixel electrode PEhb and PElb can be connected to on-off element (not shown) separately, and at least one of the first pixel electrode PEha and PEla also is connected to on-off element (not shown) separately.Alternatively, the second pixel electrode PEhb can not separate each other with PElb, and can form the electrode that is connected to an on-off element (not shown).Yet in contrast, the second pixel electrode PEhb and PElb can be arranged in the top panel 200.At this moment, the second pixel electrode PEhb and PElb and be free of attachment to this on-off element and can be applied in independently common electric voltage Vcom.Simultaneously, the liquid crystal molecule of liquid crystal layer 3 has dielectric anisotropy and can orientation be perpendicular to panel 100 and panel 200.In contrast, liquid crystal molecule can orientation be and panel 100 and panel 200 levels.
Execution is formed by the first pixel electrode PEha that is inserted with insulator between the lower panel 100 and PEla and the second pixel electrode PEhb and PElb for the holding capacitor Csth of the booster action of liquid crystal capacitor Clch and Clcl and Cstl.
In addition, therefore identical among the description of color filter CF and polarizer (not shown) and the former embodiment omitted description of them.
Below,, will the example of the liquid crystal panel assembly shown in Figure 48 be described in detail to Figure 51 with reference to Figure 49.
Figure 49 is the equivalent circuit diagram that two sub-pixels of liquid crystal panel assembly according to another embodiment of the invention are shown to Figure 51.
At first, with reference to Figure 49, comprise that according to the liquid crystal panel assembly of present embodiment signal wire (comprises gate lines G
i, the first data line D adjacent one another are
jWith the second data line D
J+1And adjacent gate line G
iShared data line D
k) and the pixel PX that is connected to signal wire.
A pair of sub-pixel PXh and PXl that pixel PX comprises.Each sub-pixel PXh/PXl comprises and is connected to corresponding gate lines G
iWith corresponding data line D
j/ D
J+1The first on-off element Qha/Qla and second switch element Qhb/Qlb, the liquid crystal capacitor Clch/Clcl that is connected to on-off element and the first holding capacitor Cstha/Cstla and the second holding capacitor Csthb/Cstlb.
Thereby electrode separately can by the first pixel electrode PEha/PEla and the second pixel electrode PEhb/PElb is stacked and between be inserted with insulator and form the first holding capacitor Cstha/Cstla and the second holding capacitor Csthb/Cstlb.
In contrast, each of sub-pixel PXh and PXl can comprise a holding capacitor Csth or Cstl.
The first on-off element Qha of the first sub-pixel PXh is connected to gate lines G
iWith the first data line D
jThe second switch element Qhb of the first sub-pixel PXh is connected to gate lines G
iWith shared data line D
kThe first on-off element Qla of the second sub-pixel PXl is connected to gate lines G
iWith the second data line D
J+1The second switch element Qlb of the second sub-pixel PXl is connected to gate lines G
iWith shared data line D
kJust, adjacent switch element Qhb is connected to identical data line D with Qlb
kShared data line D
kBe described above, thereby will omit description it.
The first on-off element Qha and second switch element Qlb be also in above description, thereby will omit the description to it.
In the LCD that comprises the liquid crystal panel assembly, signal controller 600 is accepted picture signal R, G and the B that input is used for a pixel PX, and with received image signal R, G and B convert to be used for two sub-pixel PXh and PXl output image signal DAT it is transferred to data driver 500.In contrast, be used for two sub-pixel PXh and PXl grayscale voltage can grayscale voltage generator 800 produce and alternately be provided to data driver 500 independently or in data driver 500 alternate selection, thereby apply different voltage to two sub-pixel PXh with PXl.Yet at this moment, thereby preferably picture signal is corrected or produces the synthetic gamma curve of two sub-pixel PXh of grayscale voltage and PXl near preceding with reference to gamma curve.For example, preceding synthetic gamma curve is only preceding consistent with reference to gamma curve with being confirmed as the liquid crystal panel assembly, and the synthetic gamma curve of side is the most approaching preceding with reference to gamma curve.
Then, with reference to Figure 50, (it comprises and contains first grid polar curve G adjacent one another are according to the liquid crystal panel assembly signal wire of present embodiment
iWith second grid line G
I+1, data line D
j, adjacent gate line G
iShared data line D
k) and the pixel PX that is connected to signal wire.Pixel PX comprises a pair of sub-pixel PXh and PXl.Each of sub-pixel PXh/PXl comprises on-off element Qha and Qhb/Qla and Qlb, liquid crystal capacitor Clch/Clcl and the first holding capacitor Cstha/Cstla and second holding capacitor and Csthb/Cstlb.
Be different from the liquid crystal panel assembly shown in Figure 49, in the liquid crystal panel assembly shown in Figure 50, two sub-pixels are adjacent one another are and be connected to different gate lines G at column direction
iAnd G
I+1
Just, the first on-off element Qha of the first sub-pixel PXh is connected to first grid polar curve G
iWith data line D
jThe second switch element Qhb of the first sub-pixel PXh is connected to first grid polar curve G
iWith shared data line D
kThe first on-off element Qla of the second sub-pixel PXl is connected to second grid line G
I+1With data line D
jThe second switch element Qlb of the second sub-pixel PXl is connected to second grid line G
I+1With shared data line Dk.Just, the first on-off element Qha of each sub-pixel PXh or sub-pixel PXl is connected to identical data line D with Qla/ second switch element Qhb with Qlb
j/ D
k
The operation of LCD (it comprises liquid crystal capacitor Clch and Clcl, the first holding capacitor Cstha and Cstla and the second holding capacitor Csthb and Cstlb and liquid crystal panel assembly) and former embodiment are basic identical, thereby omit detailed description.Yet in the LCD shown in Figure 49, two the sub-pixel PXh and the PXl that constitute a pixel PX are applied simultaneously data voltage, and in the present embodiment, apply data voltage to two sub-pixel PXh and PXl with the mistiming.
Then, with reference to Figure 51, comprise that according to the liquid crystal panel assembly of present embodiment (it comprises gate lines G to signal wire
i, data line D adjacent one another are
j, D
J+1And D
J+2) and the pixel PX that is connected to signal wire.
Pixel PX comprises a pair of sub-pixel PXh and PXl.Each of sub-pixel PXh/PXl comprises and is connected to corresponding gate lines G
iWith corresponding data line D
j/ D
J+2The first on-off element Qha/Qla, be connected to gate lines G
iWith shared data line D
J+1Second switch element Qhb/Qlb, the liquid crystal capacitor Clch/Clcl that is connected to on-off element and the first holding capacitor Cstha/Cstla and second holding capacitor and Csthb/Cstlb.
Liquid crystal panel assembly shown in basic and Figure 49 is basic identical according to the liquid crystal panel assembly of present embodiment, but shared data line D
J+1Out-of-level in gate lines G
iForm, and be formed between sub-pixel PXh and the PXl.Shared data line D
J+1Be formed on data line D with other
jAnd D
J+2In the identical layer, and be connected to data driver 500 to be applied in voltage.
Below,, will another example of the liquid crystal panel assembly shown in Figure 48 be described in detail to Figure 58 with reference to Figure 52.
Figure 52 is the equivalent circuit diagram of two pixels of liquid crystal panel assembly according to another embodiment of the invention to Figure 58.
With reference to Figure 52, comprise that according to the liquid crystal panel assembly of present embodiment (it comprises first grid polar curve G to signal wire
iWith second grid line G
I+1, first to the 3rd data line D
j, D
J+1And D
J+2) and two pixel PX being connected to signal wire
nAnd PX
N+1Pixel PX
nAnd PX
N+1Each comprise a pair of sub-pixel PXh and PXl.Each sub-pixel PXh/PXl comprises on-off element Qha and Qhb/Qla and Qlb, is connected to liquid crystal capacitor Clch/Clcl and the first holding capacitor Cstha/Cstla and second holding capacitor and the Csthb/Cstlb of on-off element.
Be different from the liquid crystal panel assembly shown in Figure 49, in the liquid crystal panel assembly shown in Figure 52, on-off element Qhb and the Qlb adjacent one another are at line direction jointly are connected to the second data line D
J+1, just, shared data line D
J+1Just, the first pixel PX
nSecond switch element Qhb, the second pixel PX of the first sub-pixel PXh
N+1Second switch element Qhb, the first pixel PX of the first sub-pixel PXh
nThe second switch element Qlb and the second pixel PX of the second sub-pixel PXl
N+1The second switch element Qlb of the second sub-pixel PXl be connected to shared data line D
J+1
In addition, be different from the liquid crystal panel assembly shown in Figure 51, in the liquid crystal panel assembly shown in Figure 52, constitute a pixel PX
nPerhaps PX
N+1Two sub-pixel PXh and PXl adjacent one another are and be connected to different gate lines G at column direction
iAnd G
I+1Embodiment shown in detailed description and Figure 50 is basic identical, thereby will omit detailed description.
Then, with reference to Figure 53, comprise that according to the liquid crystal panel assembly of present embodiment signal wire (comprises gate lines G
i, first to the 3rd data line D
j, D
J+1And D
J+2) and two pixel PX being connected to signal wire
nAnd PX
N+1
To each pixel PX
nAnd PX
N+1Description identical with the description of the liquid crystal panel assembly shown in Figure 34, thereby omit description to it.
Yet, in the present embodiment, neighbor PX
nAnd PX
N+1Each second switch element Qb be connected to gate lines G
iWith shared data line D
J+1
In liquid crystal panel assembly according to present embodiment, shared data line D
J+1Out-of-level in gate lines G
iForm, and be formed in two pixel PX
nAnd PX
N+1Between.Shared data line D
J+1In above description, thereby will omit detailed description.
Then, with reference to Figure 54, the liquid crystal panel assembly shown in Figure 54 is identical with the liquid crystal panel assembly shown in Figure 53, but in the present embodiment, shared data line D
kBe not formed on pixel PX
nAnd PX
N+1Between, but the level that forms is in gate lines G
iShared data line D
kNot with other data line D
jAnd D
J+1Be formed in the identical layer, and and gate lines G
iBe formed in the identical layer.Shared data line D
kBe free of attachment to data driver 500, unlike other data line D
jAnd D
J+1Thereby voltage does not apply from data driver 500, but the voltage that changes between the ceiling voltage of every frame and minimum voltage can apply respectively from the outside.
Then, with reference to Figure 55, comprise that according to the liquid crystal panel assembly of present embodiment signal wire (comprises gate lines G
i, first to the 3rd data line D adjacent one another are
j, D
J+1And D
J+2) and two pixel PX being connected to signal wire
nAnd PX
N+1
To each pixel PX
nPerhaps PX
N+1Description identical with the description of the liquid crystal panel assembly shown in Figure 29, thereby will omit description to it.
Yet, in the present embodiment, neighbor PX
nAnd PX
N+1Each second switch element Qhb and Qlb be connected to gate lines G
iWith shared data line D
J+1
Above to being formed on two pixel PX
nAnd PX
N+1Between shared data line D
J+1Be described, thereby will omit detailed description.
Then, basic identical with reference to Figure 56 according to the liquid crystal panel assembly shown in the liquid crystal panel assembly shown in the present embodiment and Figure 55, but shared data line D
kBe not formed on pixel PX
nAnd PX
N+1Between, but the level that forms is in gate lines G
iThen, with reference to Figure 57, comprise that according to the liquid crystal panel assembly shown in the present embodiment signal wire (comprises gate lines G
i, first to the 3rd data line D adjacent one another are
j, D
J+1And D
J+2, the public pressure wire (not shown)) and two pixel PX being connected to signal wire
nAnd PX
N+1
To each pixel PX
nPerhaps PX
N+1Description identical with the description of the liquid crystal panel assembly shown in Figure 36, thereby will omit description to it.
Yet, in the present embodiment, neighbor PX
nAnd PX
N+1Each second switch element Qb be connected to gate lines G
iWith shared data line D
J+1
Then, basic identical with reference to Figure 58 according to the liquid crystal panel assembly shown in the liquid crystal panel assembly shown in the present embodiment and Figure 57, but shared data line D
kBe not formed on pixel PX
nAnd PX
N+1Between, but form and gate lines G
iLevel.
Driving method shown in Figure 38 and Figure 39 also can be applied to and comprise the LCD of Figure 37 to the liquid crystal panel assembly shown in Figure 57.In addition, the liquid crystal molecule of liquid crystal layer has positive dielectric anisotropy, and in that do not have under the situation of electric field can be by orientation for perpendicular to panel 100 and 200.In this case, when electric field produced in liquid crystal layer, liquid crystal molecule was tilted to being parallel to the direction of electric field, thereby has changed polarized state of light.Have in the situation of liquid crystal molecule of positive dielectric anisotropy in utilization, because liquid crystal molecule has the stagnant degree of rotation (rotation viscosity) that is lower than the liquid crystal molecule with negative dielectric anisotropy, so can obtain response speed faster, and because the vergence direction of liquid crystal molecule 31 is restricted to the direction of electric field, so even liquid crystal molecule 31 also can rearrange owing to the dispersed liquid crystal molecule 31 of external action.Therefore, can obtain good display characteristic.
According to the present invention, non-replacement data driver etc. can improve transmissivity by increasing the pixel voltage scope that LCD can use.In addition, can reduce the manufacturing cost of driver and improve the aperture ratio of panel.
According to embodiments of the invention, can guarantee the high contrast of LCD and wide light visual angle, and increase the response speed of liquid crystal molecule.
In addition, can under not such as prerequisite, obtain good display characteristic from the influence of the pressure of the outside of LCD etc.
Though described the preferred embodiments of the present invention in detail, but obviously those skilled in the art can carry out various modifications and change to it under the prerequisite of principle that does not break away from inventive concept of the present invention and spirit, and scope of the present invention limits in appended claims and its equivalent.
Although invention has been described in conjunction with being considered to actual embodiment at present, but it should be understood that and the invention is not restricted to the disclosed embodiments, on the contrary, the present invention is intended to cover various modifications and the equivalent arrangement in the spirit and scope that are included in appended claims.
The application requires on June 17th, 2008 and the korean patent application Nos.10-2008-0057043 of order submission June 16 in 2008 Korea S Department of Intellectual Property and right of priority and the rights and interests of 10-2008-0056321, and the two full content is incorporated in this with way of reference.