CN101599445B - Forming method of welding pad structure - Google Patents

Forming method of welding pad structure Download PDF

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Publication number
CN101599445B
CN101599445B CN2008101143153A CN200810114315A CN101599445B CN 101599445 B CN101599445 B CN 101599445B CN 2008101143153 A CN2008101143153 A CN 2008101143153A CN 200810114315 A CN200810114315 A CN 200810114315A CN 101599445 B CN101599445 B CN 101599445B
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layer
welding pad
etching
metal
etching stop
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CN101599445A (en
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王新鹏
沈满华
孙武
张世谋
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Semiconductor Manufacturing International Beijing Corp
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Semiconductor Manufacturing International Beijing Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

The invention discloses a forming method of a welding pad structure, which comprises the following steps: providing a base with a semiconductor liner, wherein the base at least comprises a metal mutually connecting layer, an etching stopping layer on the metal mutually connecting layer, and a passivating layer on the etching stopping layer; forming a pattern optical resisting layer on the passivating layer, etching an opening in the passivating layer by using the optical resisting layer as a mask, wherein the etching is stopped in the etching stopping layer; dry-removing the optical resisting layer; removing a residue etching stopping layer by adopting oxygen-free fluoropolymer plasma so as to expose the metal mutually connecting layer; reducing the surface of the exposed metal mutually connecting layer; and forming a retaining layer and a welding pad layer on the retaining layer in the opening positioned on the exposed metal mutually connecting layer. The forming method of the welding pad structure can ensure that the retaining layer better covers the metal mutually connecting layer, thereby effectively preventing the dispersion of metal of the metal mutually connecting layer to the welding pad layer and improving the reliability of devices.

Description

The formation method of welding pad structure
Technical field
The present invention relates to technical field of manufacturing semiconductors, particularly a kind of formation method of welding pad structure
Background technology
Along with very lagre scale integrated circuit (VLSIC) high integration and high performance demand are increased gradually; Semiconductor technology is towards 65nm even the more technology node development of small-feature-size; And the resistance capacitance that the arithmetic speed of chip obviously receives plain conductor and caused postpones the influence of (Resistance Capacitance Delay Time, RC DelayTime).Therefore in present semiconductor fabrication, adopt copper metal interconnected with low-resistivity more, replace traditional aluminum metal interconnection, to improve the phenomenon that RC postpones.
Because copper has the characteristic of low-resistivity, is that the device of interconnection line can bear more intensive circuit arrangement with copper, reduces production costs, and more can promote the arithmetic speed of chip.In addition, copper also has good deelectric transferred ability, makes longer and stable advantage such as better of life-span of device.But for the aluminum metal interconnection, copper more more is prone to the problem that diffusion and oxidized characteristics often cause device reliability.
In the technology that forms aluminium welding pad; The copper of last one deck metal interconnecting layer diffuses into the aluminium welding pad layer above it easily, and causes aluminium welding pad to lose efficacy, so usually between copper interconnection layer and aluminium welding pad layer; Must form the barrier that prevents the copper diffusion, for example materials such as TaN, TaSiN, Ta.For example publication number is the manufacturing approach of aluminium welding pad structure that discloses a kind of semiconductor device of copper-connection among the embodiment of CN101136356A patent application document: the Semiconductor substrate that has buffer layer and copper wiring layer is provided, and said copper wiring layer is embedded in the buffer layer; Form the tantalum-nitride diffusion barrier layer at described copper wiring layer and dielectric isolation laminar surface then; Then on diffusion impervious layer, form passivation layer, on described passivation layer, etch opening and fill metallic aluminium, form aluminium welding pad.
The existing copper process technique forms the technology of aluminium welding pad specifically referring to shown in Figure 1A to Fig. 1 C.Semi-conductive substrate 100 at first is provided; Have dielectric layer 110 on the said substrate and be embedded in the last one deck copper interconnection layer 105 in the dielectric layer; On described copper interconnection layer 105, form etching stop layer 120 and passivation layer 130 successively; Shown in Figure 1A, spin coating photoresist 140 on described passivation layer 130, be formed for the filling aluminum weld pad opening 135 pattern and in passivation layer 130, etch opening 135; For preventing the copper interconnection layer 105 of overetch destruction lower floor, etching ends in the etching stop layer 120; Shown in Figure 1B, be not less than under 250 ℃ then, adopt oxygen gas plasma to remove photoresist, then wet chemical cleaning and removing residue at underlayer temperature; Shown in Fig. 1 C, with remaining etching stop layer 120 complete etchings and expose copper interconnection layer 105, wet chemical cleaning and removing residue behind the cvd nitride tantalum barrier layer 140, is filled metallic aluminium in opening 135 once more, forms aluminium welding pad 145.
Yet in actual production process, the barrier layer to metal interconnected laminar surface can not be good covering, cause the metal of metal interconnecting layer to spread to the upper strata; Cause that weld pad lost efficacy; For example, the copper in the copper interconnection layer passes the barrier layer to the diffusion of aluminium welding pad layer, and aluminium welding pad was lost efficacy.
The reason that produces the problems referred to above possibly be: inevitably can residually there be small spine 101 on copper interconnection layer 105 surfaces through cmp; After etching opening 135; These copper spines can not be covered and exposing surface by remaining etching stop layer, and when next adopting dry method to remove photoresist 140, the copper spine 101 that exposes is oxidized to cupric oxide and in copper interconnection layer 105, extends; In the process that wet chemical cleans; Cupric oxide is dissolved in washing lotion, so formed rough surface, makes the barrier layer 150 of subsequent deposition can not be to the good covering in copper interconnection layer 105 surface; Cause the copper of lower floor to pass the aluminium welding pad 145 that barrier layer 150 diffuses into the upper strata, thereby aluminium welding pad was lost efficacy.
Summary of the invention
The problem that the present invention solves provides a kind of formation method of welding pad structure, and it is good to guarantee that the barrier layer covers metal interconnecting layer, thereby effectively prevents the diffusion of the metal of metal interconnecting layer to soldering pad layer, improves the reliability of device.
For addressing the above problem, the invention provides a kind of formation method of welding pad structure, comprising:
Substrate with semiconductor device is provided, and said substrate comprises the etching stop layer on metal interconnecting layer, the said metal interconnecting layer at least, and the passivation layer on the etching stop layer;
On said passivation layer, forming the photoresist layer of patterning, is mask etching opening in said passivation layer with said photoresist layer, and said etching ends in the etching stop layer;
Dry method is removed said photoresist layer;
Adopt fluorine-containing oxygen-free plasmas to remove remaining etching stop layer, to expose described metal interconnecting layer;
The metal interconnected laminar surface that exposes is reduced processing;
Said opening being arranged on the metal interconnecting layer that exposes forms the soldering pad layer on barrier layer and the said barrier layer.
Optional, said etching opening and said removal photoresist layer original position in same chamber are carried out.
Optional, said removal photoresist layer and the remaining etching stop layer of said removal original position in same chamber are carried out.
Optional, remaining etching stop layer of said removal and the said metal interconnected laminar surface that exposes is reduced are handled in same chamber original position and are carried out.
Preferably, said etching opening, said removal photoresist layer, the remaining etching stop layer of said removal and the said metal interconnected laminar surface that exposes is reduced are handled all in same chamber original position and are carried out.
Preferably, said removal photoresist layer using plasma ashing method, the temperature of controlling said substrate is lower than 50 ℃.
Optional, said fluorine-containing oxygen-free plasmas comprises CF 4, C 4F 8, CHF 3In a kind of or plasmas that at least two kinds of combination of gases produce.
Preferably, the method that adopts the metal interconnected laminar surface of hydrogen plasma bombardment is handled in said reduction.
Preferably, the gas that produces said hydrogen plasma comprises a kind of in hydrogen, the ammonia.
The method that adopts reducibility gas that metal interconnected laminar surface is reduced is handled in said reduction.
Optional, also comprise removing before the remaining etching stop layer said remaining etching stopping laminar surface is reduced processing.
Compared with prior art, the present invention has the following advantages:
At first; Do not carry out wet-cleaned after removing photoresist layer; And directly remove remaining etching stop layer; The metal oxide that produces in the time of can preventing to remove photoresist is dissolved among the cleaning fluid, and adopts the remaining etching stop layer of fluorine-containing oxygen-free plasmas etching, can remove the metal oxide of the generation of removing photoresist and preventing that metal interconnecting layer is by further oxidation; Secondly, remove remaining etching stop layer after, the metal interconnecting layer that exposes reduced to handle the natural oxide on surface is reduced.The resultant effect of above-mentioned technology makes the barrier layer of subsequent technique deposition form good covering and contact with metal interconnecting layer, thereby can effectively avoid the diffusion of the metal of metal interconnecting layer to soldering pad layer, improves the reliability of device.
In addition; In the formation method of welding pad structure of the present invention; Etching opening, removal photoresist layer, removal remain etching stop layer, can in a chamber, original position carry out these four processing steps of metal interconnecting layer surface reduction processing that expose; The oxidation that causes in the time of not only can avoiding wafer between distinct device, to change is stain, and helps enhancing productivity.
Description of drawings
Through the more specifically explanation of the preferred embodiments of the present invention shown in the accompanying drawing, above-mentioned and other purpose, characteristic and advantage of the present invention will be more clear.Reference numeral identical in whole accompanying drawings is indicated identical part.Painstakingly do not draw accompanying drawing, focus on illustrating purport of the present invention by actual size equal proportion convergent-divergent.
Figure 1A to Fig. 1 C is a kind of process schematic representation that forms aluminium welding pad in the existing copper process technique;
Fig. 2 is the flow chart of the formation method of welding pad structure described in the embodiment of the invention;
Fig. 3 A to Fig. 3 F is the sketch map of the formation method of welding pad structure in the embodiment of the invention one;
Fig. 4 A to Fig. 4 C is the sketch map of the formation method of welding pad structure in the embodiment of the invention two.
Embodiment
For make above-mentioned purpose of the present invention, feature and advantage can be more obviously understandable, does detailed explanation below in conjunction with the accompanying drawing specific embodiments of the invention.
A lot of details have been set forth in the following description so that make much of the present invention.But the present invention can implement much to be different from alternate manner described here, and those skilled in the art can do similar popularization under the situation of intension of the present invention, so the present invention does not receive the restriction of following disclosed practical implementation.
Secondly, the present invention utilizes sketch map to be described in detail, when the embodiment of the invention is detailed; For ease of explanation; The profile of expression device architecture can be disobeyed general ratio and done local the amplification, and said sketch map is instance, and it should not limit the scope of the present invention's protection at this.The three dimensions size that in actual fabrication, should comprise in addition, length, width and the degree of depth.
Fig. 2 is the flow chart of the formation method of welding pad structure of the present invention, may further comprise the steps:
Step 11; Substrate with semiconductor device is provided; Said substrate includes multiple layer metal interconnection layer and the passivation layer on last one deck metal interconnecting layer on source region, the active area; Also have etching stop layer between said passivation layer and the last one deck metal interconnecting layer, be used for confirming etching terminal, prevent the damage of overetch simultaneously lower metal; In copper wiring, the material of said metal level is a copper.
Step 12; Spin coating photoresist layer on said passivation layer; Exposure, the back of developing form etching pattern, adopt dry plasma etch etching opening in said passivation layer, and said etching ends in the etching stop layer; Be just to stop after etching is removed a part of etching stop layer, remaining etching stop layer is protected the metal of lower floor; Said opening is positioned at corresponding position, metal interconnecting layer top, in opening, fills metal to form soldering pad layer after waiting to remove remaining etching stop layer.
Step 13; The using plasma dry method is removed photoresist and is removed said photoresist layer, does not carry out wet-cleaned then and directly gets into next step and remove etching stop layer, prevents that the oxide that forms in the process of removing photoresist is cleaned the liquid dissolving; In copper wiring, said oxide is a cupric oxide.
Step 14 adopts fluorine-containing oxygen-free plasmas to remove remaining etching stop layer, to expose metal interconnecting layer, does not have oxygen in the gas of generation plasma, to prevent that metal interconnecting layer is oxidized in the etching process.
Step 15 is reduced processing to the metal interconnected laminar surface that exposes, and removes natural oxide, to form surface of good, it can well be covered by the barrier layer that forms later on.
Step 16 is carried out wet-cleaned to the wafer after the reduction processing, on said metal interconnecting layer, forms the barrier layer then, then in being coated with the opening on barrier layer, fills metal, forms soldering pad layer behind the patterning; The material of said soldering pad layer is aluminium, aluminium copper or alusil alloy.
The formation method of welding pad structure according to the invention is detailed below in conjunction with concrete embodiment.
Embodiment one
Fig. 3 A to Fig. 3 F is the sketch map of the formation method of welding pad structure among the embodiment one.In the present embodiment, the material of metal interconnecting layer is a copper, and the material of soldering pad layer is an aluminium.
Shown in Fig. 3 A, provide one have a semiconductor device substrate 200, said substrate 200 includes the multiple layer metal interconnection layer on source region, the active area; In said substrate 200, form last one deck metal interconnecting layer 205 and buffer layer 210, said metal interconnecting layer 205 is embedded among the buffer layer 210; The material of metal interconnecting layer 205 is a copper, and its formation method includes but not limited to physical vaporous deposition and chemical vapour deposition technique; The material of buffer layer 210 includes but not limited to unadulterated silicon dioxide (USG), phosphorosilicate glass (PSG), Pyrex (BSG), boron-phosphorosilicate glass (BPSG), fluorine silex glass (FSG) or has a kind of or its combination in the advanced low-k materials; Said have advanced low-k materials include but not limited to black diamond (Black Diamond, BD) or coral TM, (U.S. Novellus Company products), its formation method includes but not limited to HDPCVD, PECVD or SACVD.
On said metal interconnecting layer 205 and buffer layer 210, form etching stop layer 220, be used for confirming etching terminal, prevent the damage of overetch simultaneously lower metal; Said etching stop layer 220 includes but not limited to a kind of in silicon nitride, silicon oxynitride, carborundum, the nitrogen-doped silicon carbide, and its formation method is a chemical vapour deposition technique, is 100 dust to 500 dusts according to device property and size design deposit thickness.
On said etching stop layer 220, form passivation layer 230, be used to protect the semiconductor device of lower floor to avoid the pollution of moisture and impurity, also be used for the isolated insulation weld pad, to prevent the metal connecting line short circuit; Passivation layer can be individual layer or two-layer at least, and its material includes but not limited to silica, silicon oxynitride, silicon nitride, adopts chemical vapour deposition technique to form;
Passivation layer 230 in the present embodiment is made up of two-layer; Comprise the silicon oxide layer that is positioned on the etching stop layer 220 and be positioned at the silicon nitride layer on the silicon oxide layer; Reach the effect that discharges stress through adjusting two-layer thickness and technology; Wherein, the thickness of silicon oxide layer is about 4000 dusts, and the thickness of silicon nitride layer is about 6000 dusts.
Shown in Fig. 3 B, spin coating photoresist layer 240 on said passivation layer 230 forms pattern through exposure imaging, and the photoresist layer 240 with patterning is that mask using plasma method in passivation layer 230 etches opening 235 then; Said opening 235 ends in the etching stop layer 220, that is to say, promptly stops etching after removing a part of etching stop layer, and the metal of remaining etching stop layer protection lower floor is not by plasma damage; Opening 235 is positioned at corresponding position, metal interconnecting layer 205 tops, opening 235 in, fills metal with the formation soldering pad layer after waiting to remove remaining etching stop layer.
In plasma etching equipment, carry out etching technics in the present embodiment.The plasma of the fluoro-gas that the silicon nitride layer in the etching passivation layer 230 adopts, said fluoro-gas includes but not limited to CF 4, CHF 3, also be mixed with oxygen and argon gas in the etching gas simultaneously, be used to dilute the concentration of fluoro-gas and improve selection ratio to lower floor's silica, as an example, gas flow is respectively, CF 4: 120sccm, CHF 3: 15sccm, oxygen: 30sccm, argon gas: 600sccm, etch period 65s; Silicon oxide layer in the etching passivation layer 230 also adopts the plasma of fluoro-gas, and said fluoro-gas includes but not limited to C 4F 8, also be mixed with oxygen and argon gas simultaneously, as an example, gas flow is respectively, C 4F 8: 10sccm, oxygen: 10sccm, argon gas: 600sccm, etch period 90s.
Shown in Fig. 3 C, adopt plasma to remove photoresist layer 240 after the etching opening 235, produce isoionic gas and include but not limited to oxygen, NO, N 2A kind of among the O; The temperature at the semiconductor-based end is controlled in below 50 ℃; Usually above 250 ℃, the low temperature method of removing photoresist described in the present embodiment can be avoided the oxidation to the copper spine that exposes the etching stopping laminar surface to a certain extent with respect to the base reservoir temperature of prior art when removing photoresist; As an example, the flow of oxygen is: 800sccm, the driving source power of plasma is 800w.
Preferably, etching opening 235 backs original position in same chamber is removed photoresist layer 240, reduces oxidation and contaminating impurity in the wafer transfer process.
Shown in Fig. 3 D, adopt the plasma etching of fluorine-containing anaerobic to remove remaining etching stop layer, to expose the surface of metal interconnecting layer 205, said fluorine-containing oxygen-free plasmas comprises CF 4, C 4F 8, CHF 3In a kind of or plasmas that at least two kinds of combination of gases produce; Also be mixed with argon gas simultaneously as diluent gas; Do not comprise oxygen and other oxygen-containing gas in the etching gas, for example ozone, carbon monoxide, carbon dioxide can prevent that the copper spine of metal surface of lower floor is oxidized; As an example, the flow of gas is CF 4: 100sccm, argon gas: 200sccm, etch period 60s.
After removing photoresist layer 240, do not carry out wet-cleaned in the said process; But the direct remaining etching stop layer of etching; The cupric oxide of avoiding generating in the process of removing photoresist is dissolved in cleaning fluid; Make the layer on surface of metal out-of-flatness, and cause the barrier layer of subsequent deposition relatively poor the spreadability of metal interconnected laminar surface; Preferably, behind the removal photoresist layer 240, the remaining etching stop layer of original position etching in same chamber.
Then, adopt hydrogen plasma to bombard to metal interconnecting layer 205 surfaces of exposing, the cupric oxide on copper interconnection layer surface and hydrogen plasma reaction, and be reduced to copper.The gas that produces hydrogen plasma includes but not limited to hydrogen, ammonia, and preferred gas is the higher hydrogen of ionization level, and as an example, the exciting power in plasma excitation source is 500w, and the flow of hydrogen is 1000sccm, and the time of Cement Composite Treated by Plasma is 60s.In addition, plasma bombards and also plays the effect of removing the residual polyalcohol on metal interconnecting layer 205 surfaces and opening 235 sidewalls.
Preferably, removing behind the remaining etching stop layer in same chamber original position carries out plasma deoxidization and handles.
Preferred; Above-mentioned etching opening 235, remove photoresist layer 240, remove residue etching stop layer 220, copper interconnection layer 205 surface reductions that expose are handled these four processing steps can in a chamber, original position carry out; The oxidation that causes in the time of not only can avoiding wafer between distinct device, to change is stain, and helps enhancing productivity.
Shown in Fig. 3 E; Wet-cleaned is removed after the residue; On metal interconnecting layer 205, form barrier layer 250, the metal interconnecting layer 205 that expose to the major general on described barrier layer 250 and the sidewall of opening 235 cover, and the copper that is used for the barrier metal interconnection layer spreads to the upper strata.This barrier layer 250 can be individual layer or two-layer at least; Its material includes but not limited to the combination of a kind of among Ta, TaN, TaSiN, the WN or at least two kinds; Adopting physical vaporous deposition, chemical vapour deposition technique, pulsed laser deposition or known other film deposition techniques, is about 100 dusts according to device property and size design deposit thickness.
Shown in Fig. 3 F, in the opening that is coated with barrier layer 250 235, fill metallic aluminium, patterning forms aluminium welding pad layer 245, adopts physical vaporous deposition deposition of aluminum soldering pad layer, and thickness is 9000 dust to 10000 dusts.
The method that adopts the hydrogen plasma bombardment among the above embodiment is reduced processings to the metal interconnecting layer that exposes, and in fact, the method that the employing reducibility gas reduces to metal interconnected laminar surface is handled in said reduction, specifically details like following examples.
Embodiment two
Fig. 4 A to Fig. 4 C is the sketch map of the formation method of welding pad structure among the embodiment two.In the present embodiment, the material of metal interconnecting layer is a copper, and the material of soldering pad layer is an aluminium.
Shown in Fig. 4 A, provide one have a semiconductor device substrate 300, said substrate 300 includes the multiple layer metal interconnection layer on source region, the active area; In said substrate 300, form last one deck metal interconnecting layer 305 and buffer layer 310, said metal interconnecting layer 305 is embedded among the buffer layer 310; On said metal interconnecting layer 305 and buffer layer 310, form etching stop layer 320, be used for confirming etching terminal, prevent the damage of overetch simultaneously lower metal; On said etching stop layer 320, form passivation layer 330, be used to protect the semiconductor device of lower floor to avoid the pollution of moisture and impurity, also be used for the isolated insulation weld pad, to prevent the metal connecting line short circuit; The material of above-mentioned metal interconnecting layer 305, buffer layer 310, etching stop layer 320, passivation layer 330, formation method, thickness etc. are similar with embodiment one, repeat no more at this.
Spin coating photoresist layer 340 on said passivation layer 330 forms pattern through exposure imaging, and using plasma etches opening 335 in passivation layer 330 then; Said opening 335 ends in the etching stop layer 320.
Shown in Fig. 4 B, adopt plasma to remove photoresist layer 340 after the etching opening 335, produce isoionic gas and include but not limited to oxygen, NO, N 2O, the temperature at the semiconductor-based end is controlled in below 50 ℃; Adopt fluorine-containing oxygen-free plasmas etching to remove remaining etching stop layer then, expose the metal interconnecting layer 305 of lower floor.
Then directly processing is reduced on metal interconnecting layer 305 surfaces of exposing; The method that adopts reducibility gas that metal interconnected laminar surface is reduced in the present embodiment; Said reducibility gas includes but not limited to hydrogen, carbon monoxide; At a certain temperature, reducibility gas can be a copper with the copper oxide reduction on metal interconnecting layer 305 surfaces, makes metal interconnecting layer 305 by the good covering in the barrier layer of subsequent deposition.As an example, reducibility gas is a carbon monoxide, flow 800sccm, and base reservoir temperature is 300 ℃, recovery time 90s.
Shown in Fig. 4 C; Wet-cleaned is removed after the residue; On metal interconnecting layer 305, form barrier layer 350, the metal interconnecting layer 305 that expose to the major general on described barrier layer 350 and the sidewall of opening 335 cover, and the copper that is used for the barrier metal interconnection layer spreads to the upper strata.Then in the opening that is coated with barrier layer 350 335, fill metallic aluminium, patterning forms aluminium welding pad layer 345.The material of above-mentioned barrier layer 350, aluminium welding pad layer 345, formation method, thickness etc. are similar with embodiment one, repeat no more at this.
Similar with embodiment one, etching opening 335, removal photoresist layer 340, removal remain etching stop layer 320, also can in a chamber, original position carry out these four processing steps of copper interconnection layer 305 surface reductions processing that expose in this instance.
In another embodiment of the present invention; The formation method of said welding pad structure also comprises to be removed before the remaining etching stop layer reducing processing in its surface; Be used for removing of photoresist by plasma process; The copper spine that exposes the etching stopping laminar surface maybe be oxidized, and described reduction is handled and can the oxide of copper spine be reduced; The method that reduction is handled and embodiment one, embodiment two are identical, and promptly hydrogen plasma bombards under metal interconnected laminar surface or the reducing atmosphere metal interconnected laminar surface is reduced.
The above only is preferred embodiment of the present invention, is not the present invention is done any pro forma restriction.Method that reduction described in the embodiment is handled has only provided hydrogen plasma and has bombarded and under metal interconnected laminar surface or the reducing atmosphere metal interconnected laminar surface is reduced two kinds; Other can make the cupric oxide of metal interconnected laminar surface be reduced, and improve the barrier layer to the method for reduction treatment of metal interconnecting layer covering power also within the scope of the present invention's protection.
Though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention.Any those of ordinary skill in the art; Do not breaking away under the technical scheme scope situation of the present invention; All the method for above-mentioned announcement capable of using and technology contents are made many possible changes and modification to technical scheme of the present invention, or are revised as the equivalent embodiment of equivalent variations.Therefore, every content that does not break away from technical scheme of the present invention, all still belongs in the scope of technical scheme protection of the present invention any simple modification, equivalent variations and modification that above embodiment did according to technical spirit of the present invention.

Claims (7)

1. the formation method of a welding pad structure is characterized in that, comprising:
Substrate with semiconductor device is provided, and said substrate comprises the etching stop layer on metal interconnecting layer, the said metal interconnecting layer at least, and the passivation layer on the etching stop layer;
On said passivation layer, forming the photoresist layer of patterning, is mask etching opening in said passivation layer with said photoresist layer, and said etching ends in the etching stop layer;
Dry method is removed said photoresist layer;
Dry method is not carried out wet-cleaned after removing said photoresist layer, and directly adopts fluorine-containing oxygen-free plasmas to remove remaining etching stop layer, to expose described metal interconnecting layer;
The metal interconnected laminar surface that exposes is reduced processing;
Said opening being arranged on the metal interconnecting layer that exposes forms the soldering pad layer on barrier layer and the said barrier layer.
2. the formation method of welding pad structure according to claim 1 is characterized in that, said etching opening and said removal photoresist layer original position in same chamber are carried out.
3. the formation method of welding pad structure according to claim 1 is characterized in that, said removal photoresist layer and the remaining etching stop layer of said removal original position in same chamber are carried out.
4. the formation method of welding pad structure according to claim 1 is characterized in that, remaining etching stop layer of said removal and the said metal interconnected laminar surface that exposes is reduced are handled in same chamber original position and carried out.
5. the formation method of welding pad structure according to claim 1; It is characterized in that said etching opening, said removal photoresist layer, the remaining etching stop layer of said removal and the said metal interconnected laminar surface that exposes is reduced are handled all in same chamber original position and carried out.
6. according to the formation method of each described welding pad structure of claim 1 to 5, it is characterized in that, said removal photoresist layer using plasma ashing method, the temperature of controlling said substrate is lower than 50 ℃.
7. according to the formation method of each described welding pad structure of claim 1 to 5, it is characterized in that said fluorine-containing oxygen-free plasmas comprises CF 4, C 4F 8, CHF 3In a kind of or plasmas that at least two kinds of combination of gases produce.
CN2008101143153A 2008-06-03 2008-06-03 Forming method of welding pad structure Expired - Fee Related CN101599445B (en)

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CN110767556A (en) * 2019-10-30 2020-02-07 华虹半导体(无锡)有限公司 Smart card chip processing method and smart card chip
CN113097075B (en) * 2020-01-08 2024-03-22 华邦电子股份有限公司 Semiconductor device and method of forming the same
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