CN101598858B - Liquid crystal display high-voltage test circuit and liquid crystal display high-voltage test method - Google Patents
Liquid crystal display high-voltage test circuit and liquid crystal display high-voltage test method Download PDFInfo
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- CN101598858B CN101598858B CN2008100676697A CN200810067669A CN101598858B CN 101598858 B CN101598858 B CN 101598858B CN 2008100676697 A CN2008100676697 A CN 2008100676697A CN 200810067669 A CN200810067669 A CN 200810067669A CN 101598858 B CN101598858 B CN 101598858B
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Abstract
The invention provides a liquid crystal display high-voltage test circuit and a liquid crystal display high-voltage test method. The liquid crystal display high-voltage test circuit comprises a power supply and a plurality of liquid crystal displays, wherein the liquid crystal displays are electrically connected with the power supply, and each liquid crystal display comprises a time schedule controller, a pulse-width modulator, a plurality of output circuits and a display panel; the power supply outputs capacitate voltage to each time schedule controller which is used for receiving the capacitate voltage and correspondingly outputting control voltage to reduce the resistance of the output circuits, and each pulse-width modulator outputs test voltage which is higher than the working voltage of the display panel and is output to the display panel through the output circuits to test at high voltage. The liquid crystal display high-voltage test circuit has simple structure and lower cost,and the high-voltage test method is simpler.
Description
Technical field
Invention relates to a kind of LCD Hi-pot test circuit and LCD Hi-pot test method.
Background technology
Therefore advantages such as LCD has gently, approaches, power consumption is little are widely used in modernized information equipments such as notebook computer, mobile phone, personal digital assistant.For guaranteeing the quality of LCD, before coming into the market, all need it is carried out Hi-pot test, to eliminate the LCD of premature aging.
Seeing also Fig. 1, is a kind of structural representation of prior art LCD Hi-pot test circuit.This LCD Hi-pot test circuit 10 comprises a general supply 110 and a plurality of test cell 100.100 one-tenth matrix forms of these a plurality of test cells are arranged, and the test cell 100 of same row is one another in series, and this multiple row test cell 100 is connected in parallel to this general supply 110.
Please consulting Fig. 2 again, is the electrical block diagram of test cell 100 shown in Figure 1.This each test cell 100 comprises a test voltage generator 120 and a LCD 130 of connecting with this test voltage generator 120.This test voltage generator 120 comprises a plurality of voltage output pins 121.This LCD 130 comprises that a display panel 131 and drives the circuit board 132 that this display panel 131 shows.This circuit board 132 comprises a linkage unit 133, and this linkage unit 133 comprises that a plurality of voltages receive pins 134, these a plurality of voltages receive pins 134 respectively with the voltage output pin 121 corresponding electrical connections of this test voltage generator 120.
When these a plurality of LCD 130 shown in Figure 1 are carried out Hi-pot test, these general supply 110 output services voltages are to these a plurality of test voltage generators 120, the test voltage that this test voltage generator 120 produces is transferred to the linkage unit 133 of its corresponding circuit board 132 respectively, after this linkage unit 133 receives this test voltage, with the circuit that with this display panel 131 be connected (figure do not show) of this test voltage by designing separately on this circuit board 132, export this display panel 131 to, to carry out Hi-pot test.
This LCD Hi-pot test circuit 10 is when testing, the test voltage of this LCD 130 is poured into by these LCD 130 plug-in test voltage generators 120, therefore need to produce the plug-in test voltage generator 120 of test voltage, cost is higher, and need additional designs to receive the circuit of the test voltage of these plug-in test voltage generator 120 outputs, cause the structure of this LCD Hi-pot test circuit 10 complicated to display panel.
Summary of the invention
In order to solve prior art LCD Hi-pot test circuit structure complexity and the high problem of cost, be necessary to provide a kind of simple in structure and lower-cost LCD Hi-pot test circuit.
In order to solve prior art LCD Hi-pot test method testing complex and the high problem of cost, be necessary to provide a kind of test simple and lower-cost LCD Hi-pot test method.
A kind of LCD Hi-pot test circuit, a plurality of LCD that it comprises a power supply and is electrically connected with it, each LCD comprises time schedule controller, one pulse-width regulating device, a plurality of output circuits and a display panel, this power supply is exported an enable voltage to this each time schedule controller, this each time schedule controller receives this enable voltage and corresponding output one control voltage reduces the resistance of this output circuit, this each pulse-width regulating device feeds back the reduction information of the resistance of this output circuit, corresponding output is higher than the test voltage of display panel operating voltage and gives this output circuit, and this test voltage is output to this display panel by this output circuit carries out Hi-pot test.
A kind of LCD Hi-pot test method, one LCD Hi-pot test circuit is tested LCD, a plurality of LCD that this LCD Hi-pot test circuit comprises a power supply and is electrically connected with it, each LCD comprises time schedule controller, a pulse-width regulating device, a plurality of output circuit and a display panel, LCD Hi-pot test method comprises the steps: this power supply output enable voltage of a. to this each time schedule controller, and this each pulse-width regulating device output slab operating voltage is to this output circuit; B. this each time schedule controller receives the also corresponding output control voltage of this enable voltage so that output circuit resistance reduces; C. this each pulse-width regulating device feeds back the reduction information of the resistance of this output circuit, and the test voltage that corresponding output is higher than operating voltage is carried out Hi-pot test to this each display panel.
Compared to prior art, the test voltage of LCD Hi-pot test circuit of the present invention and LCD Hi-pot test method self is produced by each LCD to be tested, and this power supply only need provide the operating voltage of this time schedule controller and pulse-width regulating device to get final product, this test voltage is directly produced by this pulse-width regulating device, need not plug-in generation test voltage equipment, therefore, reduced the cost of this LCD Hi-pot test circuit and simplified this LCD Hi-pot test circuit.
Description of drawings
Fig. 1 is a kind of structural representation of prior art LCD Hi-pot test circuit.
Fig. 2 is the electrical block diagram of test cell shown in Figure 1.
Fig. 3 is the structural representation of LCD Hi-pot test circuit first embodiment of the present invention.
Fig. 4 is the particular circuit configurations synoptic diagram of LCD Hi-pot test circuit shown in Figure 3.
Fig. 5 is the electrical block diagram of the test cell of LCD Hi-pot test circuit second embodiment of the present invention.
Embodiment
Seeing also Fig. 3, is the structural representation of LCD Hi-pot test circuit first embodiment of the present invention.This LCD Hi-pot test circuit 20 comprises a power supply 200 and a plurality of LCD 230.230 one-tenth matrix forms of these a plurality of LCD are arranged, and a plurality of LCD 230 of same row are one another in series, and parallel with one another to this power supply 200 with a plurality of LCD 230 of other row.This power supply 200 produces two voltages and exports this a plurality of LCD 230 to.
Please consulting Fig. 4 again, is the particular circuit configurations synoptic diagram of LCD Hi-pot test circuit 20 shown in Figure 3.This LCD 230 comprises that a display panel 231 and drives the circuit board 232 that this display panel 231 shows.This circuit board 232 comprises a connector 233, an electric pressure converter 234, a pulse-width regulating device 235, time schedule controller 236 and a plurality of output circuit 237.The voltage of these power supply 200 outputs exports this pulse-width regulating device 235 and this time schedule controller 236 respectively to by this connector 233.After this time schedule controller 236 received this voltage, output control voltage was to these a plurality of output circuits 237.235 corresponding output test voltages of this pulse-width regulating device are to these a plurality of output circuits 237, to export this display panel 231 respectively to by these a plurality of output circuits 237.
This connector 233 comprises that one first voltage receives pin 301 and one second voltage receives pin 302.This time schedule controller 236 comprises an operating voltage receiving end 401, a Built-In Self Test end 402, a reset terminal 403 and a control voltage output end 407.This reset terminal 403 is electrically connected with a reset circuit 404.This reset circuit 404 comprises a reset resistor 405 and an electric capacity 406, and this reset terminal 403 is successively by these resistance 405 and these electric capacity 406 ground connection.The reset resistor 405 of this reset circuit 404 and the size of electric capacity 406 are to determine the length of test duration.This pulse-width regulating device 235 comprises one first voltage output end 502, one second voltage output end 503 and a tertiary voltage output terminal 504.This output circuit 237 comprises a switching transistor 601, one first resistance 602, one second resistance 603 and one the 3rd resistance 604.One end of this first resistance 602 is by these second resistance, 603 ground connection, and the other end is as the output terminal (not indicating) of this output circuit 237, with the output test voltage.These transistor 601 grids are electrically connected with the control voltage output end 407 of this time schedule controller 236, and its source electrode is by the 3rd resistance 604 ground connection, and its drain electrode is electrically connected between this first resistance 602 and this second resistance 603.The resistance difference of the 3rd resistance 604 of different output circuit 237, and the magnitude of voltage of these a plurality of output circuit 237 outputs is also inequality, is used to provide this display panel 231 to show each required voltage.
When 20 pairs of these LCD 230 of this LCD Hi-pot test circuit were carried out Hi-pot test: at first, this power supply 200 was exported first voltage reception pin 301 and this second voltage reception pin 302 of the voltage of 5V to the connector 233 of these a plurality of LCD 230 respectively.Then, the voltage of the 5V of these these connector 233 transmission of pulse-width regulating device 23 receptions is to start working, and this this display panel 231 of pulse-width regulating device 235 outputs shows that required operating voltage is to these a plurality of output circuits 237.The voltage of this connector 233 these 5V of transmission also is converted to the operating voltage receiving end 401 of the voltage of 3.3V to this time schedule controller 236 by this electric pressure converter 234, so that these time schedule controller 236 work.Simultaneously, this connector 233 also transmits the Built-In Self Test end 402 of the voltage of this 5V to this time schedule controller 236.Next, this time schedule controller 236 senses the voltage that its Built-In Self Test end 402 receives 5V, its control voltage output end 407 output controlling signal are opened the transistor 601 of these a plurality of output circuits 237, then the 3rd resistance 604 is in parallel with this second resistance 603, thereby the resistance decreasing of this output circuit 237, the information that diminishes of the resistance of these pulse-width regulating device 235 these output circuits 237 of feedback, operating voltage with the output of correspondence rising script, thereby 237 outputs of this output circuit to this display panel 231, are carried out Hi-pot test to this display panel 231 than the high test voltage of these display panel 231 operating voltage.Simultaneously, the reset terminal 403 of this time schedule controller 236 begins connected reset circuit 404 is charged.When charging a period of time, the voltage of this reset terminal 403 reaches certain value, this time schedule controller 236 stops to export the switching transistor 601 that controlling signal is closed this output circuit 237, the resistance value of this output circuit 237 is recovered the operate as normal size, the normal operating voltage of these pulse-width regulating device 235 outputs finishes the Hi-pot test to this LCD 230.
After finishing this Hi-pot test, this LCD 230 is when carrying out operate as normal, the Built-In Self Test end 402 of this time schedule controller 236 no longer receives the voltage of this 5V, the switching transistor 601 of this output circuit 237 is in closed condition, and the normal operating voltage of these pulse-width regulating device 235 outputs drives this display panel 231 and shows.
Compared with prior art, the test voltage of LCD Hi-pot test circuit 20 of the present invention self is produced by the circuit board 232 of each LCD 230 to be tested, and 200 need of this power supply provide the operating voltage of this circuit board 232 to get final product, therefore these power supply 200 too high test voltages of output can not occur and the problem of the circuit board 232 of this LCD 230 of loss, thereby this LCD Hi-pot test circuit 20 has good reliability.And this time schedule controller 236 can be controlled the time of this Hi-pot test voluntarily, does not need external control, and is simpler when making this LCD Hi-pot test circuit 20 carry out Hi-pot test.
Please consulting 5 again, is the electrical block diagram of the test cell of LCD Hi-pot test circuit second embodiment of the present invention.The circuit structure of the circuit structure of this LCD Hi-pot test circuit 30 and this LCD Hi-pot test circuit 20 is basic identical, they are different be in: this LCD Hi-pot test circuit 30 is connected directly to this pulse-width regulating device 335 with the operating voltage of a 5V of these power supply 300 outputs, with be converted to the operating voltage receiving end 701 that 3.3V exports this time schedule controller 336 to by an electric pressure converter 334, simultaneously, the voltage of another 5V exports the Built-In Self Test end 702 of this time schedule controller 336 to.
Compare with this LCD Hi-pot test circuit 20, this LCD Hi-pot test circuit 30 has omitted connector, has further saved cost and has simplified circuit structure.
But, the invention is not restricted to above-mentioned embodiment, this LCD Hi-pot test circuit can further omit reset circuit, and utilizes the outer register value that can remove in the programmable read-only memory that powers up of modification set the time of carrying out Hi-pot test.
Claims (10)
1. LCD Hi-pot test circuit, a plurality of LCD that it comprises a power supply and is electrically connected with it, each LCD comprises time schedule controller, one pulse-width regulating device, a plurality of output circuits and a display panel, it is characterized in that: this power supply is exported an enable voltage to this each time schedule controller, this each time schedule controller receives this enable voltage and corresponding output one control voltage reduces the resistance of this output circuit, this each pulse-width regulating device feeds back the reduction information of the resistance of this output circuit, corresponding output is higher than the test voltage of display panel operating voltage and gives this output circuit, and this test voltage is output to this display panel by this output circuit carries out Hi-pot test.
2. LCD Hi-pot test circuit as claimed in claim 1, it is characterized in that: this output circuit includes a switching transistor, one first resistance, one second resistance, one the 3rd resistance, this switching transistor comprises a grid, an one source pole and a drain electrode, one end of this first resistance is by this second resistance eutral grounding, the other end is as the output terminal of this output circuit, this transistor gate is electrically connected with this time schedule controller, its source electrode is by the 3rd resistance eutral grounding, its drain electrode is electrically connected between this first resistance and this second resistance, and this pulse-width regulating device output slab operating voltage is between first resistance and this second resistance of these a plurality of output circuits.
3. LCD Hi-pot test circuit as claimed in claim 2 is characterized in that: the resistance of the 3rd resistance of different output circuit is different.
4. LCD Hi-pot test circuit as claimed in claim 1, it is characterized in that: this time schedule controller comprises an operating voltage receiving end, a Built-In Self Test end, a reset terminal and a control voltage output end, this Built-In Self Test termination is received the enable voltage of this power supply output, and this control voltage output end output control voltage is to these a plurality of output circuits.
5. LCD Hi-pot test circuit as claimed in claim 4 is characterized in that: further be connected an electric pressure converter between the operating voltage receiving end of this time schedule controller and this power supply.
6. LCD Hi-pot test circuit as claimed in claim 4, it is characterized in that: the reset terminal of this time schedule controller connects a reset circuit, this reset circuit comprises a reset resistor and an electric capacity, and this reset terminal is successively by this reset resistor and this capacity earth.
7. LCD Hi-pot test circuit as claimed in claim 1, it is characterized in that: this pulse-width regulating device comprises a plurality of voltage output ends, these a plurality of voltage output ends are connected to this a plurality of output circuits respectively.
8. LCD Hi-pot test circuit as claimed in claim 1, it is characterized in that: between this power supply and this each pulse-width regulating device and this each time schedule controller a connector is set further, this connector comprises that one first voltage receives pin and one second voltage receives pin, and this first voltage receives pin and is 5 volts with the voltage that this second voltage reception pin receives.
9. LCD Hi-pot test method, utilize a LCD Hi-pot test circuit that LCD is tested, a plurality of LCD that this LCD Hi-pot test circuit comprises a power supply and is electrically connected with it, each LCD comprises time schedule controller, a pulse-width regulating device, a plurality of output circuit and a display panel, and this LCD Hi-pot test method comprises the steps:
A. this power supply output enable voltage is to this each time schedule controller, and this each pulse-width regulating device output slab operating voltage is to this output circuit;
B. this each time schedule controller receives the also corresponding output control voltage of this enable voltage so that this output circuit resistance reduces;
C. this each pulse-width regulating device feeds back the reduction information of the resistance of this output circuit, and the test voltage that corresponding output is higher than operating voltage is carried out Hi-pot test to this display panel.
10. LCD Hi-pot test method as claimed in claim 9, it is characterized in that: this time schedule controller comprises an operating voltage receiving end, a Built-In Self Test end, a reset terminal and a control voltage output end, this Built-In Self Test termination is received the enable voltage of this power supply output, and this control voltage output end output control voltage is to these a plurality of output circuits.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2008100676697A CN101598858B (en) | 2008-06-06 | 2008-06-06 | Liquid crystal display high-voltage test circuit and liquid crystal display high-voltage test method |
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| CN2008100676697A CN101598858B (en) | 2008-06-06 | 2008-06-06 | Liquid crystal display high-voltage test circuit and liquid crystal display high-voltage test method |
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| CN101598858A CN101598858A (en) | 2009-12-09 |
| CN101598858B true CN101598858B (en) | 2010-12-22 |
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Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108172180B (en) * | 2017-12-18 | 2020-06-05 | 深圳市华星光电技术有限公司 | Driving device of liquid crystal display and resetting method thereof |
| CN108024149B (en) * | 2017-12-18 | 2020-09-04 | 海信视像科技股份有限公司 | Method for transmitting signal to SoC chip by TCON board through single connecting line, TCON board and television |
| CN109473053B (en) | 2018-11-08 | 2020-09-04 | 惠科股份有限公司 | Circuit for aging display panel and display panel |
| CN109345990B (en) * | 2018-12-14 | 2020-10-13 | 武汉华星光电半导体显示技术有限公司 | Display panel test circuit and display panel |
| CN109345991A (en) * | 2018-12-14 | 2019-02-15 | 惠科股份有限公司 | Display driving method, display drive apparatus and display device |
| CN110910848A (en) * | 2019-11-28 | 2020-03-24 | Tcl华星光电技术有限公司 | Driving circuit and driving method of liquid crystal display |
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Address after: 518109 Longhua, Shenzhen, town, Foxconn science and Technology Industrial Park E District, building 1, floor 4, Co-patentee after: Chimei Optoelectronics Co., Ltd. Patentee after: Qunkang Technology (Shenzhen) Co., Ltd. Address before: 518109 Longhua, Shenzhen, town, Foxconn science and Technology Industrial Park E District, building 1, floor 4, Co-patentee before: Innolux Display Group Patentee before: Qunkang Technology (Shenzhen) Co., Ltd. |