CN101552195A - Method for manufacturing ohmic electrode on light-doped SiC matrix used for Hall effect measurement - Google Patents
Method for manufacturing ohmic electrode on light-doped SiC matrix used for Hall effect measurement Download PDFInfo
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- CN101552195A CN101552195A CN 200910074306 CN200910074306A CN101552195A CN 101552195 A CN101552195 A CN 101552195A CN 200910074306 CN200910074306 CN 200910074306 CN 200910074306 A CN200910074306 A CN 200910074306A CN 101552195 A CN101552195 A CN 101552195A
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- 239000011159 matrix material Substances 0.000 title claims abstract description 36
- 238000000034 method Methods 0.000 title claims abstract description 29
- 230000005355 Hall effect Effects 0.000 title claims abstract description 22
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 4
- 238000005259 measurement Methods 0.000 title abstract description 5
- 238000000137 annealing Methods 0.000 claims abstract description 11
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 20
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 9
- 230000007797 corrosion Effects 0.000 claims description 9
- 238000005260 corrosion Methods 0.000 claims description 9
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 claims description 8
- 230000003647 oxidation Effects 0.000 claims description 8
- 238000007254 oxidation reaction Methods 0.000 claims description 8
- 239000007788 liquid Substances 0.000 claims description 5
- 229910000147 aluminium phosphate Inorganic materials 0.000 claims description 4
- 230000001681 protective effect Effects 0.000 claims description 3
- 238000001312 dry etching Methods 0.000 claims description 2
- 229910052751 metal Inorganic materials 0.000 abstract description 8
- 239000002184 metal Substances 0.000 abstract description 7
- 239000013078 crystal Substances 0.000 abstract description 6
- 238000000151 deposition Methods 0.000 abstract description 4
- 239000011248 coating agent Substances 0.000 abstract 2
- 238000000576 coating method Methods 0.000 abstract 2
- 239000010410 layer Substances 0.000 description 68
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 64
- 229910010271 silicon carbide Inorganic materials 0.000 description 63
- 239000004065 semiconductor Substances 0.000 description 13
- 238000012360 testing method Methods 0.000 description 11
- 239000000463 material Substances 0.000 description 7
- 238000002360 preparation method Methods 0.000 description 7
- 230000008569 process Effects 0.000 description 6
- 239000012535 impurity Substances 0.000 description 4
- 238000011160 research Methods 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 239000002800 charge carrier Substances 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 229910001020 Au alloy Inorganic materials 0.000 description 1
- NPYPAHLBTDXSSS-UHFFFAOYSA-N Potassium ion Chemical compound [K+] NPYPAHLBTDXSSS-UHFFFAOYSA-N 0.000 description 1
- FKNQFGJONOIPTF-UHFFFAOYSA-N Sodium cation Chemical compound [Na+] FKNQFGJONOIPTF-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000002050 diffraction method Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 229910001092 metal group alloy Inorganic materials 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 229910001414 potassium ion Inorganic materials 0.000 description 1
- 238000004321 preservation Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910001415 sodium ion Inorganic materials 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
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- 239000000126 substance Substances 0.000 description 1
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Abstract
The present invention discloses a method for manufacturing ohmic electrode on light-doped SiC matrix measured by Hall effect, wherein the method comprises the following steps: delimiting the area of ohmic electrode on the light-doped SiC matrix, depositing or coating metal on the area, high-temperature annealing and forming the ohmic electrode. A step of forming a heavy-doped SiC layer with a same conductive style in the area of ohmic electrode is added before depositing or coating metal. According to the invention, the area of ohmic electrode on the light-doped SiC matrix is formed with a heavy-doped SiC epitaxial layer with a same conductive style in the area of ohmic electrode on light-doped SiC matrix. The preparing of ohmic electrode is facilitated, and the resistance of ohmic electrode is lower than contact resistance. The light-doped SiC matrix and epitaxial heavy-doped SiC layer have a homogeneous structure. The problem of crystal structure variation does not exist. Therefore the electrode is stable and the obtained data of Hall effect measurement is stable and reliable.
Description
Technical field
The invention belongs to and on semi-conducting material, make electrode, particularly be used for the method for making electrode on the light dope SiC matrix of Hall effect measurement.
Background technology
The SiC semi-conducting material is because it can work, help simultaneously the preparation of high power device, big charge carrier saturation drift velocity and mobility under higher temperature, have broad prospects aspect preparing at semiconductor device, be called " third generation semiconductor " after silicon and GaAs by people.The development of SiC material and SiC components and parts has become the research focus of semiconductor applications.
The exploitation of various different performance SiC components and parts has benefited from the research of SiC material behavior, and in the research of SiC semiconductor material performance, the measurement of Hall effect is the important means that characterizes its semiconductor property.Utilize Hall effect to measure, can determine conduction type, the carrier concentration of SiC material; Utilize the combined measurement of Hall coefficient and conductivity, can study semi-conductive conductive mechanism, i.e. basic parameters such as semi-conductive mobility, energy gap, impurity ionization energy are further determined in intrinsic conduction or impurity conduction, and scattering mechanism; Measure Hall coefficient with variation of temperature, can determine the temperature characterisitic of semi-conductive energy gap, impurity ionization energy and mobility.Traditional method that is used for prepare on the semiconductor substrate that Hall effect measures Ohmic electrode is: in the zone of the material delimitation Ohmic electrode of single doping content, anneal under above-mentioned zone deposition or metallizing, high temperature, metal and semi-conducting material react, form alloy-layer at metal and semiconductor material interface place, and then not contained rectification characteristic or the negligible Ohmic electrode of rectification characteristic, technological process is as shown in Figure 1.But because SiC materials chemistry character is stable, the forbidden band is wide, and the impurity ionization energy height causes the formation of its alloy-layer a lot of with respect to difficulties such as Si, GaAs, light dope SiC matrix especially, and promptly doping content is lower than 1E17cm
-3And the good sample that is used for the Hall effect test need have lower specific contact resistivity and advantages of higher stability, to guarantee the transmission of electric current, reduces the influence of electrode resistance to the sample mobility.
In order to obtain the lower specific contact resistivity and the Ohmic electrode of advantages of higher stability, done a lot of researchs from the selection of metals deposited, the aspects such as condition of high annealing both at home and abroad, obtained certain progress; Also have application number that a kind of manufacture method of Ohm contact electrode of SiC semiconductor device is provided for 200810018341.6 Chinese patent: increase one deck SiC:Ge transition zone or heavy doping GaN layer play cushioning effect between SiC semiconductor and metal, are convenient to the making of Ohm contact electrode.But the preparation of the inapplicable Hall sample electrode of the method for this patent disclosure, main cause: the heavy doping GaN epitaxial loayer of this patent and light dope SiC form heterojunction, and crystal mass is poor, and in the temperature cycles process, data stability is relatively poor; This patent adopts molten state KOH, increases potassium ion and sodium ion and stains, and influences the follow-up test result.And the KOH of employing molten state, its corrosivity is strong, has greater environmental impacts.
Summary of the invention
The technical issues that need to address of the present invention are to seek a kind of method that is more suitable for prepare on the high light dope SiC matrix that is used for the Hall effect test of Hall effect test, stability Ohmic electrode, and this method is replenishing and transformation traditional handicraft.
For addressing the above problem, be included on the light dope SiC matrix zone of delimiting Ohmic electrode in the technical solution used in the present invention, at above-mentioned zone deposit or metallizing, high annealing, form Ohmic electrode, step front at deposit or metallizing increases following operation: form the identical heavy doping SiC layer of a conduction type in the zone of Ohmic electrode.
The technology that forms the identical heavy doping SiC layer of a conduction type is:
1. at the identical heavy doping SiC layer of whole surperficial epitaxial growth one conduction type of light dope SiC matrix,
2. deposit protective medium layer on above-mentioned heavy doping SiC layer,
3. remove the extra-regional dielectric layer and the heavy doping SiC layer of Ohmic electrode respectively,
4. to light dope SiC matrix, comprise the zone of Ohmic electrode, the sacrificial oxidation of reparation property,
5. remove the oxide layer and the dielectric layer that form because of sacrificial oxidation on the zone of Ohmic electrode respectively.
Described heavy doping SiC layer is meant that doping content is greater than 1E19cm
-3
Described dielectric layer is SiO
2Perhaps Si
xN
y, 0＜x≤3,0＜y≤4 wherein.
Remove the method for dielectric layer: with hydrofluoric acid or hydrofluoric acid cushioning liquid corrosion SiO
2, perhaps use 70 ℃～80 ℃ phosphoric acid corrosion Si
xN
y
The method of removing heavy doping SiC layer is: the plasma dry etching.
Described oxide layer is SiO
2
The condition of high annealing is: 800～1100 ℃ of annealing temperatures, annealing time 30～180 seconds.
Adopt the beneficial effect that technique scheme produced to be: the zone of the Ohmic electrode of the present invention on light dope SiC matrix forms the identical heavy doping SiC epitaxial loayer of a conduction type, be easy to the preparation of Ohmic electrode, and specific contact resistivity is lower; The heavy doping SiC layer of light dope SiC matrix and extension is a homojunction, does not have the problem of changes in crystal structure, and therefore in the temperature cycles process, electrode is stable, the data stabilization of acquisition Hall effect test, reliable; After Ohmic electrode completes, on light dope SiC matrix, formed a SiO outside the zone of Ohmic electrode
2Oxide layer has played protective effect to light dope SiC matrix, but therefore is used for the sample long period preservation that Hall effect is measured.
Description of drawings
Fig. 1 is traditional flow chart that is used for preparation Ohmic electrode on the semiconductor substrate that Hall effect measures;
Fig. 2 is a process chart of the present invention;
Fig. 3～Fig. 8 is a structural representation of the present invention;
Wherein, 1, light dope SiC layer; 2, heavy doping SiC layer; 3, dielectric layer; 5, oxide layer; 6, alloy-layer; 7, metal level.
Embodiment
Method of the present invention is applicable to that doping content is less than 1E17cm
-3The SiC matrix on prepare electrode.Below in conjunction with accompanying drawing the present invention is done and to describe in further detail:
Embodiment one
Technological process of the present invention as shown in Figure 2, structural representation such as Fig. 3～shown in Figure 8.
1) on light dope SiC matrix, delimit the zone of Ohmic electrode in advance.
2) the heavy doping SiC layer 2 that epitaxial growth one conduction type is identical on light dope SiC matrix 1 is at above-mentioned heavy doping SiC layer 2 surface deposition one dielectric layer 3, as shown in Figure 3.
Wherein the doping content of light dope SiC matrix is 5E16cm
-3The doping content of heavy doping SiC layer 2 is 1.6E19cm
-3
The condition of epitaxial growth heavy doping SiC layer 2: adopt elevated temperature heat wall type CVD silicon carbide epitaxy stove, the isoepitaxial growth heavy doping SiC epitaxial loayer identical under 1500～1600 ℃ high temperature with light dope SiC layer 1 conduction type.Growth heavy doping SiC layer crystal body is followed light dope SiC layer atomic steps and is extended mode.Be characterized under the high temperature that growth guarantees that the interlayer of heavy doping SiC layer 2 polytype kind and light dope SiC layer 1 has only the electricity interface, crystal mass is complete, does not have the crystallography interface, does not exist and needs the interface capacitance avoided and the problem of electric current gathering in the test process.Simultaneously heavy doping SiC layer 2 keeps the high chemical inertnesses of SiC crystal and physics, electrical advantages, can not appear at high temperature, test and place back ohmic contact variation for a long time repeatedly, even influence the problem of test result.
Heavy doping SiC layer 2 compares greater than 3: 1 with the thickness of dielectric layer 3.Above-mentioned dielectric layer is SiO
2Or Si
xN
y, 0＜x≤3,0＜y≤4 wherein.
3) remove the extra-regional dielectric layer 3 and the heavy doping SiC layer 2 of Ohmic electrode respectively, as shown in Figure 4.
On the zone of the Ohmic electrode of delimiting, apply photoresist, remove the outer dielectric layer 3 of electrode zone then, expose heavy doping SiC layer 2.When dielectric layer is SiO
2The time, with hydrofluoric acid or the corrosion of hydrofluoric acid cushioning liquid; When dielectric layer is Si
xN
yThe time, with 70 ℃～80 ℃ phosphoric acid corrosion.
Remove the photoresist layer of electrode zone, the heavy doping SiC layer 2 that using plasma etching apparatus etching electrode zone is outer exposes light dope SiC layer 1.
4), comprise the sacrificial oxidation of the zone reparation property of the Ohmic electrode on the light dope SiC matrix to light dope SiC matrix; On light dope SiC matrix, comprise that above-mentioned zone forms oxide layer 5, as shown in Figure 5 after the sacrificial oxidation.
Carry out the reason of sacrificial oxidation: because when etching heavy doping SiC layer 2, the exposed surface that plasma is known from experience at light dope SiC layer 1 produces affected layer, these defectives are except making charge carrier surface scattering aggravation, damage room and free dangling bonds in the light dope SiC layer 1 simultaneously, form extra conductive layer, have a strong impact on test result.
The composition of above-mentioned oxide layer 5 is SiO
2
5) oxide layer 5 and the dielectric layer 3 on the zone of removal Ohmic electrode, as shown in Figure 6.
Apply photoresist on the oxide layer 5 outside above-mentioned zone, when dielectric layer 3 is SiO
2The time, with oxide layer 5 and the dielectric layer 3 on the zone of hydrofluoric acid or hydrofluoric acid cushioning liquid corrosion Ohmic electrode; When dielectric layer 3 is Si
xN
yThe time, with the cushioning liquid corrosion oxidation layer 5 of hydrofluoric acid or hydrofluoric acid, use 70 ℃～80 ℃ phosphoric acid corrosion dielectric layer 3 then earlier.
Can keep above extra-regional oxide layer 5 like this, oxide layer 5 plays the effect of protection light dope SiC layer 1.
6) evaporated metal alloy Ni-Pt on the zone of Ohmic electrode, and in 800～1100 ℃ of scopes high annealing 30～180 seconds, form alloy-layer 6, be Ohmic electrode, as shown in Figure 7.
Continue deposit Ti-Au alloy on alloy-layer 6, the thickening Ohmic electrode forms metal level 7, as shown in Figure 8.
After Ohmic electrode preparation on the light dope SiC matrix is finished, at room temperature carry out the Hall test, record carrier mobility up to 1040cm
2/ vs is a rectifying junction and adopt the Ohmic electrode of conventional method preparation, can not satisfy test request.Present embodiment has proved absolutely preparation method's of the present invention superiority.
Claims (8)
1, a kind of method of making Ohmic electrode on the light dope SiC matrix that Hall effect measures of being used for, be included on the light dope SiC matrix zone of delimiting Ohmic electrode, at above-mentioned zone deposit or metallizing, high annealing, form Ohmic electrode, it is characterized in that, in deposit or metallizing step front, increase following operation: form the identical heavy doping SiC layer of a conduction type in the zone of Ohmic electrode.
2, the method for making Ohmic electrode on the light dope SiC matrix that Hall effect measures of being used for according to claim 1 is characterized in that the technology that forms the identical heavy doping SiC layer of a conduction type is:
1. at the identical heavy doping SiC layer of whole surperficial epitaxial growth one conduction type of light dope SiC matrix,
2. deposit protective medium layer on above-mentioned heavy doping SiC layer,
3. remove the extra-regional dielectric layer and the heavy doping SiC layer of Ohmic electrode respectively,
4. to light dope SiC matrix, comprise the zone of Ohmic electrode, the sacrificial oxidation of reparation property,
5. remove the oxide layer and the dielectric layer that form because of sacrificial oxidation on the zone of Ohmic electrode respectively.
3, the method for making Ohmic electrode on the light dope SiC matrix that Hall effect measures of being used for according to claim 1 and 2 is characterized in that described heavy doping SiC layer is meant that doping content is greater than 1E19cm
-3
4, the method for making Ohmic electrode on the light dope SiC matrix that Hall effect measures of being used for according to claim 2 is characterized in that described dielectric layer is SiO
2Perhaps Si
xN
y, 0＜x≤3,0＜y≤4 wherein.
5,, it is characterized in that the method for described removal dielectric layer: with hydrofluoric acid or hydrofluoric acid cushioning liquid corrosion SiO according to claim 2 or the 4 described methods of making Ohmic electrode on the light dope SiC matrix that Hall effect measures of being used for
2, perhaps use 70 ℃～80 ℃ phosphoric acid corrosion Si
xN
y
6, the method for making Ohmic electrode on the light dope SiC matrix that Hall effect measures of being used for according to claim 2 is characterized in that the method for described removal heavy doping SiC layer is: the plasma dry etching.
7, the method for making Ohmic electrode on the light dope SiC matrix that Hall effect measures of being used for according to claim 2 is characterized in that described oxide layer is SiO
2
8, the method for making Ohmic electrode on the light dope SiC matrix that Hall effect measures of being used for according to claim 1 is characterized in that the condition of described high annealing is:
Annealing temperature: 800～1100 ℃,
Annealing time: 30～180 seconds.
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103187249A (en) * | 2011-12-30 | 2013-07-03 | 中国科学院物理研究所 | Semiconductor nanomaterial device and manufacturing method thereof |
| CN103760484A (en) * | 2014-01-23 | 2014-04-30 | 新磊半导体科技（苏州）有限公司 | Novel method for testing back gate effect |
| CN103794526A (en) * | 2014-01-23 | 2014-05-14 | 新磊半导体科技（苏州）有限公司 | Novel Hall test method |
| CN109103120A (en) * | 2018-08-08 | 2018-12-28 | 南通大学 | A kind of p-type SiC substrate determination method |
| CN113555497A (en) * | 2021-06-09 | 2021-10-26 | 浙江芯国半导体有限公司 | High-mobility SiC-based graphene device and preparation method thereof |
| CN113866613A (en) * | 2021-12-01 | 2021-12-31 | 苏州长光华芯光电技术股份有限公司 | Test structure for Hall effect test and preparation method thereof |
| CN114280374A (en) * | 2021-12-20 | 2022-04-05 | 浙江大学杭州国际科创中心 | Method for testing sheet resistance of doped silicon carbide film |
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| CN100585811C (en) * | 2008-05-30 | 2010-01-27 | 西安电子科技大学 | The Ohm contact production method of semi-insulation SiC semiconductor device |
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2009
- 2009-05-08 CN CN 200910074306 patent/CN101552195B/en not_active Expired - Fee Related
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| CN103187249A (en) * | 2011-12-30 | 2013-07-03 | 中国科学院物理研究所 | Semiconductor nanomaterial device and manufacturing method thereof |
| CN103187249B (en) * | 2011-12-30 | 2016-05-25 | 中国科学院物理研究所 | A kind of preparation method of semiconductor nano material device |
| CN103760484A (en) * | 2014-01-23 | 2014-04-30 | 新磊半导体科技（苏州）有限公司 | Novel method for testing back gate effect |
| CN103794526A (en) * | 2014-01-23 | 2014-05-14 | 新磊半导体科技（苏州）有限公司 | Novel Hall test method |
| CN103760484B (en) * | 2014-01-23 | 2015-04-22 | 新磊半导体科技（苏州）有限公司 | Novel method for testing back gate effect |
| CN109103120A (en) * | 2018-08-08 | 2018-12-28 | 南通大学 | A kind of p-type SiC substrate determination method |
| CN113555497A (en) * | 2021-06-09 | 2021-10-26 | 浙江芯国半导体有限公司 | High-mobility SiC-based graphene device and preparation method thereof |
| CN113555497B (en) * | 2021-06-09 | 2023-12-29 | 浙江芯科半导体有限公司 | SiC-based graphene device with high mobility and preparation method thereof |
| CN113866613A (en) * | 2021-12-01 | 2021-12-31 | 苏州长光华芯光电技术股份有限公司 | Test structure for Hall effect test and preparation method thereof |
| CN113866613B (en) * | 2021-12-01 | 2022-02-22 | 苏州长光华芯光电技术股份有限公司 | Test structure for Hall effect test and preparation method thereof |
| CN114280374A (en) * | 2021-12-20 | 2022-04-05 | 浙江大学杭州国际科创中心 | Method for testing sheet resistance of doped silicon carbide film |
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