CN101546301A - Method of synergetic computer comprising heterogeneous processors - Google Patents
Method of synergetic computer comprising heterogeneous processors Download PDFInfo
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- CN101546301A CN101546301A CN200910020787A CN200910020787A CN101546301A CN 101546301 A CN101546301 A CN 101546301A CN 200910020787 A CN200910020787 A CN 200910020787A CN 200910020787 A CN200910020787 A CN 200910020787A CN 101546301 A CN101546301 A CN 101546301A
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Abstract
The invention provides a method of synergetic computer comprising heterogeneous processors, which comprises a general-purpose processor and a synergetic processor. The general-purpose processor and the synergetic processor respectively implement respective instruction set; and through compiling an application programme comprising two kinds of codes which respectively correspond to the general-purpose processor and the synergetic processor is compiled, users can transfer the general-purpose processor and the synergetic processor to together complete the application. The application programme running in the framework comprises code parts running on the general-purpose processor, and also comprises the code parts running on the synergetic processor. The general-purpose processor is in charge of processing the initialization of an operating system and the application programme and codes of a control and task allocation part, and the heterogeneous processor is in charge of processing the codes of a calculation part. After the programme part running on the synergetic processor is initialized, the general-purpose processor is communicated with the synergetic processor to send an order for implementing the programme. The programme part running on the synergetic processor implements a self-instruction set of the synergetic processor, and completes the computing task of the part on a hardware system of the synergetic processor.
Description
Technical field
The present invention relates to a kind of computer realm, the heterogeneous processor of the different instruction collection that provides support in a computer system is exactly specifically finished calculation task jointly.
It is designed that present general processor mostly is general-purpose computations, performance deficiency on application-specific: for example science calculating etc., adopt some application specific processor can well handle these application-specific, but because both isomeries, the instruction set difference, application-specific on the application specific processor generally can't be managed by general processor, makes application specific processor work in coordination with to be calculated to be as the coprocessor of general processor and is difficult point.
The application-specific that order at present operates on the application specific processor is software emulation and Binary Conversion by two kinds of methods of general processor identification, management and operation.Software emulation is to provide instruction set sequence of equal value mutually for general processor when application program is carried out the instruction set of application specific processor.Binary Conversion is to carry out instruction transformation before executive routine, carries out program converted afterwards.
Because in the software emulation process, application need is checked each isomery instruction constantly, and the application performance that causes operating on the heterogeneous processor greatly reduces.And need more internal memories to come storage emulation program and support data structure.Further theory, software simulator can't accurately modeling complicated hardware feature.Scale-of-two transforms same defectiveness.It is opaque to the user.The combination of these two kinds of methods also often is employed, though satisfied functionally, can't satisfy usually using performance demands.
Owing to carry out the method inefficiency of instruction set conversion, need the coexistence and collaborative calculating of under same computer system, realizing heterogeneous processor.
Summary of the invention
The objective of the invention is to propose in same computer system, to realize supporting the general processor of different instruction collection and the heterogeneous processor that coprocessor is formed, heterogeneous processor comprises: general processor and coprocessor are carried out instruction set separately respectively, and by writing the application program of two kinds of codes that contain corresponding general processor of difference and coprocessor, the user can call both and finish this application jointly.General processor is responsible for handling the main frame sign indicating number part (initialization, control and Task Distribution part) of operating system and application program.Coprocessor is responsible for handling the foreign key part (code of calculating section) of application program.Coprocessor is by special-purpose control protocol and general processor communication, and main being responsible for handled the specific calculation task, can make application specific processor work in coordination with calculating as the coprocessor of general processor like this.
General processor is connected by bus bridge with coprocessor, general processor is connected by system bus with bus bridge, coprocessor is connected with bus bridge by high-speed serial bus, general processor and coprocessor use special-purpose control protocol to carry out communication, control protocol has defined the information of transmitting between general processor and coprocessor, memory management unit and independently communication channel transmission that this information is shared by both, general processor and coprocessor are coupled on one or more buffer memory or the memory management unit, and shared this buffer memory or memory management unit, wherein, general processor is responsible for the operation system, carry out the main frame sign indicating number part of the first cover instruction set and application program, with the coprocessor of the collaborative execution of the calculating second cover instruction set of general processor, the foreign key part of being responsible for running application.
Friendship effect of the present invention is that general processor and coprocessor are carried out instruction set separately respectively, and by writing the application program of two kinds of codes that contain corresponding general processor of difference and coprocessor, the user can call both and finish this application jointly.
Description of drawings
Accompanying drawing 1 is the general processor of isomery and the configuration diagram of the collaborative computing that association handles.
Accompanying drawing 2 is process flow diagrams of general processor and the common executive utility of associated treatment communication among unit.
Embodiment
With reference to accompanying drawing method of the present invention is done following detailed explanation:
General processor is responsible for handling the main frame sign indicating number part of operating system and application program, and coprocessor mainly is responsible for handling the foreign key part in the application program by special-purpose control protocol and general processor communication.
As shown in Figure 1, general processor and coprocessor are coupled on one or more buffer memory and the memory management unit, and share this buffer memory or memory management unit.They can have internal memory separately, also can share one or more internal memory.Central authorities handle and coprocessor is integrated on the same block semiconductor substrate (mainboard).
General processor and coprocessor are connected to same bus bridge by Bus Interface Unit, and wherein general processor is connected by system bus with bus bridge, and coprocessor can link to each other with bus bridge by buses such as high-speed serial bus.General processor and coprocessor all have hardware decoder to come the instruction set of oneself is decoded
The collaborative computing architecture of heterogeneous processor comprises: carry out the general processor of the first cover instruction set, it is responsible for moving the operating system of carrying out this instruction set; And with the coprocessor of general processor coupling, its carries out the second cover instruction set and based on the application program of this instruction set.General processor operation system, coprocessor can be by special-purpose control protocol and general processor communication simultaneously.General processor and coprocessor are coupled on one or more buffer memory and the memory management unit, and share this buffer memory or internal memory.Central authorities handle and coprocessor is integrated in same mainboard.
General processor is connected by same bus bridge with coprocessor, and wherein general processor is connected by system bus with bus bridge, and coprocessor can link to each other with bus bridge by buses different with system bus letter road such as universal serial bus.General processor and coprocessor carry out communication by pre-set control protocol.Control protocol has defined the information of transmitting between general processor and coprocessor.Memory management unit transmission and independently communication channel transmission that this information is shared by both.
Initialization is used in the general processor detecting, comprises the driver of detecting coprocessor under operating system; Coprocessor can be carried out special illegal operation code and detect above driver; General processor is set up context for the application on the coprocessor of carrying out the second cover instruction set, the load driver program, and by returning the control of application programs with the communication of coprocessor; Last on coprocessor the foreign key part in the executive utility.The term of execution using, both are by special-purpose control protocol communication.
As shown in Figure 2, operating system is on general processor, and program process operates on the operating system.Mainly comprise the main frame sign indicating number in the process, communication interface sign indicating number, process switch sign indicating number, foreign key, driver, operating system hand over word.When program process moves, the main frame sign indicating number is given general processor and is handled, be responsible for the communication of general processor and coprocessor by the communication interface sign indicating number, simultaneously operating system also will be passed through the communication interface sign indicating number to the monitoring of host process, and the communication between it and operating system will be by the special-purpose control protocol on the driver.With after course allocation is to the coprocessor, the applications sign indicating number promptly moves on coprocessor at the process switch sign indicating number.
The main frame sign indicating number refers to control and the Task Distribution partial code on the general processor of operating in the application program.
Foreign key refers to the calculating accelerating part code on the coprocessor of operating in the application program.
The application code that operates on the coprocessor uses the second cover instruction set encoding, and this partial code is carried out under operating system control, and general processor continues to handle other programs simultaneously.
The implementation of application program is: initialization is used in the general processor detecting, comprises the driver of detecting coprocessor under operating system; Coprocessor is by carrying out special illegal operation code detecting driver; General processor is set up context for the application on the coprocessor of carrying out the second cover instruction set, the load driver program, and by returning the control of application programs with the communication of coprocessor; Last on coprocessor the foreign key part in the executive utility, the term of execution using, both are by special-purpose control protocol communication.
General processor among the present invention is the combination of one or more CPU, and coprocessor is the combination of one or more GPU or the combination of one or more CPU and GPU.
Claims (5)
1, a kind of method of forming synergetic computer by heterogeneous processor, it is characterized in that, comprise general processor and coprocessor, general processor is connected by bus bridge with coprocessor, general processor is connected by system bus with bus bridge, coprocessor is connected with bus bridge by high-speed serial bus, general processor and coprocessor use special-purpose control protocol to carry out communication, control protocol has defined the information of transmitting between general processor and coprocessor, memory management unit and independently communication channel transmission that this information is shared by both, general processor and coprocessor are coupled on one or more buffer memory or the memory management unit, and shared this buffer memory or memory management unit, wherein, general processor is responsible for the operation system, carry out the main frame sign indicating number part of the first cover instruction set and application program, with the coprocessor of the collaborative execution of the calculating second cover instruction set of general processor, the foreign key part of being responsible for running application.
2, method according to claim 1 is characterized in that, the main frame sign indicating number refers to control and the Task Distribution partial code on the general processor of operating in the application program.
3, method according to claim 1 is characterized in that, foreign key refers to the calculating accelerating part code on the coprocessor of operating in the application program.
4, method according to claim 1 is characterized in that, the application code that operates on the coprocessor uses the second cover instruction set encoding, and this partial code is carried out under operating system control, and general processor continues to handle other programs simultaneously.
5, method according to claim 1 is characterized in that, the implementation of application program is: initialization is used in the general processor detecting, comprises the driver of detecting coprocessor under operating system; Coprocessor is by carrying out special illegal operation code detecting driver; General processor is set up context for the application on the coprocessor of carrying out the second cover instruction set, the load driver program, and by returning the control of application programs with the communication of coprocessor; Last on coprocessor the foreign key part in the executive utility, the term of execution using, both are by special-purpose control protocol communication.
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102156687A (en) * | 2011-04-06 | 2011-08-17 | 南京数模微电子有限公司 | Converged-architecture processor chip |
CN103902498A (en) * | 2013-12-18 | 2014-07-02 | 曲阜师范大学 | Software definition server system and method for heterogeneous computing |
CN104714923A (en) * | 2013-12-17 | 2015-06-17 | 华为技术有限公司 | Method and device for achieving equipment sharing |
WO2016202001A1 (en) * | 2015-06-17 | 2016-12-22 | 华为技术有限公司 | Computer instruction processing method, coprocessor, and system |
-
2009
- 2009-05-05 CN CN200910020787A patent/CN101546301A/en active Pending
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102156687A (en) * | 2011-04-06 | 2011-08-17 | 南京数模微电子有限公司 | Converged-architecture processor chip |
CN104714923A (en) * | 2013-12-17 | 2015-06-17 | 华为技术有限公司 | Method and device for achieving equipment sharing |
US10701159B2 (en) | 2013-12-17 | 2020-06-30 | Huawei Technologies Co., Ltd. | Method and apparatus for implementing device sharing |
CN103902498A (en) * | 2013-12-18 | 2014-07-02 | 曲阜师范大学 | Software definition server system and method for heterogeneous computing |
CN103902498B (en) * | 2013-12-18 | 2016-12-07 | 曲阜师范大学 | A kind of software definition server system towards Heterogeneous Computing and method |
WO2016202001A1 (en) * | 2015-06-17 | 2016-12-22 | 华为技术有限公司 | Computer instruction processing method, coprocessor, and system |
US10514929B2 (en) | 2015-06-17 | 2019-12-24 | Huawei Technologies Co., Ltd. | Computer instruction processing method, coprocessor, and system |
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