CN101515625B - Method for preparing LED chip substrate structure - Google Patents
Method for preparing LED chip substrate structure Download PDFInfo
- Publication number
- CN101515625B CN101515625B CN2009100486339A CN200910048633A CN101515625B CN 101515625 B CN101515625 B CN 101515625B CN 2009100486339 A CN2009100486339 A CN 2009100486339A CN 200910048633 A CN200910048633 A CN 200910048633A CN 101515625 B CN101515625 B CN 101515625B
- Authority
- CN
- China
- Prior art keywords
- photoresist
- substrate
- led chip
- preparation
- structure according
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 85
- 238000000034 method Methods 0.000 title claims abstract description 36
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 97
- 238000009616 inductively coupled plasma Methods 0.000 claims abstract description 39
- 238000005530 etching Methods 0.000 claims abstract description 37
- 229910052594 sapphire Inorganic materials 0.000 claims abstract description 16
- 239000010980 sapphire Substances 0.000 claims abstract description 16
- 238000001259 photo etching Methods 0.000 claims abstract description 7
- 238000010992 reflux Methods 0.000 claims abstract description 5
- 238000002360 preparation method Methods 0.000 claims description 25
- 239000000463 material Substances 0.000 claims description 5
- 239000012528 membrane Substances 0.000 claims description 4
- 230000000737 periodic effect Effects 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 claims 1
- 230000001678 irradiating effect Effects 0.000 abstract description 9
- 238000005516 engineering process Methods 0.000 abstract description 4
- 238000010521 absorption reaction Methods 0.000 abstract description 2
- 238000002844 melting Methods 0.000 abstract 1
- 230000008018 melting Effects 0.000 abstract 1
- 238000000059 patterning Methods 0.000 abstract 1
- 230000007547 defect Effects 0.000 description 4
- 238000012940 design transfer Methods 0.000 description 4
- 238000000605 extraction Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000009499 grossing Methods 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 239000004038 photonic crystal Substances 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 230000002269 spontaneous effect Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Images
Abstract
The invention relates to a method for preparing an LED chip substrate structure, comprising the following steps: forming a layer of photoresist film layer on the surface of a sapphire substrate, patterning the photoresist film layer using the photoetching technology to form the desirable patterns, irradiating the photoresist layer using the dark ultraviolet, melting the photoresist film layer using the reflux technology to form a plurality of convex hulls; and transmiting the profiles of the convex hulls on the substrate using the inductively coupled plasma etching process to form convex-hull microstructures on the substrate. As the photoresist is irradiated by the dark ultraviolet, the property of the photoresist is changed, and the inductively coupled plasma (CP) etching capability of the photoresist is improved, therefore, the photoresist is capable of directly being used as mask for making good-quality microstructural patterns to effectively reduce the pollution of the substrate after the etching and reduce the internal absorption and boundary reflection of the LED chips and improve the luminous efficiency of the LED chips.
Description
Technical field
The present invention relates to the light-emitting diode chip for backlight unit preparation method, refer in particular to the preparation method of the substrat structure that improves chip light emitting efficient.
Background technology
It is little that light-emitting diode has a volume, advantages such as efficient height and life-span are long, indicate in traffic, fields such as outdoor panchromatic demonstration have a wide range of applications. and especially utilize large-power light-emitting diodes may realize semiconductor solid lighting, cause the revolution of human illumination history, thereby become the research focus of present person in electronics gradually. in order to obtain the LED of high brightness, the crucial internal quantum efficiency and the external quantum efficiency that will improve device. at present, the chip light extraction efficiency is the principal element of limiting device external quantum efficiency, its main cause is an epitaxial material, refractive index difference between backing material and the air is bigger, and the light that causes active area to produce can not be derived chip in the generation total reflection of different refractivity material interface.
Proposed at present the method for several raising chip light extraction efficiencies, mainly comprised: changed the geometric shape of chip, reduce the propagation distance of light, reduce the absorption loss of light, as adopting inverted pyramid structure at chip internal; Structures such as resonant cavity or photonic crystal are adopted in control and change spontaneous radiation usually; Adopt the rough surface method, make light in coarse semiconductor and air interface generation diffusion, increase the chance of its projection etc., wherein the substrate of light-emitting diode chip for backlight unit has very big influence to the luminous efficiency of chip.
Yet when the preparation substrate, because conventional the anti-ICP etching power of photoresist is relatively poor down, after the ICP etching, photoresist easily is driven in the substrate, substrate surface can be carved black, substrate is polluted, and the figure of photoresist can not effectively be transferred on the substrate, thereby can not produce good microstructure graph substrate.It is complicated that this situation causes making the substrate processing with microstructure graph, and cost is increased; Cause to produce good substrate, thereby hindered the raising of chip light emitting efficient with microstructure graph.
Given this, a kind of preparation method of new LED chip substrate structure is provided.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of preparation method of substrat structure of light-emitting diode chip for backlight unit, owing to adopted deep UV that photoresist is shone, change the character of photoresist, improve the anti-ICP of photoresist (inductively coupled plasma) etching power, can directly utilize photoresist to do mask and make good microstructure graph, and can effectively reduce the situation that the etching back substrate is polluted, thus help reducing the absorbed inside of light-emitting diode chip for backlight unit, improve chip light emitting efficient.
In order to solve the problems of the technologies described above, the present invention adopts following technical scheme:
A kind of preparation method of LED chip substrate structure may further comprise the steps:
On substrate top surface, form one deck photoresist rete;
Use photoetching process with the photoresist membrane graphic to form desired pattern;
Utilize deep UV to this photoresist rete irradiation;
Use reflux technique and melt this photoresist rete, make this photoresist rete form a plurality of convex closure shapes;
The method of application etching is delivered to a plurality of convex closure shape profiles of this photoresist rete on this substrate, forms a plurality of convex closure shape micro-structurals on this substrate top surface.
In described method, described lithographic method is the inductively coupled plasma etching.
In described method, the desired pattern that described photoresist membrane graphic forms is prism, cylinder, pyramid, circular cone, round platform or the terrace with edge of periodicity or no periodic array; The section profile line of the convex closure shape micro-structural of described substrate surface is a camber line shape.
As one of preferred version of the present invention, described deep-ultraviolet wavelengths is 100nm～300nm.
As one of preferred version of the present invention, described deep UV is 0 °～90 ° to the angle of photoresist irradiation, and irradiation time is 1 second～60 minutes.
As one of preferred version of the present invention, the material of described substrate is a sapphire.
As one of preferred version of the present invention, the thickness of described photoresist mask is 0.5 μ m～4 μ m.
As one of preferred version of the present invention, baking temperature is that 50 ℃～400 ℃, time are 0.1 minute～60 minutes in the described reflux technique.
Among the preparation method of LED chip substrate structure of the present invention, owing to adopt deep UV (DUV) that photoresist is shone, improved the ability of the anti-ICP of photoresist (inductively coupled plasma) etching, deep UV (DUV) general reference wavelength is less than the electromagnetic wave of 300nm usually.Thereby overcome conventional down when the preparation substrate, because the anti-ICP etching power of conventional photoresist is relatively poor, after the ICP etching, photoresist easily is driven in the substrate, substrate surface can be carved black, substrate is polluted, and the figure of photoresist can not effectively be transferred on the substrate, thereby can not directly utilize photoresist to make the problem of good microstructure graph.Because the method for the invention can directly be utilized photoresist to do mask and make good microstructure graph, and can effectively reduce the situation that the etching back substrate is polluted, can reduce the absorbed inside of light-emitting diode chip for backlight unit, thereby improve the luminous efficiency of light-emitting diode chip for backlight unit.
In addition, adopt the substrat structure of the method for the invention preparation, on substrate, formed convex closure shape micro-structural, and this micro-structural can effectively reduce boundary reflection, simultaneously also can reduce absorbed inside, this micro-structural can effectively be improved defect of epitaxial growth, thereby has further improved the luminous efficiency of light-emitting diode.
Description of drawings
Fig. 1 a-1e is preparation method's schematic flow sheet of LED chip substrate structure of the present invention.
Embodiment
Further specify concrete implementation step of the present invention below in conjunction with accompanying drawing, for the accompanying drawing that makes things convenient for that illustrates is not proportionally drawn.
Embodiment one
At first with reference to shown in Fig. 1 a, apply photoresist on Sapphire Substrate 10, form one deck photoresist rete 20, the thickness of photoresist rete 20 is 0.5 μ m.Then photoresist is graphical on substrate by photoetching process, form desired pattern shown in Fig. 1 b, this pattern is the circular cone that periodic regular is arranged.Utilize 30 pairs of patterned photoresist retes 21 of deep UV (DUV) to shine shown in Fig. 1 c then, illuminate condition is as follows: selecting wavelength for use is the deep UV of 300nm, 90 ° of irradiating angles, irradiation time 60 minutes.Irradiating angle refers to the angle between described deep UV (DUV) 30 and the plane, patterned photoresist rete 21 place.Patterned photoresist rete 21 is after deep UV (DUV) 30 irradiations, change has taken place in its character, the ability of patterned photoresist rete 21 anti-ICP (inductively coupled plasma) etchings is improved, can directly utilizes patterned photoresist rete 21 to do mask.Adopt platform baking photoresist technique of backflow that the photoresist pattern is formed similar a plurality of convex closure shape micro structured pattern shown in Fig. 1 d then.Counterflow condition is as follows: baking temperature is 50 ℃, and the time is 0.1 minute.Adopt afterwards ICP (inductively coupled plasma) etching technique with this kind design transfer to the sapphire shown in Fig. 1 e, form the micro-structural 11 of a plurality of convex closure shapes on Sapphire Substrate 10 surfaces, these micro-structural 11 fronts are yurt shape, and its section profile line is a circular arc.
Because patterned photoresist rete 21 is after deep UV (DUV) 30 irradiations, the ability of anti-ICP (inductively coupled plasma) etching is improved, the substrate surface that obtains after etching conventional meeting down do not occur and is carved black situation, thereby making substrate be subjected to pollution problems is resolved; Can directly utilize patterned photoresist rete 21 to do mask, the problem that can not directly utilize conventional photoresist to make good microstructure graph is resolved.Adopt the light-emitting diode chip for backlight unit of gained substrat structure preparation,, reduced absorbed inside, and the yurt shape micro-structural that substrate surface forms effectively reduced boundary reflection and absorbed inside, higher luminous efficiency has been arranged because substrate is polluted.
Embodiment two
At first with reference to shown in Fig. 1 a, apply photoresist on Sapphire Substrate 10, form one deck photoresist rete 20, the thickness of photoresist rete 20 is 2 μ m.Then photoresist is graphical on substrate by photoetching process, form desired pattern shown in Fig. 1 b, this pattern is the regularly arranged quadrangular of aperiodicity.Utilize 30 pairs of patterned photoresist retes 21 of deep UV (DUV) to shine shown in Fig. 1 c then, illuminate condition is as follows: selecting wavelength for use is the deep UV of 200nm, 60 ° of irradiating angles, irradiation time 30 minutes.Irradiating angle refers to the angle between described deep UV (DUV) 30 and the plane, patterned photoresist rete 21 place.Patterned photoresist rete 21 is after deep UV (DUV) 30 irradiations, and change has taken place its character, and the ability of patterned photoresist rete 21 anti-ICP (inductively coupled plasma) etchings is improved.Adopt platform baking photoresist technique of backflow that the photoresist pattern is formed similar a plurality of convex closure shape micro structured pattern shown in Fig. 1 d then.Counterflow condition is as follows: baking temperature is 200 ℃, and the time is 20 minutes.Adopt afterwards ICP (inductively coupled plasma) etching technique with this kind design transfer to the sapphire shown in Fig. 1 e, form the micro-structural 11 of a plurality of convex closure shapes on Sapphire Substrate 10 surfaces, these micro-structural 11 fronts are yurt shape, and its section profile line is a camber line shape.
Because patterned photoresist rete 21 is after deep UV (DUV) 30 irradiations, the ability of anti-ICP (inductively coupled plasma) etching is improved, the substrate surface that obtains after etching conventional meeting down do not occur and is carved black situation, is resolved thereby make substrate be subjected to pollution problems.Directly utilize patterned photoresist rete 21 to do mask, etching back substrate surface clean, smooth is resolved the problem that can not directly utilize conventional photoresist to make good microstructure graph.Adopt the light-emitting diode chip for backlight unit of gained substrat structure preparation, because substrate is polluted, and has reduced absorbed inside, and the yurt shape micro-structural that substrate surface forms has effectively reduced boundary reflection and absorbed inside, can effectively improve defect of epitaxial growth, very high luminous efficiency is arranged.
Embodiment three
At first with reference to shown in Fig. 1 a, apply photoresist on Sapphire Substrate 10, form one deck photoresist rete 20, the thickness of photoresist rete 20 is 4 μ m.Then photoresist is graphical on substrate by photoetching process, form desired pattern shown in Fig. 1 b, this pattern is the regularly arranged round platform of aperiodicity.Utilize 30 pairs of patterned photoresist retes 21 of deep UV (DUV) to shine shown in Fig. 1 c then, illuminate condition is as follows: selecting wavelength for use is the deep UV of 100nm, 30 ° of irradiating angles, irradiation time 1 minute.Irradiating angle refers to the angle between described deep UV (DUV) 30 and the plane, patterned photoresist rete 21 place.Patterned photoresist rete 21 is after deep UV (DUV) 30 irradiations, and change has taken place its character, and the ability of patterned photoresist rete 21 anti-ICP (inductively coupled plasma) etchings is improved.Adopt platform baking photoresist technique of backflow that the photoresist pattern is formed similar a plurality of convex closure shape micro structured pattern shown in Fig. 1 d then.Counterflow condition is as follows: baking temperature is 400 ℃, and the time is 60 minutes.Adopt afterwards ICP (inductively coupled plasma) etching technique with this kind design transfer to the sapphire shown in Fig. 1 e, form the micro-structural 11 of a plurality of convex closure shapes on Sapphire Substrate 10 surfaces, these micro-structural 11 fronts are yurt shape, and its section profile line is a camber line shape.
Because patterned photoresist rete 21 is after deep UV (DUV) 30 irradiations, the ability of anti-ICP (inductively coupled plasma) etching is improved, the substrate surface that obtains after etching conventional meeting down do not occur and is carved black situation, is resolved thereby make substrate be subjected to pollution problems.Directly utilize patterned photoresist rete 21 to do mask, etching back substrate surface clean, smooth has obtained good microstructure graph, and the problem that can not directly utilize conventional photoresist to make good microstructure graph is resolved.Adopt the light-emitting diode chip for backlight unit of gained substrat structure preparation, because substrate is polluted, and has reduced absorbed inside, and the yurt shape micro-structural that substrate surface forms has effectively reduced boundary reflection and absorbed inside, can effectively improve defect of epitaxial growth, high luminous efficiency is arranged.
Embodiment four
At first with reference to shown in Fig. 1 a, apply photoresist on Sapphire Substrate 10, form one deck photoresist rete 20, the thickness of photoresist rete 20 is 4 μ m.Then photoresist is graphical on substrate by photoetching process, form desired pattern shown in Fig. 1 b, this pattern is the cylinder that periodic regular is arranged.Utilize 30 pairs of patterned photoresist retes 21 of deep UV (DUV) to shine shown in Fig. 1 c then, illuminate condition is as follows: selecting wavelength for use is the deep UV of 100nm, 0 ° of irradiating angle, irradiation time 1 second.Irradiating angle refers to the angle between described deep UV (DUV) 30 and the plane, patterned photoresist rete 21 place.Patterned photoresist rete 21 is after deep UV (DUV) 30 irradiations, and change has taken place its character, and the ability of patterned photoresist rete 21 anti-ICP (inductively coupled plasma) etchings is improved.Adopt platform baking photoresist technique of backflow that the photoresist pattern is formed similar a plurality of convex closure shape micro structured pattern shown in Fig. 1 d then.Counterflow condition is as follows: baking temperature is 400 ℃, and the time is 60 minutes.Adopt afterwards ICP (inductively coupled plasma) etching technique with this kind design transfer to the sapphire shown in Fig. 1 e, form the micro-structural 11 of a plurality of convex closure shapes on Sapphire Substrate 10 surfaces, these micro-structural 11 fronts are yurt shape, and its section profile line is a camber line shape.
Because patterned photoresist rete 21 is after deep UV (DUV) 30 irradiations, the ability of anti-ICP (inductively coupled plasma) etching is improved, the substrate surface that obtains after etching conventional meeting down do not occur and is carved black situation, is resolved thereby make substrate be subjected to pollution problems.Directly utilize patterned photoresist rete 21 to do mask, etching back substrate surface clean, and obtained the microstructure graph of high-quality, this microstructure graph contour smoothing is resolved the problem that can not directly utilize conventional photoresist to make good microstructure graph.Adopt the light-emitting diode chip for backlight unit of gained substrat structure preparation, because substrate is polluted, and has reduced absorbed inside, and the yurt shape micro-structural of the high-quality of substrate surface formation has effectively reduced boundary reflection and absorbed inside, can effectively improve defect of epitaxial growth, high luminous efficiency is arranged.
By the contrast experiment, from test data as can be seen, adopt the tube core of substrate of the present invention higher by 70% among the embodiment four than the tube core luminous efficiency that adopts common Sapphire Substrate.
According to a particular embodiment of the invention, owing to adopt deep UV (DUV), improved the ability of the anti-ICP of photoresist (inductively coupled plasma) etching to the photoresist irradiation.Thereby overcome conventional down when the preparation substrate since photoresist through the ICP etching after, photoresist easily is driven in the substrate, substrate surface can be carved black, thereby makes substrate be subjected to pollution problems.Because the method for the invention can reduce the absorbed inside of light-emitting diode chip for backlight unit, thereby improve the luminous efficiency of light-emitting diode chip for backlight unit owing to can effectively reduce the pollution of etching back substrate.In addition, adopt the substrat structure of the method for the invention preparation, on substrate, formed yurt shape micro-structural, and this micro-structural can effectively reduce boundary reflection, also can reduce absorbed inside simultaneously, thereby further improve the luminous efficiency of light-emitting diode.
Other process conditions that relate among the present invention are the common process condition, belong to the category that those skilled in the art are familiar with, and do not repeat them here.
The foregoing description is the unrestricted technical scheme of the present invention in order to explanation only.Any technical scheme that does not break away from spirit and scope of the invention all should be encompassed in the middle of the patent claim of the present invention.
Claims (9)
1. the preparation method of a LED chip substrate structure is characterized in that may further comprise the steps:
On substrate top surface, form one deck photoresist rete;
Use photoetching process with the photoresist membrane graphic to form desired pattern;
Utilize deep UV to this photoresist rete irradiation;
Use reflux technique and melt this photoresist rete, make this photoresist rete form a plurality of convex closure shapes;
The method of application etching is delivered to a plurality of convex closure shape profiles of this photoresist rete on this substrate, forms a plurality of convex closure shape micro-structurals on this substrate top surface.
2. the preparation method of LED chip substrate structure according to claim 1, it is characterized in that: described deep-ultraviolet wavelengths is 100nm～300nm.
3. the preparation method of light-emitting diode substrat structure according to claim 1 and 2 is characterized in that: described deep UV is 0 °～90 ° to the angle of photoresist irradiation, and irradiation time is 1 second～60 minutes.
4. the manufacture method of LED chip substrate structure according to claim 1 is characterized in that: the desired pattern that the photoresist membrane graphic forms is for periodically or prism, cylinder, pyramid, circular cone, round platform or the terrace with edge of no periodic array.
5. the preparation method of LED chip substrate structure according to claim 1, it is characterized in that: described lithographic method is the inductively coupled plasma etching.
6. the preparation method of LED chip substrate structure according to claim 1, it is characterized in that: the section profile line of the convex closure shape micro-structural of described substrate surface is a camber line shape.
7. the preparation method of LED chip substrate structure according to claim 1, it is characterized in that: the material of described substrate is a sapphire.
8. the preparation method of LED chip substrate structure according to claim 1, it is characterized in that: the thickness of described photoresist rete is 0.5 μ m～4 μ m.
9. the preparation method of LED chip substrate structure according to claim 1 is characterized in that: baking temperature is that 50 ℃～400 ℃, time are 0.1 minute～60 minutes in the described reflux technique.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009100486339A CN101515625B (en) | 2009-03-31 | 2009-03-31 | Method for preparing LED chip substrate structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009100486339A CN101515625B (en) | 2009-03-31 | 2009-03-31 | Method for preparing LED chip substrate structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101515625A CN101515625A (en) | 2009-08-26 |
| CN101515625B true CN101515625B (en) | 2011-09-14 |
Family
ID=41039987
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2009100486339A Expired - Fee Related CN101515625B (en) | 2009-03-31 | 2009-03-31 | Method for preparing LED chip substrate structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101515625B (en) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101814564B (en) * | 2010-03-11 | 2013-07-31 | 上海蓝光科技有限公司 | Method for preparing epitaxial growing nano pattern substrate of nitride |
| CN102103985A (en) * | 2010-11-04 | 2011-06-22 | 上海蓝光科技有限公司 | Method for preparing small-sized patterned substrate |
| CN102129971B (en) * | 2010-12-24 | 2012-11-07 | 长治虹源科技晶体有限公司 | Method and system for etching graphical sapphire substrate |
| CN102087484B (en) * | 2010-12-24 | 2013-01-16 | 长治虹源科技晶体有限公司 | Method for photoengraving graphical sapphire substrate |
| CN102157629B (en) * | 2010-12-24 | 2012-10-03 | 长治虹源科技晶体有限公司 | Method for manufacturing graphical sapphire substrate |
| CN102176497A (en) * | 2011-03-11 | 2011-09-07 | 上海蓝光科技有限公司 | Technological method for improving capacity of ICP (inductively coupled plasma) to etch sapphire pattern substrate |
| CN103682013B (en) * | 2012-09-11 | 2016-06-15 | 中国科学院物理研究所 | A kind of method preparing nanoscale spheroplast structure at LED surface |
| CN103107252B (en) * | 2013-02-27 | 2016-01-27 | 中国科学院物理研究所 | The method of class spherical structure is prepared on the GaP surface of AlGaInP base LED |
| CN103199161B (en) * | 2013-03-22 | 2016-01-06 | 中国科学院物理研究所 | A kind of method preparing cone structure on GaP surface |
| JP6170378B2 (en) * | 2013-08-29 | 2017-07-26 | 東京エレクトロン株式会社 | Etching method |
| CN105575797A (en) * | 2015-12-23 | 2016-05-11 | 苏州工业园区纳米产业技术研究院有限公司 | Photoresist backflow preparation method capable of reducing inclination angle of medium on etched wafer |
| CN106816682A (en) * | 2016-12-20 | 2017-06-09 | 西安科锐盛创新科技有限公司 | The preparation method of the solid plasma pin diodes in restructural holographic antenna |
| CN108128751B (en) * | 2017-12-19 | 2020-11-27 | 苏州工业园区纳米产业技术研究院有限公司 | Silicon spherical micro-bump etching method |
-
2009
- 2009-03-31 CN CN2009100486339A patent/CN101515625B/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| CN101515625A (en) | 2009-08-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101515625B (en) | Method for preparing LED chip substrate structure | |
| CN101515624B (en) | Method for manufacturing LED chips | |
| TWI531086B (en) | An optical substrate, a semiconductor light-emitting element, and a semiconductor light-emitting element | |
| CN101582479B (en) | Light emitting diode chip structure manufacturing method | |
| CN101567414B (en) | Light-emitting diode chip and manufacturing method thereof | |
| TWI528584B (en) | Method for fabricating nano patterned substrate for high efficiency nitride based light emitting diode | |
| KR101233062B1 (en) | Method for fabricating nano patterned substrate for high efficiency nitride based light emitting diode | |
| CN102254809B (en) | Dry etching method for patterned sapphire substrate | |
| CN103579435A (en) | GaN-based power-type light-emitting diode and manufacturing method thereof | |
| CN103022277A (en) | Preparation method of light-emitting diode using pattered substrate | |
| CN101567415B (en) | Manufacturing method for light-emitting diode chip substrate structure | |
| CN103247733A (en) | Patterned substrate of light-emitting semiconductor, manufacturing method thereof and light-emitting semiconductor device | |
| US10446773B2 (en) | Substrate, optical element, mold, organic light-emitting element, organic thin-film solar cell, and method for producing substrate | |
| CN114551680A (en) | Flip light-emitting diode chip and preparation method thereof | |
| CN101867001B (en) | Self-aligned process for preparing convex graphical substrate | |
| CN102185069B (en) | Patterned substrate with multiple annulus structure distribution as well as manufacturing method and application thereof | |
| CN104377286A (en) | Method for preparing three-dimensional micrometer concave balls | |
| US20110140130A1 (en) | Method for Forming a Thin-film Structure of a Light-Emitting Device via Nanoimprint | |
| CN101515626B (en) | Method for manufacturing LED chip substrate structure | |
| CN109192836B (en) | Preparation method of LED structure with graded-refractive-index nano structure combined with nano lens | |
| CN101593801B (en) | Method for preparing inverted light-emitting diodes | |
| CN103137815A (en) | Novel pattern sapphire substrate (PSS) structure and manufacturing method | |
| CN105374907A (en) | Substrate of light-emitting diode chip and manufacturing method thereof | |
| CN105304775B (en) | The preparation method of LED patterned substrates with low-refraction micro-nano structure layer | |
| CN115020565A (en) | Preparation method of composite patterned substrate and epitaxial structure with air gap |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110914 |