CN101515442B - Peripheral circuit - Google Patents
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- CN101515442B CN101515442B CN2008100810658A CN200810081065A CN101515442B CN 101515442 B CN101515442 B CN 101515442B CN 2008100810658 A CN2008100810658 A CN 2008100810658A CN 200810081065 A CN200810081065 A CN 200810081065A CN 101515442 B CN101515442 B CN 101515442B
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Abstract
The invention discloses a peripheral circuit, which is suitable to be configured on a substrate with an active element array. The peripheral circuit comprises a plurality of first testing pads, a plurality of second testing pads, and a plurality of first wires and second wires which are electrically connected to the active element array respectively. Each first testing pad comprises a first conductive layer and a second conductive layer which is electrically connected with the first conductive layer. The first conductive layer is electrically connected to at least two of the adjacent first wires. The second testing pads are configured between the first testing pads and the active element array, and each second testing pad comprises a plurality of third conductive layers and a fourth conductive layer which is electrically connected with the third conductive layers. The first wires pass through the third conductive layers and electrically insulate the fourth conductive layer, and the third conductive layers are electrically connected to one of the adjacent second wires respectively.
Description
Technical field
The invention relates to a kind of LCD, and particularly relevant for the peripheral circuit on a kind of active elements array substrates that is disposed at LCD.
Background technology
Social now multimedia technology is quite flourishing, is indebted to the progress of semiconductor element and display device mostly.With regard to display, have that high image quality, space utilization efficient are good, the LCD of low consumpting power, advantageous characteristic such as radiationless becomes the main flow in market gradually.
Show module (TFT-LCD module) with tft liquid crystal, it mainly is made up of a display panels (liquid crystal display panel) and a module backlight (backlight module).Wherein, Display panels normally is made up of a thin-film transistor array base-plate (thin film transistor arraysubstrate), a colored optical filtering substrates (color filter substrate) and a liquid crystal layer that is disposed between this two substrates; And module backlight is in order to provide this display panels required area source, so that the liquid crystal display module reaches the effect of demonstration.
Thin-film transistor array base-plate can be divided into viewing area (display region) and perimeter circuit district (peripheral circuit region); Wherein on the viewing area, dispose most pixel cells, and each pixel cell comprises thin film transistor (TFT) and the pixel electrode (pixel electrode) that is connected with thin film transistor (TFT) with arrayed.In addition, on perimeter circuit district and viewing area, dispose most bar scan wirings (scanline) and data wiring (data line), wherein the thin film transistor (TFT) of each pixel cell is controlled by the scan wiring and the data wiring of correspondence.
Behind the processing procedure of accomplishing thin-film transistor array base-plate, can carry out electrical detection to the pixel cell on the thin-film transistor array base-plate usually, to judge that pixel cell could normal operation.When pixel cell can't normal operation, just can repair for bad element (like thin film transistor (TFT) or pixel electrode etc.) or circuit.
The mode of electrical detection is normally with the probe test perimeter circuit.In detail, perimeter circuit has most the testing cushion that are electrically connected to scan wiring and data wiring, but and probe contacts each testing cushion and send a test signal and can measure the whether normal operation of each pixel cell.Yet present LCD all develops towards the direction of miniaturization, high-res, makes that the density of pixel cell is more and more high, and the width of testing cushion also so more and more little.If the width of testing cushion then can make probe can't accurately measure each bar scan wiring or data wiring less than probe size.In other words, single probe might touch two adjacent testing cushion simultaneously, so can cause the flaw of active device array to come to light and to repair.
Summary of the invention
The present invention provides a kind of peripheral circuit, can be in order to test highdensity active device array.
For addressing the above problem, the present invention proposes a kind of peripheral circuit, is suitable for being disposed at one and has on the substrate of an active device array, and substrate has an active device array, and peripheral circuit and active device array electrically connect.Peripheral circuit comprises most bar first distributions (trace), most bar second distribution, most first testing cushion and most second testing cushion.Each first distribution and each second distribution are electrically connected to active device array respectively.Each first testing cushion comprises one first conductive layer and one second conductive layer.First conductive layer be electrically connected to the first adjacent distribution wherein at least two.Second conductive layer is disposed on first conductive layer, and electrically connects with first conductive layer.Second testing cushion is disposed between first testing cushion and the active device array, and each second testing cushion comprises most the 3rd conductive layers and one the 4th conductive layer.First distribution is through between the 3rd conductive layer, and each the 3rd conductive layer be electrically connected to respectively the second adjacent distribution one of them.The 4th conductive layer is disposed on the 3rd conductive layer, and electrically connects with the 3rd conductive layer, and the 4th conductive layer and first distribution are for being electrically insulated.
In one embodiment of this invention, the quantity of the 3rd conductive layer of above-mentioned each second testing cushion is two, and the quantity that is electrically connected to first distribution of each first testing cushion is two.
In one embodiment of this invention, above-mentioned first distribution and second distribution are for being staggered.
In one embodiment of this invention, above-mentioned quantity through first distribution between the 3rd conductive layer of each second testing cushion is two, and first distribution be electrically connected to respectively two adjacent first testing cushion first conductive layer one of them.
In one embodiment of this invention, above-mentioned peripheral circuit also comprises one first control pad, one second control pad, most first on-off elements and most second switch elements.First on-off element is electrically connected to the first control pad, and the second switch element is electrically connected to the second control pad.First distribution that is connected to same first testing cushion respectively via first on-off element one of them and second switch element one of them and be electrically connected to active device array, and second distribution that is connected to same second testing cushion respectively via first on-off element one of them and second switch element one of them and be electrically connected to active device array.
In one embodiment of this invention, the quantity of the 3rd conductive layer of above-mentioned each second testing cushion is three, and the quantity that is electrically connected to first distribution of each first testing cushion is three.
In one embodiment of this invention, above-mentioned first distribution and second distribution are for being staggered.
In one embodiment of this invention, above-mentioned peripheral circuit also comprises one first control pad, one second control pad, one the 3rd control pad, most first on-off elements, most second switch elements and most the 3rd on-off elements.First on-off element is electrically connected to the first control pad; The second switch element is electrically connected to the second control pad; And the 3rd on-off element is electrically connected to the 3rd control pad; First distribution that wherein is connected to same first testing cushion respectively via first on-off element one of them, second switch element one of them and the 3rd on-off element one of them and be electrically connected to active device array, and second distribution that is connected to same second testing cushion respectively via first on-off element one of them, second switch element one of them and the 3rd on-off element one of them and be electrically connected to active device array.
In one embodiment of this invention, above-mentioned peripheral circuit also comprises most articles the 3rd distributions and most the 3rd testing cushion.The 3rd distribution is electrically connected to active device array.The 3rd testing cushion is disposed between second testing cushion and the active device array, and each the 3rd testing cushion comprises most the 5th conductive layers and one the 6th conductive layer.First distribution and second distribution be through between the 5th conductive layer, and each the 5th conductive layer be electrically connected to respectively the 3rd adjacent distribution one of them.The 6th conductive layer is disposed on the 5th conductive layer, and electrically connects with the 5th conductive layer, and the 6th conductive layer and first distribution and second distribution are for being electrically insulated.
In one embodiment of this invention, above-mentioned first distribution, second distribution and the 3rd distribution are for being staggered.
In one embodiment of this invention, above-mentioned first distribution, second distribution and the 3rd distribution are the scan wiring of LCD.
In one embodiment of this invention, above-mentioned first distribution, second distribution and the 3rd distribution are the data wiring of LCD.
The present invention increases the width of first testing cushion, second testing cushion and the 3rd testing cushion because of adopting the multi-thread mode of surveying altogether, therefore and prior art in comparison, peripheral circuit of the present invention can be used to the higher active device array of test density.In addition; The present invention more disposes first on-off element, second switch element and the 3rd on-off element respectively on first distribution, second distribution and the 3rd distribution; And with the first control pad, the second control pad and the 3rd control of control pad first on-off element, second switch element and the 3rd on-off element; So can record the flaw in the active device array more accurately, be beneficial to carry out the action of follow-up repairing.
Description of drawings
For let above-mentioned purpose of the present invention, feature and advantage can be more obviously understandable, elaborate below in conjunction with the accompanying drawing specific embodiments of the invention, wherein:
Fig. 1 is the configuration schematic diagram of peripheral circuit in the first embodiment of the invention.
Fig. 2 is the enlarged diagram of peripheral circuit among Fig. 1.
Fig. 3 is the synoptic diagram of the another kind of configuration mode of first distribution among Fig. 1.
Fig. 4 is the synoptic diagram of peripheral circuit in the second embodiment of the invention.
Fig. 5 is the synoptic diagram of peripheral circuit in the third embodiment of the invention.
Fig. 6 is the synoptic diagram of peripheral circuit in the fourth embodiment of the invention.
Fig. 7 is the synoptic diagram of peripheral circuit in the fifth embodiment of the invention.
Fig. 8 is the synoptic diagram of peripheral circuit and scan wiring in the sixth embodiment of the invention.
The main element symbol description:
50: substrate
60: active device array
70: scan wiring
100,100a, 100b, 100c, 100d, 100e: peripheral circuit
110a: first distribution
110b: second distribution
110c: the 3rd distribution
120a: first testing cushion
122a: first conductive layer
124a: second conductive layer
120b: second testing cushion
122b: the 3rd conductive layer
124b: the 4th conductive layer
120c: the 3rd testing cushion
122c: the 5th conductive layer
124c: the 6th conductive layer
130a: the first control pad
130b: the second control pad
130c: the 3rd control pad
140a: first on-off element
140b: second switch element
140c: the 3rd on-off element
150a: first control line
150b: second control line
150c: the 3rd control line
160: connecting conductive layer
Embodiment
First embodiment
Fig. 1 is the configuration schematic diagram of peripheral circuit in the first embodiment of the invention, and Fig. 2 is the enlarged diagram of peripheral circuit among Fig. 1.Please with reference to Fig. 1 and Fig. 2, peripheral circuit 100 is configurable on a substrate 50, and substrate 50 can be the substrate of a LCD.Substrate 50 has an active device array 60, and wherein peripheral circuit 100 electrically connects with active device array 60.Peripheral circuit 100 comprises most bar first distribution 110a, most bar second distribution 110b, most the first testing cushion 120a and most the second testing cushion 120b, and wherein the second testing cushion 120b is disposed between the first testing cushion 120a and the active device array 60.The first distribution 110a electrically connects the active element arrays 60 and the first testing cushion 120a; The second distribution 110b then connects the active device array 60 and the second testing cushion 120b, and wherein each first testing cushion 120a electrically connects with two first distribution 110a at least.Briefly, the first distribution 110a and the second distribution 110b are for being staggered.
In detail, each second testing cushion 120b comprises one the 4th conductive layer 124b and most the 3rd conductive layer 122b, wherein the material of the 4th conductive layer 124b for example be indium tin oxide (indium tin oxide, ITO).In addition, the material of the 4th conductive layer 124b also can be other transparent metal oxides, for example be indium-zinc oxide (indium zinc oxide, IZO), the aluminium zinc oxide (aluminum zinc oxide, IZO).The 4th conductive layer 124b is disposed on the 3rd conductive layer 122b, and electrically connects each the 3rd conductive layer 122b, and each bar second distribution 110b is electrically connected to one the 3rd conductive layer 122b, and electrically connects with active device array 60.
Hold above-mentionedly, the first testing cushion 120a has one second conductive layer 124a and one first conductive layer 122a, and wherein the material of the second conductive layer 124a for example is all indium tin oxide or other transparent metal oxides with the 4th conductive layer 124b.The second conductive layer 124a is disposed on the first conductive layer 122a, and electrically connects with the first conductive layer 122a.Each first distribution 110a then passes between the 3rd conductive layer 122b, and is electrically connected to the first conductive layer 122a, and wherein each first conductive layer 122a is connected to two first distribution 110a at least.The 4th conductive layer 124b and the first distribution 110a for example, can be provided with insulation course (not illustrating) with isolated first distribution 110a and the 4th conductive layer 124b for being electrically insulated between the first distribution 110a and the 4th conductive layer 124b.
In the present embodiment, each first testing cushion 120a can electrically connect with two first distribution 110a, and each second testing cushion 120b has two the 3rd conductive layer 122b, and one first distribution 110a process is arranged between the 3rd conductive layer 122b.Briefly, two first shared one the first testing cushion 120a of distribution 110a, and two second shared one the second testing cushion 120b of distribution 110b, wherein the first distribution 110a and the second distribution 110b are for being staggered.What deserves to be mentioned is that the first distribution 110a is except that configuration in the above described manner, those skilled in the art also can otherwise dispose.Fig. 3 is the synoptic diagram of the another kind of configuration mode of first distribution among Fig. 1.Please with reference to Fig. 3; Identical with Fig. 2 is; Two first shared one first testing cushion 120a of distribution 110a in Fig. 3; And shared one the second testing cushion 120b of the second distribution 110b two, but in Fig. 3, between two of each second testing cushion 120b the 3rd conductive layer 122b two first distribution 110a processes are arranged, and two first distribution 110a through the same second testing cushion 120b are electrically connected to the two adjacent first testing cushion 120a respectively.
Because present embodiment is connected to the same first testing cushion 120a or the second testing cushion 120b with two first distribution 110a or two second distribution 110b, therefore the width of the first testing cushion 120a and the second testing cushion 120b can increase.So, even the density of the first distribution 110a and the second distribution 110b is very high, each probe also can touch the first testing cushion 120a or the second testing cushion 120b separately, and can not touch adjacent two first testing cushion 120a or two second testing cushion 120b simultaneously.In other words, peripheral circuit 100 can be in order to the active device array 60 of test higher density.In addition; Because the width of the first testing cushion 120a and the second testing cushion 120b increases; Therefore can increase the contact nargin of probe, that is to say, when testing; Probe does not need to aim at the first testing cushion 120a accurately or the second testing cushion 120b can test, and can improve the stabilized contact degree between probe and the first testing cushion 120a or the second testing cushion 120b.
Second embodiment
Fig. 4 is the synoptic diagram of peripheral circuit in the second embodiment of the invention.What need explanation earlier is that second embodiment and first embodiment are roughly the same, and in second embodiment and first embodiment, same or analogous element numbers is represented same or analogous element.Below will explain that in detail something in common just repeats no more to different the locating of two embodiment.
Please with reference to Fig. 4, the present embodiment and the first embodiment difference are that the peripheral circuit 100a of present embodiment also comprises one first control pad 130a, one second control pad 130b, most the first on-off element 140a and most second switch element 140b.Each first on-off element 140a all is electrically connected to the first control pad 130a, and each second switch element 140b then is connected to the second control pad 130b.In the present embodiment; Peripheral circuit 100a also can comprise one first control line 150a and one second control line 150b; And the first on-off element 140a sees through the first control line 150a and the first control pad 130a electrically connects, and second switch element 140b sees through the second control line 150b and the second control pad 130b electrically connects.
Hold above-mentionedly, two first distribution 110a that are connected to the same first testing cushion 120a dispose one first an on-off element 140a and a second switch element 140b respectively.And two second distribution 110b that are connected to the same second testing cushion 120b also dispose one first an on-off element 140a and a second switch element 140b respectively.When probe contacts one of the first testing cushion 120a or second testing cushion 120b; Can first control pad 130a and the second control pad 130b control the first on-off element 140a and second switch element 140b, test is connected to two the first distribution 110a or the second distribution 110b of the same first testing cushion 120a or the second testing cushion 120b respectively whereby.
For example; When test one first testing cushion 120a, contact one first testing cushion 120a with probe, and close the first on-off element 140a earlier; If test result finds that flaw is arranged, then the active component that the first distribution 110a of second switch element 140b connected is disposed in expression has flaw.Next open the first on-off element 140a and open and close second switch element 140b, if test result finds that flaw is arranged, then the active component that the first distribution 110a of the first on-off element 140a connected is disposed in expression has flaw.In like manner, two second distribution 110b that are connected to the same second testing cushion 120b also can test by said method.Whereby, can measure the position that has flaw in the active device array 60 more accurately.
The 3rd embodiment
Fig. 5 is the synoptic diagram of peripheral circuit in the third embodiment of the invention.What need explanation earlier is that the 3rd embodiment and first embodiment are roughly the same, and in the 3rd embodiment and first embodiment, same or analogous element numbers is represented same or analogous element.Below will explain that in detail something in common just repeats no more to different the locating of two embodiment.
Present embodiment and first embodiment different be in; In the peripheral circuit 100b of present embodiment; Each first testing cushion 120a all electrically connects with three first distribution 110a; And each second testing cushion 120b all comprises three the 3rd conductive layer 122b, and one first distribution 110a process is all arranged between per two the 3rd conductive layer 122b.So, can further increase by the width of the first testing cushion 120a and the second testing cushion 120b, but and the higher active device array of test density.
The 4th embodiment
Fig. 6 is the synoptic diagram of peripheral circuit in the fourth embodiment of the invention.What need explanation earlier is that the 4th embodiment and the 3rd embodiment are roughly the same, and in the 4th embodiment and the 3rd embodiment, same or analogous element numbers is represented same or analogous element.Below will explain that in detail something in common just repeats no more to two embodiment differences.
Please with reference to Fig. 6; Present embodiment and first embodiment different be in, the peripheral circuit 100c of present embodiment also comprises one first control pad 130a, one second control pad 130b, one the 3rd control pad 130c, most the first on-off element 140a, most second switch element 140b and most the 3rd on-off element 140c.Each first on-off element 140a all is electrically connected to the first control pad 130a, and each second switch element 140b is connected to the second control pad 130b, and each the 3rd on-off element 140c then is electrically connected to the 3rd control pad 130c.In the present embodiment; Peripheral circuit 100c also can comprise one first control line 150a, one second control line 150b and one the 3rd control line 150c; Wherein the first on-off element 140a sees through the first control line 150a and the first control pad 130a electric connection; And second switch element 140b sees through the second control line 150b and the second control pad 130b electrically connects, and the 3rd on-off element 140c sees through the 3rd control line 150c and the 3rd control pad 130c electrically connects.
Hold above-mentionedly, three first distribution 110a that are connected to the same first testing cushion 120a dispose one first on-off element 140a, a second switch element 140b and one the 3rd on-off element 140c respectively.And three second distribution 110b that are connected to the same second testing cushion 120b also dispose one first on-off element 140a, a second switch element 140b and one the 3rd on-off element 140c respectively.When three first distribution 110a that the same first testing cushion 120a of test is connected; Can first control pad 130a, the second control pad 130b and the 3rd control pad 130c control the first on-off element 140a, second switch element 140b and the 3rd on-off element 140c that is disposed on the first distribution 110a, respectively three first distribution 110a that are connected to the first testing cushion 120a are done test.
Particularly; When test one first testing cushion 120a; Contact one first testing cushion 120a with probe; And close the first on-off element 140a and second switch element 140b earlier, if test result finds to have flaw, then the active component that the first distribution 110a of the 3rd on-off element 140c connected is disposed in expression has flaw.The first distribution 110a that disposes the first on-off element 140a and second switch element 140b also can the method test respectively.In like manner, three the second distribution 110b and the 3rd distribution 110c that are connected to same second testing cushion 120b and the 3rd testing cushion 120c also can test respectively by said method.
The 5th embodiment
Fig. 7 is the synoptic diagram of peripheral circuit in the fifth embodiment of the invention.What need explanation earlier is that the 5th embodiment and first embodiment are roughly the same, and in the 5th embodiment and first embodiment, same or analogous element numbers is represented same or analogous element.Below will explain that in detail something in common just repeats no more to two embodiment differences.
Please with reference to Fig. 7; Present embodiment and first embodiment different be in; The peripheral circuit 100d of present embodiment also comprises most articles the 3rd distribution 110c and most the 3rd testing cushion 120c; Wherein the 3rd testing cushion 120c is disposed between the second testing cushion 120b and the active device array 60, and the 3rd distribution 110c electrically connects the 3rd testing cushion 120c and active device array 60, and each the 3rd testing cushion 120c is electrically connected to two article of the 3rd distribution 110c at least.
In detail; Each the 3rd testing cushion 120c has one the 6th conductive layer 124c and most the 5th conductive layer 122c; Wherein the 6th conductive layer 124c is disposed on the 5th conductive layer 122c; And electrically connect each the 5th conductive layer 122c, and each article the 3rd distribution 110c is electrically connected to one the 5th conductive layer 122c, and electrically connect with active device array 60.
In the present embodiment, each the 3rd testing cushion 120c can have two the 5th conductive layer 122c, and each the 5th conductive layer 122c is connected to one article of the 3rd distribution 110c.In addition, all dispose one first distribution 110a and one second distribution 110b between per two the 5th conductive layer 122c.And the first distribution 110a and the second distribution 110b and the 6th conductive layer 124c insulation; For example; Can between the first distribution 110a and the 6th conductive layer 124c and between the second distribution 110b and the 6th conductive layer 124c insulation course be set, so that the first distribution 110a and the second distribution 110b and the 6th conductive layer 124c insulation.
Among above-mentioned each embodiment; The first distribution 110a, the second distribution 110b and the 3rd distribution 110c can be the data wirings that is connected directly to active device array 60; But those skilled in the art also can otherwise connect the first distribution 110a, the second distribution 110b and the 3rd distribution 110c, for example the first distribution 110a, the second distribution 110b and the 3rd distribution 110c is connected to the scan wiring of active device array 60.Below lift an embodiment explanation in addition.
The 6th embodiment
Fig. 8 is the synoptic diagram of peripheral circuit and scan wiring in the sixth embodiment of the invention.What need explanation earlier is that the 6th embodiment and second embodiment are roughly the same, and in the 6th embodiment and second embodiment, same or analogous element numbers is represented same or analogous element.Below will explain that in detail something in common just repeats no more to two embodiment differences.
Please with reference to Fig. 8; In the peripheral circuit 100e of present embodiment; Each first distribution 110a and each second distribution 110b are connected with the scan wiring 70 of active device array 60 with a connecting conductive layer 160 respectively; Wherein the material of connecting conductive layer 160 for example be tin indium oxide (indium tin oxide, ITO).
It should be noted that; The peripheral circuit 100e of present embodiment is not limited to above-mentioned collocation method, and those skilled in the art also can electrically connect the scan wiring 70 of the first distribution 110a among above-mentioned first to the 5th embodiment, the second distribution 110b and the 3rd distribution 110c and active device array 60.
In sum, the present invention has the following advantages with existing in comparison at least:
1. the present invention increases the width of each testing cushion with the multi-thread mode of surveying altogether; Therefore; But with the prior art higher active device array of test density in comparison, and can improve the contact nargin of probe engaged test pad, and can make between probe and testing cushion contact more firm.
2. have switch member and be disposed on each distribution, can control the switch of pad CS spare during test, so can record the flaw of active device array more accurately.
3. multi-thread survey altogether can reduce number of probes, and shortens detection time, and then reduces testing cost.
Though the present invention discloses as above with preferred embodiment; Right its is not that any those skilled in the art are not breaking away from the spirit and scope of the present invention in order to qualification the present invention; When can doing a little modification and perfect, so protection scope of the present invention is when being as the criterion with what claims defined.
Claims (10)
1. a peripheral circuit is suitable for being disposed at one and has on the substrate of an active device array, and this peripheral circuit and this active device array electrically connect, and this peripheral circuit comprises:
Most bar first distributions;
Most bar second distributions, wherein respectively this first distribution is electrically connected to this active device array respectively with this second distribution respectively;
Most first testing cushion, wherein respectively this first testing cushion comprises:
One first conductive layer, be electrically connected to adjacent said most bar first distributions wherein at least two;
One second conductive layer is disposed on this first conductive layer, and electrically connects with this first conductive layer;
Most second testing cushion are disposed between said majority first testing cushion and this active device array, and respectively this second testing cushion comprises:
Most the 3rd conductive layers, wherein said most bar first distributions are through between said majority the 3rd conductive layer, and respectively the 3rd conductive layer be electrically connected to respectively adjacent said most bar second distributions one of them; And
One the 4th conductive layer is disposed on said majority the 3rd conductive layer, and electrically connects with said majority the 3rd conductive layer, and the 4th conductive layer and said most bar first distribution are for being electrically insulated.
2. peripheral circuit as claimed in claim 1 is characterized in that, respectively the quantity of the said majority of this second testing cushion the 3rd conductive layer is two, and is electrically connected to respectively that the quantity of said most bar first distributions of this first testing cushion is two.
3. peripheral circuit as claimed in claim 2 is characterized in that, said most bar first distributions and said most bar second distribution are for being staggered.
4. peripheral circuit as claimed in claim 2; It is characterized in that; The quantity of said most bar first distributions between the 3rd conductive layer of the said majority through each second testing cushion is two, and said most bar first distribution be electrically connected to respectively two adjacent said majority first testing cushion said majority first conductive layer one of them.
5. peripheral circuit as claimed in claim 2 is characterized in that, also comprises:
One first control pad;
One second control pad;
Most first on-off element are electrically connected to this first control pad; And
A most second switch element; Be electrically connected to this second control pad; Said most bar first distributions that wherein are connected to same first testing cushion respectively via said majority first on-off element one of them with a said majority second switch element one of them and be electrically connected to this active device array, and said most bar second distributions that are connected to same second testing cushion respectively via individual first on-off element of said majority one of them and a said majority second switch element one of them and be electrically connected to this active device array.
6. peripheral circuit as claimed in claim 1 is characterized in that, the quantity of the said majority of each second testing cushion the 3rd conductive layer is three, and is electrically connected to respectively that the quantity of said most bar first distributions of this first testing cushion is three.
7. peripheral circuit as claimed in claim 6 is characterized in that, said most bar first distributions and said most bar second distribution are for being staggered.
8. peripheral circuit as claimed in claim 6 is characterized in that, also comprises:
One first control pad;
One second control pad;
One the 3rd control pad;
Most first on-off element are electrically connected to this first control pad;
A most second switch element are electrically connected to this second control pad; And
Most the 3rd on-off element; Be electrically connected to the 3rd control pad; Said most bar first distributions that wherein are connected to same first testing cushion respectively via said majority first on-off element one of them, a said majority second switch element one of them with said majority the 3rd on-off element one of them and be electrically connected to this active device array, and said most bar second distributions that are connected to same second testing cushion respectively via individual first on-off element of said majority one of them, a said majority second switch element one of them and individual the 3rd on-off element of said majority one of them and be electrically connected to this active device array.
9. peripheral circuit as claimed in claim 1 is characterized in that, also comprises:
Most article the 3rd distributions are electrically connected to this active device array;
Most the 3rd testing cushion are disposed between said majority second testing cushion and this active device array, and respectively the 3rd testing cushion comprises:
Most the 5th conductive layers, wherein said most bar first distributions and second distribution are through between individual the 5th conductive layer of said majority, and respectively the 5th conductive layer be electrically connected to respectively adjacent said most articles the 3rd distributions one of them; And
One the 6th conductive layer is disposed on said majority the 5th conductive layer, and electrically connects with said majority the 5th conductive layer, and the 6th conductive layer and said most bar first distribution and second distribution are for being electrically insulated.
10. peripheral circuit as claimed in claim 9 is characterized in that, said most bar first distributions, said most bar second distributions and said most articles the 3rd distributions are for being staggered.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2008100810658A CN101515442B (en) | 2008-02-21 | 2008-02-21 | Peripheral circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2008100810658A CN101515442B (en) | 2008-02-21 | 2008-02-21 | Peripheral circuit |
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| CN101515442A CN101515442A (en) | 2009-08-26 |
| CN101515442B true CN101515442B (en) | 2012-06-06 |
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| CN2008100810658A Expired - Fee Related CN101515442B (en) | 2008-02-21 | 2008-02-21 | Peripheral circuit |
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Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105954898B (en) * | 2016-07-01 | 2019-02-22 | 武汉华星光电技术有限公司 | Display panel and test method |
| CN106847142A (en) * | 2017-02-23 | 2017-06-13 | 武汉华星光电技术有限公司 | The detection means and detection method of gate driving circuit |
| CN110137155B (en) * | 2019-05-24 | 2021-01-22 | 福州京东方光电科技有限公司 | Array substrate mother board |
| US20220328598A1 (en) * | 2020-03-31 | 2022-10-13 | Chengdu Boe Optoelectronics Technology Co., Ltd. | Display substrate and test method thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020139567A1 (en) * | 2001-03-30 | 2002-10-03 | Samsung Electronics Co., Ltd. | Chip on film (COF) package having test pad for testing electrical function of chip and method for manufacturing same |
| CN1667423A (en) * | 2005-03-08 | 2005-09-14 | 友达光电股份有限公司 | Display test system and method |
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2008
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020139567A1 (en) * | 2001-03-30 | 2002-10-03 | Samsung Electronics Co., Ltd. | Chip on film (COF) package having test pad for testing electrical function of chip and method for manufacturing same |
| CN1667423A (en) * | 2005-03-08 | 2005-09-14 | 友达光电股份有限公司 | Display test system and method |
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| CN101515442A (en) | 2009-08-26 |
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