CN101493614A - LCD panel - Google Patents

Abstract

The invention discloses a liquid crystal display panel, which improves the phenomenon of color cast of an image by dividing a pixel into two sub-pixels and modulating the gray scale of one sub-pixel by a storage voltage signal. The liquid crystal display panel only needs to use one storage voltage signal, so that the use number of peripheral signal wires can be effectively reduced, and the layout area and the production cost of the liquid crystal display panel are further reduced.

Description

LCD panel

technical field

The present invention relates to a liquid crystal display panel, and in particular to a liquid crystal display panel which utilizes a single storage voltage signal to improve the image color shift of each pixel.

Background technique

In order to make liquid crystal displays (LCDs) have better display quality, current liquid crystal displays are developing towards the characteristics of high contrast, small color cast, high brightness, high color saturation, fast response and wide viewing angle. In terms of wide viewing angle technology, a multi-domain vertically aligned (MVA) liquid crystal display is generally used. However, when the user watches the liquid crystal display from a larger viewing angle, the seen image usually has a phenomenon of color washout, which is the color washout of the image. Among them, the reason for the formation of image color shift is that, as shown in FIG. 1 , the schematic diagram of the gamma curve of the existing liquid crystal display panel, where the gamma curve 110 is an ideal curve observed from the front direction, and the gamma curve 120 is observed from the oblique direction. curve. It can be seen from FIG. 1 that when the image is viewed obliquely, the gamma curve 120 will seriously deviate from the gamma curve 110 , thus causing the image color cast.

In order to solve the above problems, US Patent Application Early Publication No. 20040001167 proposes a pixel, wherein FIG. 2 is a schematic structural diagram of a pixel in the prior art, and FIG. 3 is a signal timing diagram for illustrating the prior art. picture. Please refer to FIG. 2 and FIG. 3 at the same time. The pixel 200 proposed in this prior art is composed of two sub-pixels 210 and 220, wherein the sub-pixel 210 includes a switch SW21, a liquid crystal capacitor CL21 and a storage capacitor CS21, and the sub-pixel 220 includes The switch SW22, the liquid crystal capacitor CL22 and the storage capacitor CS22.

Here, the sub-pixels 210 and 220 are driven by the gate signal VG _m and the source signal VS _n transmitted through the scan line GLm and the data line SLn. In order to reduce the phenomenon of image color shift, in this prior art, the storage capacitors CS21 and CS22 are electrically connected to the storage capacitor wirings SPLm and SNLm respectively, so as to use the storage voltage signals VP _m and VN _m to modulate the storage capacitors CS21 and CS22. amount of charge. When the potential of the stored voltage signal VP _m changes by a voltage difference ΔV _SP2 , the inverted signal VL ₂₁ stored in the liquid crystal capacitor CL21 will also generate a voltage difference ΔV _LC2 , where the voltage difference ΔV _LC2 =ΔV _SP2 *CS21/( CL21+CS21). By analogy, the inverted signal VL ₂₂ stored in the liquid crystal capacitor CL22 is obtained. That is to say, the prior art can correct the gray levels of the sub-pixels 210 and 220 by adjusting the potentials of the storage voltage signals VP _m and VN _m , thereby improving the phenomenon of image color shift.

FIG. 4 is a schematic diagram of a conventional liquid crystal display panel 400 using pixels 200 . Wherein, the conventional liquid crystal display panel 400 includes pixel column units 421-426 arranged in the pixel array area 410 (represented by an equivalent circuit), and peripheral signal wirings 431-436 arranged outside the pixel array area 410 (indicated by an actual circuit). layout shown). Here, the pixel column units 421 - 426 each include a plurality of pixels, and the internal structure of these pixels is the same as that of the pixel 200 (shown in FIG. 2 ). For example, the internal structure of the pixels 441 - 443 in the pixel row unit 421 is the same as that of the pixel 200 (shown in FIG. 2 ).

In actual layout, pixel 200 (drawn in FIG. 2 ) needs to use not only one scan line and one data line for driving, but also two storage capacitor lines to correct its internal sub-pixels 210 and 220. grayscale. Therefore, when the liquid crystal display panel 400 adopts the pixel 200 (drawn in FIG. 2 ) as the display element, the pixel column units 421-426 must be driven by the scanning lines GL1-GL6 and the data lines SL41-SL43. It is also necessary to electrically connect with the corresponding peripheral signal wirings 431-436 through the storage capacitor wirings 451-456 and 461-466, wherein each storage capacitor wiring passes through a contact hole (such as the marked The contact holes 471) are electrically connected with the corresponding peripheral signal wirings 431-436. Thereby, the pixel row units 421-426 can receive the corresponding storage voltage signals through the peripheral signal wirings 431-436, and then correct the gray scale of the internal pixels.

To measure the driving capability of the stored voltage signal, the liquid crystal display panel 400 adopts a plurality of peripheral signal wires 431 - 436 to provide the stored voltage signal required by the pixel row units 421 - 426 . However, in the actual layout, the delay effect formed by the parasitic capacitance and the parasitic resistance will affect the effect of improving the color shift of the image. At this time, the prior art can improve the delay effect by enlarging the width of the peripheral signal wirings 431 - 436 . However, this method will increase the layout area of the liquid crystal display panel 400 . In addition, in the prior art, the delay effect can also be improved by changing the process technology of the liquid crystal display panel 400 and increasing the thickness of the peripheral signal wires 431 - 436 . However, this method will increase the production cost of the liquid crystal display panel 400 and reduce the production efficiency.

Contents of the invention

The invention provides a liquid crystal display panel, which uses a single stored voltage signal to modulate the gray level of each pixel, thereby effectively improving the image color shift and reducing the number of peripheral signal wirings used.

The present invention provides a liquid crystal display panel, which includes N first pixel column units and N+1 peripheral signal wirings. Wherein, the N first pixel column units are arranged in the pixel array area, and the N+1 peripheral signal wires are arranged outside the pixel array area. In addition, the N first pixel column units are driven by the signals transmitted by the N first scanning wires and the plurality of data wires, and are connected by the N first storage capacitor wires and the N first common potential wires. The transmitted signal corrects its corresponding gray level, where N is an integer greater than 0.

Here, since the 1st to Nth peripheral signal wires are respectively electrically connected to the N first storage capacitor wires, and the N+1th peripheral signal wire is electrically connected to the above-mentioned N first common potentials Wiring, so the liquid crystal display panel of the present invention can effectively reduce the number of peripheral signal wiring used.

In the liquid crystal display panel of the present invention, each of the above-mentioned N first pixel column units includes a plurality of first pixels, and each first pixel in the s-th first pixel column unit is used to A signal transmitted by a storage capacitor wiring modulates its gray level, s is an integer and 1≤s≤N.

In the liquid crystal display panel of the present invention, the above-mentioned liquid crystal display panel further includes N second pixel column units arranged in the pixel array area. Wherein, the N second pixel row units are driven by the signals transmitted by the N second storage capacitor wirings and the N second common potential wirings, and are connected to the N second common potential wirings by the N second storage capacitor wirings. The signal transmitted by the potential wiring corrects the corresponding gradation.

It is worth mentioning that the second storage capacitor wires are electrically connected to the 1st to Nth peripheral signal wires respectively, and the N second common potential wires are electrically connected to the N+1th peripheral signal wires . In addition, the internal structure of the second pixel column unit is the same as that of the first pixel column unit.

The present invention uses a single storage voltage signal to adjust the gray level of each pixel, so compared with the prior art, the present invention can not only improve the phenomenon of image color shift, but also reduce the use of peripheral signal wiring number to reduce the layout area and production cost of the liquid crystal display panel.

Description of drawings

In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and understandable, the specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings, wherein:

FIG. 1 is a schematic diagram of a gamma curve of a conventional liquid crystal display panel.

FIG. 2 is a schematic structural diagram of a pixel 200 in the prior art.

FIG. 3 is a signal timing diagram for illustrating the prior art shown in FIG. 2 .

FIG. 4 is a schematic diagram of a conventional liquid crystal display panel 400 using pixels 200 as display elements.

FIG. 5 is a schematic structural diagram of a pixel 500 according to an embodiment of the present invention.

FIG. 6 is a signal timing diagram for illustrating the embodiment of FIG. 5 .

FIG. 7 is a schematic diagram of a liquid crystal display panel 700 using pixels 500 as display elements.

8 to 11 are partial schematic diagrams of the embodiment shown in FIG. 7 .

Description of main component symbols:

110, 120: gamma curve

200, 441~443, 500, 731~733: pixels

210, 220, 510, 520: sub-pixel

SW21, SW22, SW51, SW52: switch

CL21, CL22, CL51, CL52: LCD capacitors

CS21, CS22, CS51, CS52: storage capacitor

400, 700: LCD panel

410, 701: pixel array area

421~426, 711a~711n, 712a~712n: pixel column unit

431～436, 720a～720n+1: Peripheral signal wiring

SPLm, SNLm, WL5, 451~456, 461~466, 741a~741n, 742a~742n: storage capacitor wiring

471, 721: contact hole

SLn, SLn+1, SL41～SL43, SL5, SL1～SL3: data wiring

GLm, GL1～GL6, GL5, GL1a～GL1n, GL2a～GL2n: scan wiring

TL5, 751a～751n, 752a～752n: common potential wiring

VP _m , VN _m : store voltage signal

VG _m , VG ₅ : Gate signal

VS _n , VS ₅ : Source signal

VL ₂₁ , VL ₂₂ , VL ₅₁ , VL ₅₂ : Inversion signal

ΔV _SP2 , ΔV _LC2 , ΔV _SP5 , ΔV _LC5 : Voltage difference

V _com : common voltage

VD ₅ : storage voltage signal

Wd81, Wd82, Wd91, Wd92, Wd11: Width

Detailed ways

The main technical feature of the present invention is to divide a pixel into two sub-pixels, and adjust the gray scale of one of the sub-pixels to improve the phenomenon of image color shift, thereby effectively reducing the number of peripheral signal wirings used. The liquid crystal display panel of the present invention will be illustrated below, but it is not intended to limit the present invention. Those skilled in the art can slightly modify the following embodiments according to the spirit of the present invention, but they still belong to the scope of the present invention.

Before explaining the liquid crystal display panel, the pixels in the liquid crystal display panel will be explained below. FIG. 5 is a schematic structural diagram of a pixel 500 according to an embodiment of the present invention. Referring to FIG. 5 , the pixel 500 includes sub-pixels 510 and 520 , and the sub-pixel 510 includes a switch SW51 , a liquid crystal capacitor CL51 and a storage capacitor CS51 . The sub-pixel 520 includes a switch SW52, a liquid crystal capacitor CL52 and a storage capacitor CS52. Wherein, the switches SW51 and SW52 are respectively a thin film transistor.

Please continue to refer to FIG. 5 , the first terminals of the switches SW51 and SW52 are electrically connected to the data wiring SL5 , and the control terminals thereof are both electrically connected to the scanning wiring GL5 . The liquid crystal capacitor CL51 is electrically connected to the second terminal of the switch SW51 and the common voltage V _com (for example, the common voltage of the liquid crystal display panel). The storage capacitor CS51 is electrically connected between the second terminal of the switch SW51 and the storage capacitor wiring WL5. The liquid crystal capacitor CL52 is electrically connected to the second terminal of the switch SW52 and the common voltage V _com , and the storage capacitor CS52 is electrically connected between the second terminal of the switch SW52 and the common potential line TL5 .

FIG. 6 is a signal timing diagram for illustrating the embodiment of FIG. 5 , please refer to FIG. 5 and FIG. 6 at the same time. Here, the sub-pixels 510 and 520 are jointly driven by the scan line GL5 and the data line SL5 . During the driving process, the sub-pixels 510 and 520 will determine the conduction state of the switches SW51 and SW52 through the gate signal _VG5 transmitted by the scanning line GL5, so that the source signal transmitted by the data line SL5 The VS ₅ can timely charge and discharge the liquid crystal capacitors CL51 - CL52 and the storage capacitors CS51 - CS52 .

In order to reduce the phenomenon of image color shift, the sub-pixel 520 receives the common voltage V _com through the common potential wiring TL5, so that the inverted signal VL ₅₂ stored in the liquid crystal capacitor CL52 changes only with the variation of the source signal VS ₅ change its potential. In addition, the sub-pixel 510 receives a storage voltage signal VD ₅ through the storage capacitor wiring WL5 , so as to use the storage voltage signal VD ₅ to modulate the charge amounts of the storage capacitor CS51 and the liquid crystal capacitor CL51 . For example, when the potential of the stored voltage signal VD ₅ changes by a voltage difference ΔV _SP5 , the inverted signal VL ₅₁ stored in the liquid crystal capacitor CL51 will also generate a voltage difference ΔV _LC5 =0.5*ΔV _SP5 *CS51/(CL51+ CS51).

Here, although only the inversion signal VL ₅₁ stored in the liquid crystal capacitor CL51 will change its potential with the variation of the stored voltage signal VD ₅ , that is to say, only the gray scale of the sub-pixel 510 will change with the stored voltage signal VD5. VD ₅ changes. However, the grayscale of the pixel 500 is formed by mixing the grayscales of the sub-pixels 510 and 520 . Therefore, when the gray scale of the sub-pixel 510 changes with the storage voltage signal _VD5 , the gray scale of the pixel 500 will also change accordingly. That is to say, the gray scale of the pixel 500 can be adjusted according to the stored voltage signal VD ₅ , so as to improve the problem of image color shift.

FIG. 7 is a schematic diagram of a liquid crystal display panel 700 using pixels 500 as display elements. Please refer to FIG. 7 , the liquid crystal display panel 700 includes a plurality of pixel column units (represented by an equivalent circuit, and N+1 peripheral signal wires 720a to 720n+1 (represented by an actual layout diagram), where N is greater than 0 Integer. Here, each pixel column unit in the liquid crystal display panel 700 is arranged in the pixel array area 701, and peripheral signal wirings 720a-720n+1 are arranged outside the pixel array area 701. In addition, in this embodiment, every N The way that the pixel column units are regarded as a group corresponds to N+1 peripheral signal wirings 720a～720n+1. For example, FIG. 7 regards N pixel column units 711a～711n as a group, and N The pixel column units 712a-712n are regarded as another group.

Please continue to refer to FIG. 7 , the pixel row units 711 a - 711 n include a plurality of pixels, and the internal structure of these pixels is the same as that of the pixel 500 (shown in FIG. 5 ). For example, the pixel column unit 711 a includes pixels 731 - 733 . Since the internal structure of the pixels 731-733 is the same as that of the pixel 500, the pixel 731 is electrically connected to a scan line GL1a, a data line SL1, a storage capacitor line 741a, and a common potential line 751a. Similarly, the pixel 732 is electrically connected to a scan line GL1a, a data line SL2, a storage capacitor line 741a, and a common potential line 751a. By analogy, the electrical connection of each pixel in the pixel row units 711a-711n.

In addition, the peripheral signal wiring 720a is electrically connected to the storage capacitor wiring 741a, the peripheral signal wiring 720b is electrically connected to the storage capacitor wiring 741b, and the peripheral signal wiring 720n+1 is electrically connected to the common potential wiring. Lines 751a-751n. By analogy, the electrical connection methods of other peripheral signal wiring. In addition, the peripheral signal wirings 720a to 720n+1 are parallel to each other and perpendicular to the storage capacitor wirings 741a to 741n belonging to different layers. Wherein, each peripheral signal wiring is electrically connected to its corresponding storage capacitor wiring or common potential wiring through a contact hole (such as the marked contact hole 721 ).

Here, the peripheral signal wires 720 a - 720 n are not electrically connected to each other, and each of the peripheral signal wires 720 a - 720 n receives a storage voltage signal. In this way, the pixel column units 711a-711n can adjust the gray levels of their internal pixels through the storage voltage signals transmitted by the peripheral signal wires 720a-720n. For example, the pixels 731 are driven by signals transmitted from the scan line GL1a and the data line SL1. And because the peripheral signal wiring 720a is electrically connected to the storage capacitor wiring 741a, the pixel 731 can use the signal transmitted by the storage capacitor wiring 741a to modulate its gray scale. By analogy, the working principle of each pixel in the pixel column units 711a-711n.

That is to say, the pixel column units 711a-711n are driven by the signals transmitted by the N scanning lines GL1a-GL1n and the data lines SL1-SL3, and are driven by the storage capacitor lines 741a-741n and the common potential line 751a. Signals transmitted by ˜751n are used to correct the gray levels corresponding to the pixel row units 711a˜711n. Therefore, compared with the prior art, this embodiment only needs to use less peripheral signal wires to improve the phenomenon of image color shift.

Similarly, since the internal structure of the pixel row units 712a-712n is the same as that of the pixel row units 711a-711n, the pixel row units 712a-712n will also transmit the data through the N scan lines GL2a-GL2n and the data lines SL1-SL3. Signals are used for driving, and the gray scales corresponding to the pixel row units 712a-712n are corrected through the signals transmitted by the N storage capacitor wires 742a-742n and the N common-potential wires 752a-752n. Among them, the N storage capacitor wires 742a-742n are electrically connected to the N peripheral signal wires 720a-720n, and the N common potential wires 752a-752n are electrically connected to the peripheral signal wires 720n+1. .

It is worth noting that due to the reduction of peripheral signal wiring, the delay effect caused by parasitic capacitance and parasitic resistance can be reduced in this embodiment by increasing the width of peripheral signal wiring to improve image color shift. Impact. For example, if the six peripheral signal wires 720 a - 720 f in the embodiment of FIG. 7 are taken as an example (N=5), and shown as shown in FIG. 8 . Wherein, the width of the peripheral signal wires 720 a - 720 f is Wd81 , and the width of two adjacent peripheral signal wires is Wd82 . Here, as shown in FIG. 9, in order to reduce the delay effect formed by the peripheral signal wiring 720a-720f, the embodiment of FIG. Formation of delay effect, wherein width Wd91>width Wd81. Relatively, as the width Wd81 of the peripheral signal wirings 720a-720f increases, the width Wd82 of two adjacent peripheral signal wirings will correspondingly decrease, so the width Wd92 of two adjacent peripheral signal wirings in FIG. It should be smaller than the width Wd82 of two adjacent peripheral signal wirings in FIG. 8 .

In addition, compared with the prior art, if the prior art requires 2N peripheral signal wires, the present embodiment only needs (N+1) peripheral signal wires to achieve the same effect as the prior art. That is to say, this embodiment can effectively reduce the layout area of the liquid crystal display panel. In contrast, if the prior art and the present embodiment use the same layout area, and the prior art uses 2N peripheral signal wires, this embodiment can realize 2N+1 peripheral signal wires with the same layout area. Wire. That is to say, as shown in FIG. 10, when this embodiment adopts the same layout area as that of the prior art, the embodiment of FIG. 11 peripheral signal wiring lines 720a to 720k. Thereby, the driving capability of the stored voltage signal is improved, thereby enhancing the effect of improving the image color shift. Furthermore, as shown in FIG. 11, the embodiment of FIG. 8 can also modify the original width Wd82 of two adjacent peripheral signal wirings to a width Wd11, so as to improve the convenience when laying out peripheral signal wirings, wherein the width Wd11> Width Wd82.

To sum up, the present invention divides a pixel into two sub-pixels, and adjusts the gray level of one of the sub-pixels to improve the image color cast. In other words, since the present invention only needs to use one stored voltage signal to adjust the gray level of the pixel, it can effectively reduce the number of peripheral signal wires used, thereby reducing the layout area and production cost of the LCD panel.

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art may make some modifications and improvements without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection should be defined by the claims.

Claims (8)

1. display panels comprises:

N the first pixel column unit, be configured in the pixel array region, those first pixel column unit drive by the signal that N bar first scan wiring and most bar data wiring are transmitted, and the signal that is transmitted by N bar first storage capacitors distribution and the N bar first common current potential distribution, proofread and correct those first pixel column unit corresponding gray scale, wherein N is the integer greater than 0; And

N+1 bar periphery signal wiring, it is overseas to be configured in this pixel array region, and wherein, the 1st electrically connects with those first storage capacitors distributions respectively to N bar periphery signal wiring, and N+1 bar periphery signal wiring is electrically connected to those first common current potential distributions.

2. display panels as claimed in claim 1, it is characterized in that, those first pixel column unit comprise most first pixels separately, and each those first pixel in the individual first pixel column unit of s, in order to its gray scale of modulating signal of being transmitted according to the s bar first storage capacitors distribution, s is integer and 1≤s≤N.

3. display panels as claimed in claim 2 is characterized in that, t the first pixel PI in the individual first pixel column unit of s (s t) comprising:

One first sub-pixel drives by s bar first scan wiring and t bar data wiring, and this first sub-pixel receives a stored voltage signal by the s bar first storage capacitors distribution; And

One second sub-pixel drives by s bar first scan wiring and t bar data wiring, and this second sub-pixel receives the common electric voltage of this display panels by the s bar first common current potential distribution,

Wherein, (s, t) according to this its gray scale of stored voltage modulating signal, and t is the integer greater than 0 to this first pixel PI.

4. display panels as claimed in claim 3 is characterized in that, this first sub-pixel comprises:

One first switch, its first end is electrically connected to t bar data wiring, and the control end of this first switch is electrically connected to s bar first scan wiring;

One first liquid crystal capacitance is electrically connected to second end of this first switch and the common electric voltage of this display panels; And

One first storage capacitors is electrically connected between second end and the s bar first storage capacitors distribution of this first switch.

5. display panels as claimed in claim 3 is characterized in that, this second sub-pixel comprises:

One second switch, its first end is electrically connected to t bar data wiring, and the control end of this second switch is electrically connected to s bar first scan wiring;

One second liquid crystal capacitance is electrically connected to second end of this second switch and the common electric voltage of this display panels; And

One second storage capacitors is electrically connected between second end and the s bar first common current potential distribution of this second switch.

6. display panels as claimed in claim 1 is characterized in that, those peripheral signal wirings are parallel to each other, and vertical mutually with those first storage capacitors distributions that belong to different layers.

7. display panels as claimed in claim 1 is characterized in that, also comprises:

N the second pixel column unit, be configured in this pixel array region, those second pixel column unit drive by the signal that N bar second scan wiring and those data wirings transmitted, and the signal that is transmitted by N bar second storage capacitors distribution and the N bar second common current potential distribution, proofread and correct those second pixel column unit corresponding gray scale

Wherein, those second storage capacitors distributions electrically connect to N bar periphery signal wiring with the 1st respectively, and those second common current potential distributions are electrically connected to N+1 bar periphery signal wiring.

8. display panels as claimed in claim 7 is characterized in that, those second pixel column unit are identical with the inner structure of those first pixel column unit.

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