CN101488454A - Silicon oxynitride dielectric forming method - Google Patents
Silicon oxynitride dielectric forming method Download PDFInfo
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- CN101488454A CN101488454A CNA2008100326087A CN200810032608A CN101488454A CN 101488454 A CN101488454 A CN 101488454A CN A2008100326087 A CNA2008100326087 A CN A2008100326087A CN 200810032608 A CN200810032608 A CN 200810032608A CN 101488454 A CN101488454 A CN 101488454A
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- nitrogen oxide
- silicon
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- silicon oxynitride
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Abstract
The invention discloses a method for forming silicon oxynitride high-k gate dielectrics, a nitrogen oxide structure is formed in a silicon-dioxide layer between a grid and silicon base material composed of polysilicon grids. The method comprises the following steps: a nitrogen-based oxide layer featuring low N ion concentration is formed in a position which is close to an interface of silicon-dioxide and silicon-based material in the silicon-dioxide layer; a main nitrogen oxide structure featuring high N ion concentration is formed, wherein, the main nitrogen-based oxide layer prevents the N ion or N atom in the main nitrogen oxide structure from penetrating the interface of the silicon-dioxide and the silicon-based material. The method of the invention can provide high N ion concentration while ensuring that the interface of SiO2 and Si base material is not penetrated and damaged.
Description
Technical field
The present invention relates to manufacture of semiconductor, more particularly, relate to the dielectric manufacturing of silicon oxynitride.
Background technology
In order to improve the performance of device, and more and more littler along with device size, the size of gate oxide (gateoxide) is changed littler and littler on one's own initiative.But little gate oxide can cause grid current to leak by gate oxide, thus the electrical source consumption when increasing device standby significantly.In the device of 90nm grade, silicon oxynitride with high nitrogen concentration is widely used because the silicon oxynitride of high nitrogen concentration has high dielectric stability, be an effective diffused barrier layer, simultaneously its processing procedure also easily and traditional CMOS flow process combine.
In existing technology, the most frequently used plasma nitride technology is decoupled plasma nitride (DPN) processing procedure that Applied Material company provides.This DPN processing procedure can be attached to silicon dioxide SiO with the nitrogen (atom or ion) of controlled amounts
2The surface.The nitrogen that mixes in the plasma mode can be distributed in SiO usually
2Surface or or be filled near surface.But when continuous attenuation of oxide layer or voltage increase, some nitrogen under the effect of electromagnetic field (atom or ion) can gather Si and SiO
2Interface on, perhaps penetrated bed, thereby the destruction that causes interface consumption or plasma.If interface is damaged, the performance of device will reduce widely.
When above-mentioned DPN processing procedure was applied to the technology of 65nm, 45nm or smaller szie, it is obvious in particular that above-mentioned defective seems, because the gate oxide size of the device of 65nm, 45nm or smaller szie is littler, thereby given prominence to above-mentioned problem more.
A kind of main performance that the device performance that causes owing to penetrating of nitrogen (atom or ion) descends is that the nitrogen oxide dielectric is for the Si/SiO between silicon dioxide and the silicon substrate
2Interfacial penetrating.
When making device, all need in the silicon dioxide layer between grid that is constituting by polysilicon gate and the silicon substrate, form the nitrogen oxide structure usually.At present the method for formation nitrogen oxide structure commonly used comprises following several:
Nitriding and oxidizing processing procedure (NO), oxidizing annealing processing procedure (N2O), rapid thermal treatment nitriding and oxidizing processing procedure (RTNO) or rapid thermal treatment oxidizing annealing processing procedure (RTN2O), the common feature of these processing procedures are can be at SiO
2The layer near SiO
2Form the nitrogen oxide layer with the position at the interface of Si base material, this nitrogen oxide layer has low N ion concentration.Its process results is with reference to shown in Figure 1A.The shortcoming of this kind scheme is that the N ion concentration is too low, and the interface performance of the feasible device that obtains is relatively poor.
At first carry out plasma nitride preparing process, then carry out back nitride annealing process, this kind processing procedure can form the nitrogen oxide structure in the interface near SiO2 and grid silicon in the SiO2 layer, and this nitrogen oxide layer structure has high N ion concentration.In theory, at first carry out plasma nitride preparing process, then carry out back nitride annealing process and can obtain desirable silicon oxynitride dielectric, with reference to the situation shown in Figure 1B.Promptly this nitrogen oxide layer structure has sufficiently high N ion concentration, and does not penetrate SiO
2Interface with the Si base material.But in the situation of reality, above-mentioned ideal situation is difficult to reach.The process conditions that reaches above-mentioned ideal state is: lower plasma power and thicker gate oxide.In the situation of reality, be in the consideration of operating efficiency, it is infeasible using low plasma power.Simultaneously, along with size of devices is more and more littler, the thickness of gate oxide also thins down, and it is impossible that thick gate oxide is provided in undersized device.So in actual conditions, what often occur is situation shown in Fig. 1 C.N ion or N atom in the nitrogen oxide layer have penetrated SiO
2Interface with the Si base material.If SiO
2Penetrated with the interface of Si base material, the interface performance of device can descend significantly because the interface is destroyed so, even poorer than the situation shown in Figure 1A.
So, in existing technology, can't provide a kind of suitable silicon oxynitride dielectric manufacturing process, can obtain higher N ion concentration, the interface that can not penetrate SiO2 and Si base material is arranged.
Summary of the invention
The present invention aims to provide a kind of nitrogen oxide structure that high N ion concentration can be provided simultaneously, can prevent that again the nitrogen oxide structure from penetrating the processing procedure at the interface of SiO2 and Si base material.
According to an aspect of the present invention, provide a kind of silicon oxynitride dielectric formation method, in the silicon dioxide layer between grid that is constituting by polysilicon gate and the silicon substrate, form the nitrogen oxide structure, this method comprises: the position near the interface of silicon dioxide and silicon substrate in described silicon dioxide layer forms basic nitrogen oxide layer, and this base nitrogen oxide layer has low N ion concentration; Form main nitrogen oxide structure, this main nitrogen oxide structure has high N ion concentration; Wherein, this base nitrogen oxide layer prevents the interface that N ion in this main nitrogen oxide structure or N atom penetrate this silicon dioxide and silicon substrate.
This base nitrogen oxide layer is made by one of them of following processing procedure: nitriding and oxidizing processing procedure, oxidizing annealing processing procedure, rapid thermal treatment nitriding and oxidizing processing procedure or rapid thermal treatment oxidizing annealing processing procedure.
This main nitrogen oxide structure is made by following processing procedure: at first carry out plasma nitride preparing process, then carry out back nitride annealing process.
This method is applied to 45nm or littler device is made in the processing procedure.Wherein, the thickness of the gate oxide of this 45nm or littler device is not more than 10
Adopt technical scheme of the present invention, at first can form basic nitrogen oxide layer in position near the interface of silicon dioxide and silicon substrate, this base nitrogen oxide layer can effectively stop N ion or atom for the penetrating of the interface of SiO2 and Si base material, thereby the interface of guaranteeing SiO2 and Si base material when high N ion concentration is provided is not penetrated destruction.
Description of drawings
The above and other features of the present invention, character and advantage will become more obvious by the description below in conjunction with drawings and Examples, in the accompanying drawings, identical Reference numeral is represented identical feature all the time, wherein,
Figure 1A-1C shows the effect of various processing procedures making silicon oxynitride structures in the prior art;
Fig. 2 shows the flow chart of an embodiment of the dielectric formation method of silicon oxynitride of the present invention.
Fig. 3 A-3B shows the effect that the dielectric formation method of silicon oxynitride according to the present invention is made the silicon oxynitride structure.
Embodiment
The silicon dioxide layer that the dielectric formation method 100 of silicon oxynitride of the present invention is used between grid that is being made of polysilicon gate and silicon substrate forms the nitrogen oxide structure, and with reference to shown in Figure 2, an embodiment of this method comprises:
102. the position near the interface of silicon dioxide and silicon substrate in silicon dioxide layer forms basic nitrogen oxide layer, this base nitrogen oxide layer has low N ion concentration.This base nitrogen oxide layer is made by one of them of following processing procedure: nitriding and oxidizing processing procedure (NO), oxidizing annealing processing procedure (N2O), rapid thermal treatment nitriding and oxidizing processing procedure (RTNO) or rapid thermal treatment oxidizing annealing processing procedure (RTN2O).Fig. 3 A has disclosed this step ground implementation result, and the effect of itself and Figure 1A is approaching.
104. form main nitrogen oxide structure, this main nitrogen oxide structure has high N ion concentration.This main nitrogen oxide structure is made by following processing procedure: at first carry out plasma nitride preparing process, then carry out back nitride annealing process.Fig. 3 B has disclosed this step ground implementation result, and the effect of itself and Figure 1B or Fig. 1 C is approaching.But what should be noted that a bit is, the basic nitrogen oxide layer of Xing Chenging effectively prevents the interface that N ion in this main nitrogen oxide structure or N atom penetrate this SiO2 and Si base material before.So, in the solution of the present invention,, also can be used for the thickness of less gate oxide because the existence of basic nitrogen oxide layer can be used higher plasma energy.Can be applicable to 45nm or littler device is made in the processing procedure such as this method, in these devices, the thickness of gate oxide is not more than 10
Adopt technical scheme of the present invention, at first can form basic nitrogen oxide layer in position near the interface of silicon dioxide and silicon substrate, this base nitrogen oxide layer can effectively stop N ion or atom for the penetrating of the interface of SiO2 and Si base material, thereby the interface of guaranteeing SiO2 and Si base material when high N ion concentration is provided is not penetrated destruction.
The foregoing description provides to being familiar with the person in the art and realizes or use of the present invention; those skilled in the art can be under the situation that does not break away from invention thought of the present invention; the foregoing description is made various modifications or variation; thereby protection scope of the present invention do not limit by the foregoing description, and should be the maximum magnitude that meets the inventive features that claims mention.
Claims (5)
1. the dielectric formation method of silicon oxynitride forms the nitrogen oxide structure in the silicon dioxide layer between grid that is being made of polysilicon gate and the silicon substrate, and this method comprises:
Position near the interface of silicon dioxide and silicon substrate in described silicon dioxide layer forms basic nitrogen oxide layer, and this base nitrogen oxide layer has low N ion concentration;
Form main nitrogen oxide structure, this main nitrogen oxide structure has high N ion concentration;
Wherein, this base nitrogen oxide layer prevents the interface that N ion in this main nitrogen oxide structure or N atom penetrate this silicon dioxide and silicon substrate.
2. the dielectric formation method of silicon oxynitride as claimed in claim 1 is characterized in that, this base nitrogen oxide layer is made by one of them of following processing procedure:
The nitriding and oxidizing processing procedure;
The oxidizing annealing processing procedure;
Rapid thermal treatment nitriding and oxidizing processing procedure; Perhaps
Rapid thermal treatment oxidizing annealing processing procedure.
3. the dielectric formation method of silicon oxynitride as claimed in claim 1 is characterized in that, this main nitrogen oxide structure is made by following processing procedure:
At first carry out plasma nitride preparing process;
Then carry out back nitride annealing process.
4. the dielectric formation method of silicon oxynitride as claimed in claim 1 is characterized in that, this method is applied to 45nm or littler device is made in the processing procedure.
5. the dielectric formation method of silicon oxynitride as claimed in claim 1 is characterized in that, the thickness of the gate oxide of this 45nm or littler device is not more than
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| CNA2008100326087A CN101488454A (en) | 2008-01-14 | 2008-01-14 | Silicon oxynitride dielectric forming method |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103426784A (en) * | 2012-05-24 | 2013-12-04 | 上海宏力半导体制造有限公司 | Method for measuring nitrogen content of ultra-thin gate SiON film |
| CN103489771A (en) * | 2013-09-22 | 2014-01-01 | 上海华力微电子有限公司 | Silicon oxynitride insulation structure and manufacturing method thereof |
| CN103972071A (en) * | 2014-04-22 | 2014-08-06 | 上海华力微电子有限公司 | Manufacturing method for nitrogenous grid electrode oxidation layer |
| CN104183470A (en) * | 2013-05-21 | 2014-12-03 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor device manufacturing method |
-
2008
- 2008-01-14 CN CNA2008100326087A patent/CN101488454A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103426784A (en) * | 2012-05-24 | 2013-12-04 | 上海宏力半导体制造有限公司 | Method for measuring nitrogen content of ultra-thin gate SiON film |
| CN104183470A (en) * | 2013-05-21 | 2014-12-03 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor device manufacturing method |
| CN104183470B (en) * | 2013-05-21 | 2017-09-01 | 中芯国际集成电路制造(上海)有限公司 | A kind of manufacture method of semiconductor devices |
| CN103489771A (en) * | 2013-09-22 | 2014-01-01 | 上海华力微电子有限公司 | Silicon oxynitride insulation structure and manufacturing method thereof |
| CN103972071A (en) * | 2014-04-22 | 2014-08-06 | 上海华力微电子有限公司 | Manufacturing method for nitrogenous grid electrode oxidation layer |
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Open date: 20090722 |