CN1953208A - Metal-oxide semiconductor transistor component - Google Patents
Metal-oxide semiconductor transistor component Download PDFInfo
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- CN1953208A CN1953208A CN 200510118120 CN200510118120A CN1953208A CN 1953208 A CN1953208 A CN 1953208A CN 200510118120 CN200510118120 CN 200510118120 CN 200510118120 A CN200510118120 A CN 200510118120A CN 1953208 A CN1953208 A CN 1953208A
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Abstract
The invention relates to a metal oxide semi-conductor transistor, which comprises substrate, grid, space wall, source/leak area, and buffer layer. Wherein, grid is on substrate; the grid comprises a grid pole and a grid dielectric layer between grid and substrate; the space wall is on the side wall of grid; the source/leak area is inside the substrate at two sides of space wall; the buffer layer is around the source/leak area; the source/leak area and buffer layer are made from same material, while the doping density of source/leak area is higher than doping density of buffer layer.
Description
Technical field
The present invention relates to a kind of semiconductor element, relate in particular to a kind of metal-oxide semiconductor transistor component.
Background technology
Metal oxide semiconductor transistor is a very important element in present very lagre scale integrated circuit (VLSIC) (VLSI) technology.The scope of its application very extensively, every microprocessor, semiconductor memery device, power component or the like, all can metal oxide semiconductor transistor as its basic element.Metal oxide semiconductor transistor can be divided into P-type mos transistor AND gate N type metal oxide semiconductor transistor basically.The P-type mos transistor has the source/drain regions of trivalent impurities such as doped with boron, and N type metal oxide semiconductor transistor has the source/drain regions of pentavalent impurity such as Doping Phosphorus or arsenic.
Yet the phosphorus that is mixed in the source/drain regions, arsenic or boron as heat treatment etc., tend to diffuse in the channel region, and cause component breakdown (device punch) in follow-up technology, influence element efficiency.
Summary of the invention
The purpose of this invention is to provide a kind of metal-oxide semiconductor transistor component, can avoid doping in the source/drain to penetrate in the substrate and influence element efficiency.
The present invention proposes a kind of metal-oxide semiconductor transistor component, comprises a substrate, a grid structure, a clearance wall, source and a barrier layer.Grid structure is disposed on the substrate.Grid structure comprise a grid and be disposed at grid and substrate between one deck gate dielectric layer.Clearance wall is disposed on the sidewall of grid structure.Source/drain regions is disposed in the substrate of clearance wall two sides.Barrier layer is around around the source/drain regions, and wherein source/drain regions is identical with the material of barrier layer, and the doping content of source/drain regions is greater than the doping content of barrier layer.
According to the described metal-oxide semiconductor transistor component of the embodiment of the invention, the above-mentioned source/drain regions and the material of barrier layer for example are germanium silicide (SiGe).
According to the described metal-oxide semiconductor transistor component of the embodiment of the invention, the dopant of above-mentioned source/drain regions for example is a boron (B).
According to the described metal-oxide semiconductor transistor component of the embodiment of the invention, the doping content of above-mentioned barrier layer for example is 0.
According to the described metal-oxide semiconductor transistor component of the embodiment of the invention, the above-mentioned source/drain regions and the material of barrier layer for example are carborundum (SiC).
According to the described metal-oxide semiconductor transistor component of the embodiment of the invention, the dopant of above-mentioned source/drain regions for example is phosphorus (P) or arsenic (As).
According to the described metal-oxide semiconductor transistor component of the embodiment of the invention, the doping content of above-mentioned barrier layer for example is 0.
According to the described metal-oxide semiconductor transistor component of the embodiment of the invention, the surface of above-mentioned source/drain regions for example is the surface that is higher than substrate.
According to the described metal-oxide semiconductor transistor component of the embodiment of the invention, above-mentioned substrate for example is to be selected from P type doped silicon substrate, N type doped silicon substrate, the epitaxial silicon substrate, silicon substrate (SOI) is arranged on the insulating barrier, silicon carbide substrates is arranged on the insulating barrier, the germanium silicide substrate is arranged on the insulating barrier, the epitaxial silicon substrate is arranged on the insulating barrier, GaAs (GaAs) substrate, indium phosphide (InP) substrate, the germanium silicide substrate, by germanium metal level and the formed substrate of silicon layer that is positioned at germanium metal level below, by silicon carbide layer and the formed substrate of silicon layer that is positioned at the silicon carbide layer below, the group of being formed by silicon carbide layer and the formed substrate of silicon layer that is positioned at silicon carbide layer below and by germanium silicide layer and the formed substrate of silicon layer that is positioned at the germanium silicide layer below one of them.
According to the described metal-oxide semiconductor transistor component of the embodiment of the invention, the material of above-mentioned grid for example be selected from group that polysilicon, metal, multi-crystal silicification metal and polysilicon and the formed composite bed of metal nitride formed one of them.
According to the described metal-oxide semiconductor transistor component of the embodiment of the invention, the material of above-mentioned nitrided metal layer for example is a titanium nitride (TiN).
According to the described metal-oxide semiconductor transistor component of the embodiment of the invention, the material of above-mentioned gate dielectric layer for example is silica, silicon oxynitride or high dielectric constant material.
According to the described metal-oxide semiconductor transistor component of the embodiment of the invention, above-mentioned high dielectric constant material for example is tantalum oxide (Ta
2O
5) or barium strontium titanium salt ((BaSr) TiO
3, BST).
According to the described metal-oxide semiconductor transistor component of the embodiment of the invention, the material of above-mentioned clearance wall for example is silica or silicon nitride.
According to the described metal-oxide semiconductor transistor component of the embodiment of the invention, also comprise one deck metal silicide layer, be disposed on the source/drain regions.
According to the described metal-oxide semiconductor transistor component of the embodiment of the invention, the material of above-mentioned metal silicide layer for example is tungsten silicide (WSi), titanium silicide (TiSi), cobalt silicide (CoSi), molybdenum silicide (MoSi), nickle silicide (NiSi), palladium silicide (PdSi) or platinum silicide (PtSi).
According to the described metal-oxide semiconductor transistor component of the embodiment of the invention, also comprise one dielectric layer, be disposed on the substrate.
According to the described metal-oxide semiconductor transistor component of the embodiment of the invention, the material of above-mentioned dielectric layer for example is silica, boron-phosphorosilicate glass (BPSG), phosphorosilicate glass (PSG) or advanced low-k materials.
According to the described metal-oxide semiconductor transistor component of the embodiment of the invention, above-mentioned advanced low-k materials for example is carbonado (black diamond), aromatic hydrocarbons (SiLK), porousness aromatic hydrocarbons (porous-SiLK), silane sesquichloride (hydrogensilsesquioxane, HSQ) or methyl silicon sesquichloride (Methyl SilsesQuioxane, MSQ).
In metal oxide semiconductor transistor of the present invention, have boron doped germanium silicide or have the carborundum of phosphorus or arsenic doping as source/drain regions in the employing of P-type mos transistor area in the employing of N type metal oxide semiconductor transistor area, can be in metal-oxide semiconductor transistor component form compression stress (compressive stress) in the P-type mos transistor along channel direction, or form tensile stress along channel direction in N type metal oxide semiconductor transistor, with the mobility (mobility) of increase hole or electronics, and then increase drive current (drivecurrent) with lift elements usefulness.In addition, when the doping in the source/drain regions was healed near channel region, the suffered stress of raceway groove was then healed big, and then element efficiency is better.
In addition, the present invention is around source/drain regions, disposing one deck is the barrier layer of material with germanium silicide or carborundum, therefore when metal-oxide semiconductor transistor component of the present invention when carrying out subsequent technique such as heat treatment etc., the boron that is mixed in the source/drain regions, phosphorus or arsenic can or not diffuse in the raceway groove because stopping of barrier layer arranged, avoid causing the situation of component breakdown to take place, and can keep higher strained-channel (strained channel) and the enhancement element efficiency.
For above-mentioned and other purposes, feature and advantage of the present invention can be become apparent, embodiment cited below particularly, and conjunction with figs. are described in detail below.
Description of drawings
Figure 1A is the generalized section according to the metal-oxide semiconductor transistor component that one embodiment of the invention illustrated;
Figure 1B is the generalized section according to the metal-oxide semiconductor transistor component that another embodiment of the present invention illustrated;
Fig. 1 C is the generalized section according to the metal-oxide semiconductor transistor component that further embodiment of this invention illustrated;
Fig. 1 D is the generalized section according to the metal-oxide semiconductor transistor component that yet another embodiment of the invention illustrated;
Fig. 1 E is the generalized section according to the metal-oxide semiconductor transistor component that yet another embodiment of the invention illustrated;
Fig. 2 A to Fig. 2 C is the making flow process profile according to the metal-oxide semiconductor transistor component that the embodiment of the invention illustrated.
The main element symbol description
20a, 20b, 20c, 20d, 20e: metal oxide semiconductor transistor
22: channel layer
23: insulating barrier
25: polysilicon layer
26: nitrided metal layer
200: substrate
201: silicon
202: grid structure
203: stressor layers
203a, 203b: grid
204: clearance wall
205: gate dielectric layer
206: source/drain
207: conductor material layer
208: barrier layer
209: opening
210: dielectric layer
212: metal silicide layer
Embodiment
Figure 1A is the generalized section according to the metal-oxide semiconductor transistor component that one embodiment of the invention illustrated.Please refer to Figure 1A, metal oxide semiconductor transistor 20a comprises substrate 200, grid structure 202, clearance wall 204, conductor layer 206 and barrier layer 208.Substrate 200 for example is P type doped silicon substrate, N type doped silicon substrate, epitaxial silicon substrate, gallium arsenide substrate, indium phosphide substrate or germanium silicide substrate, wherein the dopant of P type doped silicon substrate is a boron for example, and the dopant of N type doped silicon substrate for example is phosphorus or arsenic.
In addition, generally also can on substrate 200, dispose one dielectric layer 210 and cover metal oxide semiconductor transistor 20a.The material of dielectric layer 210 for example is silica, boron-phosphorosilicate glass, phosphorosilicate glass or dielectric constant k less than 4 advanced low-k materials.Advanced low-k materials for example is carbonado (black diamond), Coral, aromatic hydrocarbons (SiLK, The Dow ChemicalCo. company makes), porousness aromatic hydrocarbons, silane sesquichloride or methyl silicon sesquichloride.
Please refer to Figure 1B, in addition, can also on source/drain regions 206, dispose one deck metal silicide layer 212 among the metal-oxide semiconductor transistor component 20b, to reduce its sheet resistance.The material of metal silicide layer 212 for example is tungsten silicide, titanium silicide, cobalt silicide, molybdenum silicide, nickle silicide, palladium silicide or platinum silicide.
Please refer to Fig. 1 C, in addition, the substrate among the metal-oxide semiconductor transistor component 20c also can be the substrate with the lamination layer structure that is made of silicon 201, insulating barrier 23 and channel layer 22.Channel layer 22 for example is silicon epitaxial layers, germanium silicide layer or silicon carbide layer, that is the substrate of this lamination layer structure for example is to have on the insulating barrier to have on germanium silicide substrate or the insulating barrier on epitaxial silicon substrate, the insulating barrier silicon carbide substrates is arranged.
Please refer to Fig. 1 D, in another embodiment, the substrate of the two-layer structure that can be silicon 201 be constituted with stressor layers 203 of the substrate among the metal-oxide semiconductor transistor component 20d, wherein stressor layers 203 can be germanium metal level, germanium silicide layer or silicon carbide layer.
In addition, in another embodiment, the grid 203a among the metal oxide semiconductor transistor 20a can also be replaced with lamination layer structure.Please refer to Fig. 1 E, the grid 203b among the metal oxide semiconductor transistor 20e for example by one deck polysilicon layer 25 be disposed at the composite bed that one deck nitrided metal layer 26 under the polysilicon layer 25 is formed.The material of nitrided metal layer 26 for example is a titanium nitride.
In addition, identical with metal-oxide semiconductor transistor component 20b is also can dispose one deck metal silicide layer on the source/drain regions in each above-mentioned metal-oxide semiconductor transistor component.Moreover, in the accompanying drawing, all the apparent height with substrate is identical on the surface of the source/drain regions 206 in metal oxide semiconductor transistor 20a, 20b, 20c, 20d and 20e, and in other embodiments, the surface of source/drain regions also can be higher than the surface of substrate.
What deserves to be mentioned is that above-mentioned various substrates and grid can be arranged in pairs or groups arbitrarily according to user's demand.
To be example below, the manufacture method of metal-oxide semiconductor transistor component of the present invention will be done detailed explanation with metal-oxide semiconductor transistor component 20a.
Fig. 2 A to Fig. 2 C is the making flow process profile according to the metal-oxide semiconductor transistor component that the embodiment of the invention illustrated.Please refer to Fig. 2 A, at first, provide substrate 200.Then, on substrate 200, form gate dielectric layer 205 and conductor material layer 207 in regular turn.
Then, please refer to Fig. 2 B, conductor material layer 207 and gate dielectric layer 205 are carried out etch process, comprise the grid structure 202 of grid 203a and gate dielectric layer 205 with formation.Then, on the sidewall of grid structure 202, form clearance wall 204.Afterwards, in the substrate of clearance wall 202 2 sides, form opening 209.What deserves to be mentioned is that in another embodiment, grid 203a also can use the mode of displacement grid (replacegate) to form.
Then, please refer to Fig. 2 C, on the surface of opening 209, form one deck barrier layer 208.The generation type of barrier layer 208 for example is a chemical vapour deposition technique.After forming barrier layer 208, proceed deposition and feed impurity gas simultaneously, to form source/drain regions 206.Afterwards, on substrate 200, form dielectric layer 210 again.
In sum, in metal-oxide semiconductor transistor component of the present invention, employing be doped with the germanium silicide of boron be doped with phosphorus or the carborundum of arsenic as P type or N type metal oxide semiconductor transistor source/drain region, not only can in the P-type mos transistor, produce compression stress along channel direction, or form tensile stress along channel direction at N type metal oxide semiconductor transistor, to increase the mobility of hole or electronics, and then increase drive current, and around source/drain regions, disposing one deck is the barrier layer of material with germanium silicide or carborundum, make metal-oxide semiconductor transistor component of the present invention when carrying out subsequent technique, as heat treatment etc., the boron that is mixed in the source/drain regions, phosphorus or arsenic can or not produce the phenomenon of diffusion and infiltrate in the raceway groove because stopping of barrier layer arranged, avoid causing the situation of component breakdown to take place, and then can keep higher strained-channel to promote element efficiency.
Though the present invention discloses as above with embodiment; right its is not in order to qualification the present invention, any those skilled in the art, under the premise without departing from the spirit and scope of the present invention; can do a little change and retouching, so protection scope of the present invention is as the criterion when looking the claims person of defining.
Claims (19)
1. metal-oxide semiconductor transistor component comprises:
One substrate;
One grid structure is disposed on this substrate, this grid structure comprise a grid and be disposed at this grid and this substrate between a gate dielectric layer;
One clearance wall is disposed on the sidewall of this grid structure;
Source is disposed in the substrate of these clearance wall two sides; And
One barrier layer, around this source/drain regions,
Wherein this source/drain regions is identical with the material of this barrier layer, and the doping content of this source/drain regions is greater than the doping content of this barrier layer.
2. metal-oxide semiconductor transistor component as claimed in claim 1, wherein the material of this source/drain regions and this barrier layer comprises germanium silicide.
3. metal-oxide semiconductor transistor component as claimed in claim 2, wherein the doping of this source/drain regions comprises boron.
4. metal-oxide semiconductor transistor component as claimed in claim 2, wherein the doping content of this barrier layer is 0.
5. metal-oxide semiconductor transistor component as claimed in claim 1, wherein the material of this source/drain regions and this barrier layer comprises carborundum.
6. metal-oxide semiconductor transistor component as claimed in claim 5, wherein the doping of this source/drain regions comprises phosphorus or arsenic.
7. metal-oxide semiconductor transistor component as claimed in claim 5, wherein the doping content of this barrier layer is 0.
8. metal-oxide semiconductor transistor component as claimed in claim 1, wherein the surface of this source/drain regions is higher than the surface of this substrate.
9. metal-oxide semiconductor transistor component as claimed in claim 1, wherein this substrate is to be selected from P type doped silicon substrate, N type doped silicon substrate, silicon substrate is arranged on the insulating barrier, silicon carbide substrates is arranged on the insulating barrier, the germanium silicide substrate is arranged on the insulating barrier, gallium arsenide substrate, the indium phosphide substrate, the germanium silicide substrate, by a germanium metal level and the formed substrate of silicon layer that is positioned at this germanium metal level below, the group of being formed by a silicon carbide layer and the formed substrate of silicon layer that is positioned at this silicon carbide layer below and by a germanium silicide layer and the formed substrate of silicon layer that is positioned at this germanium silicide layer below one of them.
10. metal-oxide semiconductor transistor component as claimed in claim 1, wherein the material of this grid be selected from group that polysilicon, metal, multi-crystal silicification metal and polysilicon and the formed composite bed of a metal nitride formed one of them.
11. metal-oxide semiconductor transistor component as claimed in claim 10, wherein this metal nitride comprises titanium nitride.
12. metal-oxide semiconductor transistor component as claimed in claim 1, wherein the material of this gate dielectric layer comprises silica, silicon oxynitride or a high dielectric constant material.
13. metal-oxide semiconductor transistor component as claimed in claim 12, wherein this high dielectric constant material comprises tantalum oxide or barium strontium titanium salt.
14. metal-oxide semiconductor transistor component as claimed in claim 1, wherein the material of this clearance wall comprises silica or silicon nitride.
15. metal-oxide semiconductor transistor component as claimed in claim 1 also comprises a metal silicide layer, is disposed on this source/drain regions.
16. metal-oxide semiconductor transistor component as claimed in claim 15, wherein the material of this metal silicide layer comprises tungsten silicide, titanium silicide, cobalt silicide, molybdenum silicide, nickle silicide, palladium silicide or platinum silicide.
17. metal-oxide semiconductor transistor component as claimed in claim 1 also comprises a dielectric layer, is disposed on this substrate.
18. metal-oxide semiconductor transistor component as claimed in claim 17, wherein the material of this dielectric layer comprises silica, boron-phosphorosilicate glass, phosphorosilicate glass or an advanced low-k materials.
19. metal-oxide semiconductor transistor component as claimed in claim 18, wherein this advanced low-k materials comprises carbonado, aromatic hydrocarbons, porousness aromatic hydrocarbons, silane sesquichloride or methyl silicon sesquichloride.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200510118120 CN1953208A (en) | 2005-10-20 | 2005-10-20 | Metal-oxide semiconductor transistor component |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200510118120 CN1953208A (en) | 2005-10-20 | 2005-10-20 | Metal-oxide semiconductor transistor component |
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|---|---|
| CN1953208A true CN1953208A (en) | 2007-04-25 |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102347351A (en) * | 2010-07-21 | 2012-02-08 | 台湾积体电路制造股份有限公司 | High surface dopant concentration semiconductor device and method of fabricating |
| CN102456731A (en) * | 2010-10-18 | 2012-05-16 | 联华电子股份有限公司 | Semiconductor structure and manufacture method thereof |
| CN102569418A (en) * | 2012-02-07 | 2012-07-11 | 清华大学 | Schottky barrier transistor possessing carbonic insulating layer and manufacturing method thereof |
-
2005
- 2005-10-20 CN CN 200510118120 patent/CN1953208A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102347351A (en) * | 2010-07-21 | 2012-02-08 | 台湾积体电路制造股份有限公司 | High surface dopant concentration semiconductor device and method of fabricating |
| CN102456731A (en) * | 2010-10-18 | 2012-05-16 | 联华电子股份有限公司 | Semiconductor structure and manufacture method thereof |
| CN102569418A (en) * | 2012-02-07 | 2012-07-11 | 清华大学 | Schottky barrier transistor possessing carbonic insulating layer and manufacturing method thereof |
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Open date: 20070425 |