CN101483381B - Combined structure - Google Patents
Combined structure Download PDFInfo
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- CN101483381B CN101483381B CN 200810003217 CN200810003217A CN101483381B CN 101483381 B CN101483381 B CN 101483381B CN 200810003217 CN200810003217 CN 200810003217 CN 200810003217 A CN200810003217 A CN 200810003217A CN 101483381 B CN101483381 B CN 101483381B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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Abstract
The present invention discloses a combined circuit, which comprises an inductive element, a connecting prime conductor and a first electronic component, wherein the inductive element is arranged on a unit load device. The connecting prime conductor is used to clad a first surface of the inductive element; the first electronic component is arranged on the inductive element; the combined circuit is electronically connected to a carrier through connecting the prime conductor.
Description
Technical field
The present invention is about a kind of electronic component and use this combination of elements formula circuit, and is more detailed, about a kind of electronic component and combined circuit that reduces the electronic component overall dimensions with the power density that promotes whole power supply.
Background technology
General electrical equipment adopts AC power, and this AC power just can be supplied with each inner electronic component of electrical equipment, to satisfy its different electricity needs after via interchange direct current transducer (AC to DC converter) being converted into the array DC power supply.Yet, having the part loss during owing to power source conversion, the conversion efficiency that converts the output of many group DC power supplys to is not high.Therefore,, convert this group DC power supply to array required DC power supply again, then can significantly raise the efficiency if make to convert to earlier one group of DC power supply into.Except that this, the portable electronic product uses DC power supply (that is battery) to supply with electric power to internal circuit.Likewise; For cooperating the different direct voltage demand of internal circuit; Just the voltage transitions that need use DC-to-dc converter (DC to DC converter) that battery is provided is the array direct voltage, and direct current transducer comprises step-down (Buck) transducer, (Boost) transducer that boosts, buck (Buck-Boost) transducer.
Along with developing rapidly of power technology, electric pressure converter is also increasingly high to the requirement of power density and transducer size.The method that improves power density has a variety of; Method commonly used is to improve the power density of power supply through the characteristic that changes the power sourced electric aspect, for example improves the operating frequency of transducer and improves power density with the size that reduces some passive devices (for example inductance) significantly.Yet the factor that in fact influences power density and the efficient of direct current transducer also comprises the factor of a lot of mechanisms aspect such as the size of each element itself and structural design of whole electric pressure converter or the like.Below said (Point Of Load, POL) DC-to-dc converter (DC-DC converter) is this problem of example explanation with the POL in the direct current transducer of electric pressure converter.
Fig. 1 is the circuit diagram of a POL DC-to-dc converter, and it is a step-down controller (Buck converter).This POL DC-to-dc converter 1 comprises an inductance 11, two switch elements 12,15 (such as mos field effect transistor (Metal Oxide Semiconductor Field Effect Transistor, MOSFET)), an output capacitance 13 and a control chip 14.Control chip 14 is through receiving an output feedback signal and relevant voltage adjustment control signal V
Adj, with the running of control load point DC-to-dc converter 1.
Fig. 2 A and Fig. 2 B are respectively overlooking of a kind of traditional load point DC-to-dc converter and upward view.This traditional load point DC-to-dc converter 2 encapsulates with a kind of combined circuit, and the pin of its input and output is traditional plug-in mounting pin (Through hole pin).As shown in the figure, POL DC-to-dc converter 2 comprises a control chip 21, a circuit board 22, four input and output electric capacity 23, several plug-in mounting pins 24, a magnetic element (being inductance in this example) 25 and two switch elements 27.Control chip 21 and output capacitance 23 are arranged at carrier 22 and (are generally the one side of a printed circuit board (PCB) (Printed Circuit Board, PCB)), then are provided with magnetic element 25 and two switch elements 27 at the another side of circuit board 22.
POL DC-to-dc converter 2 is through several plug-in mounting pin 24 plug-in mounting to main circuit boards (scheming not shown).Yet plug-in mounting pin 24 can occupy a part of area on circuit board 22 surfaces; In addition, pin 24 has supporting role, so circuit board 22 needs certain thickness, has consequently increased the volume of POL DC-to-dc converter 2, more reduces its overall power density.
Another kind of conventional negative loading point DC-to-dc converter overlook with upward view then such as Fig. 3 A and Fig. 3 B announcement.This kind traditional load point DC-to-dc converter 3 encapsulates with another kind of combined circuit, and the pin of its input and output is waveform pin (Wave pin), and pin is attached to the surface of circuit board.As shown in the figure, POL DC-to-dc converter 3 comprises three electric capacity 31 (comprising output capacitance and/or input capacitance), a switch element 32, a plurality of waveform pin 33, a carrier 34, a magnetic element 35 and a control chip 36.Electric capacity 31, switch element 32 and magnetic element 35 are arranged at the one side of carrier 34 (being generally a printed circuit board (PCB)), then are provided with control chip 36 in the other one side of carrier 34.POL DC-to-dc converter 3 sees through waveform pin 33 and is connected with main circuit board (scheming not shown).
Yet this waveform pin 33 is except meeting occupies the certain space of circuit board 34, and waveform pin 33 itself has certain height, and these all can increase the volume of POL DC-to-dc converter 3, and reduces its power density.
In sum, in the existing packaged type, the POL DC-to-dc converter all is subject to pin, makes that overall volume is big and power density is lower.Hereat, for solving these problems, propose a kind of novel combined circuit, in order to the power density of lifting electronic installation (especially electric pressure converter), and dwindle overall dimensions, just the field is needed badly for this reason.
Summary of the invention
A purpose of the present invention provides a kind of combined circuit that is used for a carrier, and this combined circuit is applied to direct current transducer, integrates integrated level with the element that improves direct current transducer, and overall dimensions, the bring to power density of dwindling direct current transducer.Above-mentioned direct current transducer is a decompression DC transducer, especially a POL decompression DC transducer.
For reaching above-mentioned purpose, the present invention just proposes a kind of combined circuit, comprises an inductive element and one first electronic component.Inductive element comprises a bonding conductor, and in order to a first surface of coating inductive element, and this first surface comprises a part of upper surface, a part of lower surface and a part of side.First electronic component places on the inductive element, and is electrically connected to this inductive element.The inductive element and first electronic component are electrically connected to carrier through bonding conductor.
Another object of the present invention provides a kind of electronic component that is applied to a combined circuit.For reaching this purpose; Electronic component of the present invention comprises an electronic component main body and a bonding conductor; First surface in order to the coated electric components main body; And this first surface comprises a part of upper surface, a part of lower surface and a part of side, and wherein the electronic component main body is electrically connected to a carrier through bonding conductor.
Behind the execution mode of consulting accompanying drawing and describing subsequently, have common knowledge the knowledgeable in the technical field under the present invention and just can understand the object of the invention, and technological means of the present invention and enforcement aspect.
Description of drawings
Fig. 1 is the circuit diagram of conventional negative loading point module power supply;
Fig. 2 A is the vertical view that tradition adopts the POL DC-to-dc converter of plug-in mounting pin;
Fig. 2 B is the upward view that tradition adopts the POL DC-to-dc converter of plug-in mounting pin;
Fig. 3 A is the vertical view that tradition adopts the POL DC-to-dc converter of waveform pin;
Fig. 3 B is the upward view that tradition adopts the POL DC-to-dc converter of waveform pin;
Fig. 4 A is in the direct current transducer according to first embodiment of the invention, is coated with the vertical view of first electronic component of first conductor layer;
Fig. 4 B is in the direct current transducer according to first embodiment of the invention, is coated with the upward view of first electronic component of first conductor layer;
Fig. 4 C is in the direct current transducer according to first embodiment of the invention, is coated with another vertical view of first electronic component of first conductor layer;
Fig. 4 D is in the direct current transducer according to first embodiment of the invention, is coated with another upward view of first electronic component of first conductor layer;
In the direct current transducer of Fig. 5 A to Fig. 5 E according to first embodiment of the invention, first conductor layer coats each step of first electronic component and makes the result;
Fig. 6 A is the direct current transducer upward view according to first embodiment of the invention;
Fig. 6 B is the direct current transducer vertical view according to first embodiment of the invention;
Fig. 6 C is the combined circuit vertical view that comprises the direct current transducer of first embodiment of the invention;
Fig. 7 A is in the direct current transducer according to second embodiment of the invention, the vertical view that second electronic component is connected with first conductor layer;
Fig. 7 B will be according to the vertical view of the direct current transducer of second embodiment of the invention;
Fig. 8 A is in the direct current transducer according to sixth embodiment of the invention, is coated with the vertical view of second electronic component of first conductor layer;
Fig. 8 B is the vertical view according to the direct current transducer of sixth embodiment of the invention;
Fig. 9 A is in the direct current transducer according to seventh embodiment of the invention, is coated with the vertical view of the quadrielectron element of first conductor layer;
Fig. 9 B is the vertical view according to the direct current transducer of seventh embodiment of the invention;
Figure 10 is the vertical view according to the direct current transducer of eighth embodiment of the invention;
Figure 11 A is the POL DC-to-dc converter vertical view according to third embodiment of the invention;
Figure 11 B is the POL DC-to-dc converter vertical view upward view according to third embodiment of the invention;
Figure 11 C is the sketch map according to common burning magnetic material substrate, first conductor layer and the conductor of third embodiment of the invention;
Figure 11 D is according to the sketch map behind the common burning magnetic material substrate removal ground floor magnetic material base material of third embodiment of the invention;
Figure 11 E is the internal structure perspective view of Figure 11 C;
Figure 11 F for according to the common burning magnetic material substrate of third embodiment of the invention except that ground floor, the second layer and other internal layer circuit sketch mapes last one deck;
Figure 11 G is last layer line road sketch map according to the common burning magnetic material substrate of third embodiment of the invention;
Figure 12 A is the POL DC-to-dc converter vertical view according to fourth embodiment of the invention;
Figure 12 B is the POL DC-to-dc converter vertical view upward view according to fourth embodiment of the invention;
Figure 12 C is the sketch map of magnetic material substrate, first conductor layer and conductor according to fourth embodiment of the invention;
Figure 12 D is the internal structure perspective view of Figure 12 C;
Figure 13 A is the POL DC-to-dc converter vertical view according to fifth embodiment of the invention;
Figure 13 B is the POL DC-to-dc converter vertical view upward view according to fifth embodiment of the invention;
Figure 13 C is the sketch map of magnetic material substrate, first conductor layer, insulating barrier and conductor according to fifth embodiment of the invention;
Figure 13 D is the end view of Figure 13 C;
Figure 13 E is the sketch map according to the magnetic material substrate that does not cover insulating barrier of fifth embodiment of the invention;
Figure 13 F is the internal structure perspective view of Figure 13 E;
Figure 14 A is the vertical view of the inductance processed with the ferrocart core pressing;
Figure 14 B is the upward view of the inductance processed with the ferrocart core pressing;
Figure 14 C is the sketch map of inductance coil pin; And
Figure 14 D is the structural representation of inductance interior loop.
Embodiment
Be effective power density that promotes electronic installation (especially electric pressure converter), and dwindle overall dimensions that the present invention proposes a kind of novel pin design, is widely used in the at present common multiple electronic installation.See also shown in Fig. 4 A, 4C and Fig. 4 B, the 4D, it shows the upward view and the vertical view of the inductive element 62 in the first embodiment of the invention respectively.More detailed, inductive element 62 can be an inductance, and when practical application, inductive element 62 can be and burns a magnetic material inductance or a coiling laminated type inductance altogether.Must explanation be, be merely the usefulness of explanation in the inductive element 62 of present embodiment, in fact, can use technology that the present invention discloses on general electronic component main body, for example field-effect transistor etc.
One of characteristic of the present invention coats one first conductor layer 61 in the outer surface of inductive element 62; First conductor layer 61 has a bonding conductor 40 and a pin conductor 40 '; Wherein bonding conductor 40 coats a first surface of inductive element 62 outer surfaces; Pin conductor 40 ' then coats a second surface of inductive element 62 outer surfaces, and pin conductor 40 ' is the pin of inductive element 62, for example the pin of inductance.When application the present invention was on other electronic component main bodys, when for example being applied to field-effect transistor, this pin can be grid, source electrode and the drain electrode etc. of field-effect transistor.Inductive element 62 is connected with external circuitry through pin conductor 40 ' itself.In present embodiment, first surface comprises several zones such as a part of side of inductive element 62 outer surfaces, a part of end face and a part of bottom surface; Second surface then comprises several zones such as end face of other a part of sides of inductive element 62 outer surfaces and other parts; Wherein up surface is defined as the end face of inductive element 62 among the 4B figure, and up surface then is defined as the bottom surface of inductive element 62 among Fig. 4 A.
Aforementioned first surface and second surface are contained aspect that scope and the relevant drawings of inductive element 62 outer surfaces show and are merely and illustrate; Be not that in fact the area contained of first surface and second surface can be adjusted it according to actual demand in order to restriction the present invention.In addition; What must stress is; Isolate each other between at least a portion and pin conductor 40 ' in the bonding conductor 40 on inductive element 62 outer surfaces of present embodiment, that is at least a portion of bonding conductor 40 and pin conductor 40 ' do not have direct entity and electric connection between the two on outer surface.More detailed, only when being connected with other electron component or circuit board, its 40 beginnings of bonding conductor have part to see through other electron component or circuit board indirectly and pin conductor 40 ' electrically connects for inductive element 62.Implement in the aspect in other; Bonding conductor 40 on inductive element 62 outer surfaces; Also can all and between pin conductor 40 ' isolate each other, that is all bonding conductor 40 does not all have direct entity and electric connection between the two with pin conductor 40 ' on outer surface.More detailed, only when being connected with other electron component or circuit board, its bonding conductor 40 all sees through other electron component or circuit board indirectly and pin conductor 40 ' electrically connects for inductive element 62.
Please merge and consult Fig. 4 A, Fig. 4 B, Fig. 4 C and Fig. 4 D.In present embodiment, pin conductor 40 ' has two pins 41,45, is arranged at the two ends of inductive element 62 outer surfaces, as the pin of inductive element 62, to electrically connect inductive element 62 and other arbitrary elements or carrier (a for example circuit board).In addition, bonding conductor 40 can cooperate actual demand, and different designs is arranged, and in present embodiment, bonding conductor 40 has several different conductive regions 42,43,44,47,48, coats and be attached at the first surface on inductive element 62 bodies.For example, conductive region 42,43,44 is as power pin, in order to be connected to a field-effect transistor; Conductive region 47,48 is as being signal pins, in order to be connected to a control chip.Wherein the conductive region 43 as power pin has bigger area; And and the spacing of 42,44,47,48 of other conductive regions of bonding conductor 40 is less, so the end face (promptly among the 4B figure up this face) of inductive element 62 is almost completely covered by the conductive region 42,43,44,47 of bonding conductor 40 and 48.As aforementioned; Because isolation each other between bonding conductor 40 at least a portion on inductive element 62 outer surfaces and the pin conductor 40 ', that is bonding conductor 40 at least a portion and pin conductor 40 ' do not have direct entity and electric connection between the two on inductive element 62 outer surfaces.More detailed, inductive element 62 is only when being connected with other electron component or circuit board, and its 40 ' beginning of pin conductor sees through the electric connection of other electron component or circuit board indirectly with part bonding conductor 40 surfaces at least.Therefore, the pin 41,45 of the segment conductor of bonding conductor 40 zone 42,43,44,47,48 and pin conductor 40 ' does not have direct electric connection on inductive element 62 outer surfaces.This large-area pin design not only helps essence to increase the area of dissipation of first electronic component (being inductance) 62, and (for example: electric pressure converter) whole heat dispersion also can effectively promote for the electronic installation of using inductive element 62.
Usually, the pin conductor 40 ' of first conductor layer 61 is before bonding conductor 40 forms, to make to finish among Fig. 4 A and Fig. 4 B.With aforementioned inductive element 62 is that a coiling laminated type inductance 140 is an example, and the schematic flow sheet of the pin conductor 40 ' of inductance 140 and manufacturing inductance 140 is shown in Figure 14 A to 14D.Wherein, Figure 14 A and Figure 14 B are respectively inductance vertical view and the upward view that the pressing of common iron powder core institute is processed, and Figure 14 C is depicted as the shape before the coil pin bending, then are the structure of coil in the magnetic material part shown in Figure 14 D.In detail, this inductance 140 comprises a magnetic material part 141 and an interior metal coil 142, and the two ends of interior metal coil 142 then are connected with pin conductor 143 respectively.Ferrocart core is coated interior metal coil 142 and carries out pressing, and then the outside just can get magnetic material part 141, and the pin conductor 143 at interior metal coil 142 two ends then bending is attached at a second surface of inductance 140.
On the other hand, the bonding conductor 40 of first conductor layer 61 mainly can be formed at the outer surface of inductive element 62 through dual mode in present embodiment.A kind of method is on the surface of inductive element 62 bodies, directly to form bonding conductor 40, and another kind of method is then independently accomplished after the bonding conductor 40, secures it to the first surface place of inductive element 62 bodies again, detailed as after state.
Wherein, The practical implementation method that on inductive element 62 body surfaces, forms bonding conductor 40 comprises the following step: at first; On inductive element 62 body surfaces, form layer of conductive material, copper for example, the method that wherein forms electric conducting material comprises with chemical vapour deposition (CVD) or physical vaporous deposition; For example: vapor deposition, sputter (sputtering), the deposition manufacture process that perhaps sprays surface metalations such as electric conducting material is formed at a conductive material layer on inductive element 62 body surfaces.Secondly, again with exposure, developing manufacture process, the patterning conductive material layer is to form on the first surface of bonding conductor 40 in inductive element 62 body surfaces.
Secondly, show that the another kind of method that on inductive element 62 body surfaces, forms first conductor layer 61 can be reached through following two kinds of modes like Fig. 5 A to Fig. 5 E.At first, independently accomplish in the outside one comprise first conductor layer 61 framework 51, shown in Fig. 5 A; Secondly, shown in Fig. 5 B, when making inductive element 62, in the mould of inductive element 62, add this framework 51, and in the pressure programming of inductive element 62, this framework 51 is merged the outer surface that is pressed into inductive element 62 with first conductor layer 61; After pressing is accomplished, shown in Fig. 5 C,, bend the first remaining conductor layer 61 again, make first conductor layer 61 must coat the first surface of inductive element 62, so can form and coat a complete integrated morphology 53 51 excisions of unnecessary framework.
In the second way, shown in Fig. 5 B, a side of being close to inductive elements 62 first surfaces in the framework 51 with first conductor layer 61 brushes one deck adhesive glue (in this embodiment, this adhesive glue thermal curable); Secondly, framework 51 is bonded to the outer surface of inductive element 62, bending framework 51 makes first conductor layer 61 must coat the first surface of inductive element 62 again; At last with a hot processing procedure with the hot curing adhesive glue after, can first conductor layer, 61 fixed packet be overlying on the first surface of inductive element 62, to obtain this integrated morphology 53.
Hold the above, in the resulting integrated morphology 53 of present embodiment preceding method, the maximal clearance that first conductor layer 61 and inductive element are 62 is less than 0.3mm.To coat the integrated morphology 53 of inductive element 62, its upward view and vertical view are respectively shown in Fig. 5 D and Fig. 5 E with framework 51 bendings.
See also Fig. 6 A, Fig. 6 B and Fig. 6 C, it shows the concrete application that the present invention first implements, and wherein Fig. 6 A and Fig. 6 B show the top and bottom perspective views of a direct current transducer respectively, and the person comprises the vertical view of this direct current transducer combined circuit shown in Fig. 6 C.Direct current transducer 60 application of aforementioned that Fig. 6 A and Fig. 6 B show have the inductive element 62 of large tracts of land pin, and direct current transducer 60 can be applicable to the step-down controller of load end, that is can be applicable to a POL DC-to-dc converter.Combined circuit 4 shown in Fig. 6 C is used a circuit structure of direct current transducer 60, detailed as after state.
Like figure; In this embodiment; Combined circuit 4 comprises two in order to carry first carrier and second carrier of electronic component; For example be respectively a first circuit board 69, a second circuit board 63, combined circuit 4 more comprises one first conductor layer 61, an inductive element 62, one first electronic component 66,2 second electronic components 64,65 and 2 the 3rd electronic components 67,68.Wherein, except that first circuit board 69, all the other elements can be formed aforesaid direct current transducer 60 jointly.In this embodiment, inductive element 62, first electronic component 66, second electronic component 64,65 and the 3rd electronic component 67,68 are respectively inductance, control chip, electric capacity and field-effect transistor; And implement in the aspect in other; Each electronic component can be an inductance, a resistance, an electric capacity, a field-effect transistor, a control chip and an integrated circuit one of them, integrated circuit is then with at least wherein two integrated and get of an inductance, a resistance, an electric capacity, a field-effect transistor and a control chip.Wherein, also can be described as a switch element or a power component as the field-effect transistor of the 3rd electronic component 67,68, and this field-effect transistor is a mos field effect transistor (MOSFET).
See also shown in Fig. 6 A, Fig. 6 B and Fig. 6 C, first circuit board 69 electrically connects with the bonding conductor that coats inductive element 62 first surfaces 40.First electronic component 66 also electrically connects with the bonding conductor that coats inductive element 62 first surfaces 40, and is more detailed, and first electronic component 66 sees through second circuit board 63 and electrically connects with bonding conductor 40.
Shown in Fig. 6 A and Fig. 6 B, inductive element 62, first electronic component 66, second electronic component 64,65, the 3rd electronic component 67,68 are installed up to second circuit board 63, to form direct current transducer 60.More detailed, second circuit board 63 be generally a printed circuit board (PCB) (Printed Circuit Board, PCB), it has two opposite side faces, wherein the inductive element 62 and second electronic component 64,65 that coats first conductor layer 61 installed in a side; On the other hand, first electronic component 66 and the 3rd electronic component 67,68 are then installed in the another side of second circuit board 63, shown in Fig. 6 B.The direct current transducer 60 that Fig. 6 C will have aforementioned integrated morphology 53 is mounted on the first circuit board 69 to form the structural perspective of combined circuit 4.As shown in the figure, direct current transducer 60 through be coated on the conductive region 42,43,44,47,48 of inductive element 62 bonding conductors 40 and mount to first circuit board 69 as pin.
Because the conductive region 42,43,44,47,48 of inductive element 62 bonding conductors 40 is distributed in the outer surface of inductive element 62; Make direct current transducer 60 fit conductive region 42,43,44,47,48 and first circuit board 69 electric connections that foot sees through bonding conductor 40 in the inductive element 62; So when direct current transducer 60 was installed up to first circuit board 69, occupied first circuit board 69 spaces were minimum.On the other hand; Because when direct current transducer 60 is installed to first circuit board 69; Through the mechanical support of inductive element 62 bodies as whole direct current transducer 60, but thereby thinning second circuit board 63 during practical application, significantly to reduce the required thickness of second circuit board 63; Save the certain space of direct current transducer 60 even combined circuit 4, so use the power density that improves direct current transducer 60 effectively.
In addition; Cause first electronic component 66 and the 3rd electronic component 67,68 are main heater element, and the pin 67a of the pin 66a of first electronic component 66 and the 3rd electronic component 67,68,68a can see through the integral heat sink ability that first conductive layer 61 is strengthened direct current transducers 60.Because second circuit board 63 thickness essence thinning; Has the splendid characteristic of thermal conductivity; Thereby the heat of first electronic component 66 and the 3rd electronic component 67,68 is easy to just can in second circuit board 63, spread, and through first electronic component 66 that is connected with first conductor layer 61 and auxiliary heat transferred to the first circuit board 69 with direct current transducer 60 of the 3rd electronic component 67,68.
The above practical application of the present invention, it can change according to actual demand.For example, the following stated second embodiment of the present invention characteristic that also application of aforementioned is identical is in the combined circuit of a direct current transducer 70, shown in Fig. 7 A and Fig. 7 B.Second embodiment is electrically connected to second circuit board 63 earlier with different being in second electronic component 64,65 of first embodiment of first embodiment, and the bonding conductor 40 through second circuit board 63 with first conductor layer 61 electrically connects; Second electronic component 72,73 of second embodiment then directly carries out entity and electric connection with the bonding conductor 71 of inductive element 74 outer surfaces; More detailed; Second electronic component 72,73 directly is installed on the bonding conductor 71; Promptly shown in Fig. 7 A, the three-dimensional structure diagram of direct current transducer 70 that adopts aforementioned connected mode is then shown in Fig. 7 B.
Be noted that; Present embodiment adopts the structure that first conductor layer 71 is coated on first electronic component (being inductance), 74 surfaces; In other enforcement aspects of present embodiment; First conductor layer 71 also can be coated on the surface of aforementioned first electronic component (scheming not shown) or the 3rd electronic component (scheming not shown) instead; Again second electronic component (being electric capacity) 72,73 directly is pasted on first conductor layer 71 that is coated on first electronic component or the 3rd electronical elements surface, to reach the same effect of aforementioned bring to power density and reduced volume.
The third embodiment of the present invention also is a kind of combined circuit that is applied to a direct current transducer, especially a POL DC-to-dc converter, and its correlative type is shown in Figure 11 A to 11G.Figure 11 A and Figure 11 B are respectively the top and bottom perspective views of POL DC-to-dc converter 110, and wherein POL DC-to-dc converter 110 is a substrate to burn magnetic material (Co-fired ferrite material) inductance altogether.POL DC-to-dc converter 110 has comprised an inductive element, one first conductor layer 112,2 second electronic components, a quadrielectron element and an inductance coil 116.In this embodiment; Inductive element burns magnetic material substrate 111 altogether with several layers and repeatedly puts formation; Second electronic component is electric capacity 114; Quadrielectron element is that an integrated field-effect transistor (is especially answered the integrated circuit 115 of a transistor (Metal Oxide Semiconductor Field Effect Transistor, MOSFET)) and a control chip for metal oxide semiconductor field effect.As previously mentioned, first conductor layer 112 comprises a bonding conductor and a pin conductor, among this embodiment bonding conductor have four pins 118 and with the conductor that is connected 113, the pin conductor have two pins 117 and with the conductor that is connected 113.
Detailed speech, burn magnetic material inductance 111 altogether and form by multi-layered magnetic material base material sintering, (Low Temperature Co-fired Ceramic, practice LTCC) is similar for its production method and LTCC.Shown in Figure 11 E; 116 of inductance coils comprise a plurality of connection conducting elements 119; Its practice is on the magnetic material base material of middle each layer, to make a plurality of through holes; With the magnetic material base material parallel stacks of each layer happen frequently come after, the corresponding through hole that each layer gone up on the base material is that the projection on the parallel plane of magnetic material layer overlaps basically.Equally make a plurality of half-round cross holes on the both sides of the magnetic material of each layer, then with inserting metal in every layer of through hole, for example silver (Ag), palladium (Pd), gold (Au) or copper (Cu) are with connection conducting element 119 and the pin 117,118 of producing inductance coil 116.Make many strip conductors at the upper surface of the superiors' magnetic material and the lower surface of orlop magnetic material, every strip conductor connects two through holes on this layer magnetic material.At last, again with the pressing of multi-layered magnetic material base material, just can form first conductor layer 113 of inductance coil 116 and part, wherein inductance coil 116 is electrically connected to the pin 117 of pin conductor.
At the inductance upper and lower surfaces that completes one deck magnetic material or be coated with the material of one deck insulation repeatedly respectively again, and on this layer magnetic material or insulating material, make corresponding semi-circular through hole and insert metal, form and burn magnetic material substrate 111 altogether.First conductor layer 112 promptly is formed on the surface of common burning magnetic material substrate 111; So that electronic component to be installed; The integrated circuit 115 of electric capacity 114 and integrated field-effect transistor and control chip for example; Electrically connecting first conductor layer 112, and form the whole POL DC-to-dc converter 110 shown in Figure 11 A and Figure 11 B in substrate 111.Figure 11 C is for burn the sketch map of magnetic material substrate 111, first conductor layer 112 altogether.Figure 11 D is for burning the sketch map after magnetic material substrate 111 is removed ground floor magnetic material base materials altogether, to show the electric connection of the inner inductance coil 116 of common burning magnetic material substrate 111 and pin.Figure 11 E then is the internal structure perspective view of Figure 11 D, among the figure, just can find out the direction that inductance coil 116 twines thus, and can know that demonstration pin 117 has connected inductance coil 116.Figure 11 F is for to burn magnetic material substrate 111 except that ground floor, the second layer and other internal layer circuit sketch mapes last one deck altogether.Figure 11 G is then for burning last layer line road sketch map of magnetic material substrate 111 altogether.From figure, can see at least a portion of the bonding conductor on common burning magnetic material substrate 111 outer surfaces or all with isolation each other between the pin conductor, that is bonding conductor at least a portion does not perhaps all have direct entity and electric connection between the two with the pin conductor on outer surface.More detailed; At least a portion of bonding conductor or all with the pin conductor between the two for to be connected indirectly; When promptly on burning magnetic material substrate 111 altogether, having stacked other electronic component such as electric capacity 114 and integrated circuit 115 etc., 118 beginnings of pin of its bonding conductor see through pin 117 electric connections of other electron component and pin conductor indirectly.
The fourth embodiment of the present invention is similarly a kind of combined circuit that is applied to a direct current transducer, a POL DC-to-dc converter 120 especially, and its correlative type is shown in Figure 12 A to 12D.Figure 12 A and Figure 12 B are respectively vertical view and the upward view that inductance coil 127 is pressed on the POL DC-to-dc converter 120 in the magnetic material substrate 125.POL DC-to-dc converter 120 comprises a quadrielectron element, 2 second electronic components, one first conductor layer 123 and an inductive element.Quadrielectron element is an integrated field-effect transistor (especially being MOSFET) and integrated circuit 121, two second electronic components of control chip are electric capacity 122, and inductive element has then comprised aforesaid magnetic material substrate 125 and inductance coil 127.As previously mentioned, the pin conductor that first conductor layer 123 comprises the bonding conductor with four pins 124 and has two pins 126, each pin 124 of bonding conductor all comprises a conductor 129 with each pin 126 of pin conductor.
First conductor layer 123 is coated on a first surface of magnetic material substrate 125 outer surfaces, and this first surface comprises a part of upper surface, a part of lower surface and a part of side, and more detailed, the side is by 129 coatings of the conductor in first conductor layer 123.And integrated circuit 121 directly is mounted on first conductor layer 123 on the magnetic material substrate 125 with electric capacity 122, and with direct contact to form electrically connect.More detailed, conductor 129 passes the upper and lower surfaces of magnetic material substrate 125 with the form of through hole, forms with the upper and lower surfaces in magnetic material substrate 125 to electrically connect.And be installed to a carrier (be a main circuit board and scheme not shown) when combined circuit in this)) time, can electrically connect through first conductor layer 123 and carrier.Simultaneously, the conductor 129 in two pins 126 of pin conductor is connected to form electric connection with the flat coil pin 128 of inductance coil 127 2 ends of magnetic material substrate 125 inside.Figure 12 C is the sketch map of magnetic material substrate 125, first conductor layer 123 and conductor 129; Figure 12 D is the internal structure perspective view of Figure 12 C; Among the figure, can find out that just the coil pin 128 at the two ends of inductance coil 127 is connected with the conductor 129 of the pin 126 of pin conductor thus.
Said as the 3rd embodiment, inductance coil 127 has been pressed on wherein when making magnetic material substrate 125.And as previously mentioned; From figure, can see bonding conductor pin 124 at least a portion or all with the pin 126 of pin conductor between isolation each other, that is at least a portion of the pin 124 of bonding conductor perhaps all and the pin of pin conductor 126 both between on outer surface, do not have direct entity and electric connection.
The fifth embodiment of the present invention still is a kind of combined circuit that is applied to a direct current transducer, especially a POL DC-to-dc converter, and its correlative type is shown in Figure 13 A to 13F.Wherein Figure 13 A and Figure 13 B are respectively through vertical view and the upward view of through hole at the POL DC-to-dc converter 13 of magnetic material substrate 136 internal production inductance coils 138.POL DC-to-dc converter 13 comprises a quadrielectron element, 2 second electronic components, an insulating barrier 133, one first conductor layer 134 and an inductive element.Quadrielectron element is an integrated field-effect transistor (especially being MOSFET) and integrated circuit 131, two second electronic components of control chip are electric capacity 132, and inductive element comprises foregoing magnetic material substrate 136 and inductance coil 138.The pin conductor that first conductor layer 134 comprises the bonding conductor with four pins 135 and has two pins 137, each pin 135 of bonding conductor all comprises a conductor 139 with each pin 137 of pin conductor.
And when combined circuit is installed to a carrier (be a main circuit board and scheme not shown in this), can electrically connect through first conductor layer 134 and carrier.Figure 13 C is the sketch map of magnetic material substrate 136, first conductor layer 134, insulating barrier 133 and conductor 139, and Figure 13 D then is the end view of Figure 13 C, those graphic structures that show each layer respectively.In Figure 13 E, its signal does not cover the sketch map of the magnetic material substrate 136 of insulating barrier 133, and among this figure, two of two pins 137 connect conducting element 139 ' all in order to connect inductance coil 138 and conductor 139.Figure 13 F is the internal structure perspective view of Figure 13 E, can find out the coiling direction of inductance coil 138 by this.
The concrete implementation method of present embodiment can be following, and inductance coil 138 is on magnetic material substrate 136, to make through drilling through modes such as hole and the electroplates in hole.And then in the insulating barrier 133 of magnetic material substrate 136 upper surfaces coating viscosity; Then first conductor layer 134 is pressed on the surface of magnetic material substrate 136; The mode of the plating through drilling through hole and through hole obtains conductor 139 again, this measure just and the manufacturing process of PCB similar.
And; As previously mentioned; From figure, can see at least a portion or the isolation each other all and between the pin 137 of pin conductor of the pin 135 of bonding conductor; That is at least a portion of the pin 135 of bonding conductor or all on outer surface, do not have direct entity and electric connection between the two with the pin 137 of pin conductor, it is connected to through circuit board or other electronic components, for example indirect mode such as integrated circuit 131, electric capacity 132 connection.
Generally speaking, the 3rd embodiment to the five embodiment are all with the magnetic material of the inductance substrate as whole POL DC-to-dc converter.Upper surface as the inductance magnetic material substrate of inductive element body is coated with one first conductor layer; In order to connect the electric signal of each electronic component; Electronic component comprise an inductance, a resistance, an electric capacity, a field-effect transistor, a control chip and an integrated circuit wherein one; Integrated circuit is then with at least wherein two integrated and get of an inductance, a resistance, an electric capacity, a field-effect transistor and a control chip, and this electronic component can engage connected modes such as (wire bond) through surface mount or routing with the electric connection of first conductor layer and realizes.The lower surface of inductance is the output and the input of the electric signal of POL DC-to-dc converter, that is the pin of POL DC-to-dc converter, in order to be welded on the circuit board (being first carrier of aforementioned each embodiment).The upper and lower surfaces of inductance connects by the conductor in first conductor layer.What need stress is; If electronic components such as electric capacity, resistance are integrated in the POL DC-to-dc converter; With more helping reducing the inner influence that parasitic parameter brought of POL DC-to-dc converter; So can obtain better electric property, especially be directed against the POL DC-to-dc converter of small-sized high frequency.
The sixth embodiment of the present invention also be with the described feature application of first embodiment in a direct current transducer, its correlative type is shown in Fig. 8 A and Fig. 8 B.In this embodiment, a direct current transducer 80 also can be connected to first carrier (in this is a circuit board, and schemes not shown).The direct current transducer 80 of this embodiment comprises one second carrier, an inductive element 89a, one first electronic component 85,2 second electronic component 89b and 2 the 3rd electronic component 89c, and second carrier for example can be a second circuit board 88.Similar described in first embodiment; First electronic component, 85 surfaces also coat one first conductor layer so that the electric connection of the direct current transducer and first carrier to be provided; Wherein first conductor layer comprises a bonding conductor and a pin conductor 84, and wherein bonding conductor has several pins 81,82,83,86,87.In this embodiment, inductive element 89a, first electronic component 85, the second electronic component 89b and the 3rd electronic component 89c are respectively inductance, control chip, electric capacity and field-effect transistor.
The seventh embodiment of the present invention is applied to a direct current transducer 90 with aforementioned same characteristic features equally.Shown in Fig. 9 A, Fig. 9 B; In this embodiment; Direct current transducer 90 also can be connected to one first carrier (be a circuit board and scheme not shown in this), and it is a second circuit board 97 that direct current transducer 90 then comprises one second carrier, an inductive element 98a, one first electronic component 98b, 2 second electronic component 98c and 2 the 3rd electronic components, 93, the second carriers; With similar described in the 6th embodiment; The 3rd electronic component 93 surfaces have coated one first conductor layer so that the electric connection of the direct current transducer and first carrier to be provided, and wherein first conductor layer then comprises a bonding conductor and a pin conductor 94, and bonding conductor has several pins 91,92,95,96.In this embodiment, inductive element 98a, the first electronic component 98b, the second electronic component 98c and the 3rd electronic component 93 are respectively inductance, control chip, electric capacity and field-effect transistor.
The eighth embodiment of the present invention is shown in figure 10.In this embodiment, direct current transducer 100 comprises one second carrier, an inductive element 106, one first electronic component 101,2 second electronic components 107 and 2 the 3rd electronic components 103,104 equally.In this embodiment, second carrier is a second circuit board 102; Similar with previous embodiment, 2 first conductor layer 105a, 105b are coated on electronic component 101,103,104 surfaces so that the electric connection of direct current transducer 100 and one first carrier (be a circuit board and scheme not shown in this) to be provided; Wherein inductive element 106, first electronic component 101, second electronic component 107 and the 3rd electronic component 103,104 are respectively inductance, control chip, electric capacity and field-effect transistor.
Above-described direct current transducer all by several independently electronic component form, only along with Development of Packaging Technology, but more and more electronic component mutual encapsulation becomes an independent element, and then forms an integrated circuit, further dwindles the volume of electronic component.Therefore, the aforementioned electronic component that is coated with bonding conductor also can be an integrated circuit.Though aforementioned each embodiment all is applied to combined circuit to it is noted that in the direct current transducer, combined circuit of the present invention more applicable in the transducer of other types so that being connected between transducer and circuit board to be provided.
The present invention adopts large-area conductor layer as pin configuration; Not only can help strengthen the heat dispersion of each electronic component; More the improvement to the integral heat sink performance of direct current transducer brings greatest help, hereat, adopts syndeton of the present invention; Can make the element of direct current transducer integrate integrated level and improve, and can dwindle direct current transducer overall dimensions, promote its power density.
The above embodiments are only in order to the enforcement aspect of the present invention of giving an example, and explain technical characterictic of the present invention, are not to be used for limiting category of the present invention.Any be familiar with this operator can unlabored change or the arrangement of the isotropism scope that all belongs to the present invention and advocated, interest field of the present invention should be as the criterion with claim.
Claims (27)
1. package assembly comprises:
One inductive element has a first surface, and this first surface comprises a part of upper surface, a part of lower surface and a part of side;
One bonding conductor is in order to coat this first surface of this inductive element;
One first electronic component, this first electronic component and the mutual storehouse of this inductive element, and be electrically connected to this inductive element,
One first carrier, wherein, this inductive element and this first electronic component are electrically connected to this first carrier through this bonding conductor; And
One second electronic component, wherein, this second electronic component is arranged at this side of this inductive element, and is electrically connected to this part side.
2. package assembly as claimed in claim 1 is characterized in that, this inductive element is an inductance.
3. package assembly as claimed in claim 1 is characterized in that, this bonding conductor is a strap.
4. package assembly as claimed in claim 1 is characterized in that, this first electronic component be an inductance, a resistance, an electric capacity, a field-effect transistor, a control chip and an integrated circuit one of them.
5. package assembly as claimed in claim 2; It is characterized in that this inductance comprises a pin conductor, in order to coat a second surface of this inductance; This pin conductor is as the pin of this inductance, to be connected indirectly through this first carrier with at least a portion of this bonding conductor.
6. package assembly as claimed in claim 2 is characterized in that this inductance comprises an insulating barrier, and this bonding conductor is coated on this outer first surface of this insulating barrier.
7. package assembly as claimed in claim 6 is characterized in that, this insulating barrier is one deck magnetic material.
8. package assembly as claimed in claim 7 is characterized in that, this inductance is for burning the magnetic material inductance altogether.
9. package assembly as claimed in claim 7 is characterized in that, this inductance is a coiling laminated type inductance.
10. package assembly as claimed in claim 1 is characterized in that this first electronic component and this inductive element lay respectively at two sides of one second carrier.
11. package assembly as claimed in claim 10 is characterized in that, this second carrier is a circuit board.
12. package assembly as claimed in claim 1 is characterized in that, this first electronic component is connected directly on this bonding conductor.
13. package assembly as claimed in claim 1 is characterized in that, one of them is coated on this inductive element this bonding conductor with a deposition manufacture process, a pressure programming and a gluing processing procedure.
14. package assembly as claimed in claim 1 is characterized in that, this package assembly is used for a direct current transducer.
15. package assembly as claimed in claim 14 is characterized in that, this direct current transducer is a POL DC-to-dc converter.
16. package assembly as claimed in claim 14 is characterized in that, this direct current transducer is a decompression DC transducer.
17. a package assembly comprises:
One electronic component has a first surface, and this first surface comprises a part of upper surface, a part of lower surface and a part of side;
One bonding conductor is in order to coat this first surface of this electronic component;
One first carrier, wherein, this electronic component is electrically connected to this first carrier through this bonding conductor; And
One second carrier, wherein, this electronic component is arranged in the middle of this first carrier and this second carrier, and this electronic component is electrically connected to this second carrier by this bonding conductor.
18. package assembly as claimed in claim 17 is characterized in that, this bonding conductor is a strap.
19. package assembly as claimed in claim 17 is characterized in that, this first carrier is a circuit board.
20. package assembly as claimed in claim 17; It is characterized in that; Also has a pin conductor; In order to coat a second surface of this electronic component, as the pin of this electronic component, at least a portion of this bonding conductor on this first surface is crossed this first carrier with this pin conductor dbus on this second surface and is connected indirectly.
21. package assembly as claimed in claim 17 is characterized in that, this electronic component is an inductive element.
22. package assembly as claimed in claim 21 is characterized in that, this inductive element comprises an insulating barrier, and this bonding conductor is coated on this outer first surface of this insulating barrier.
23. package assembly as claimed in claim 22 is characterized in that, this insulating barrier is one deck magnetic material.
24. package assembly as claimed in claim 21 is characterized in that, this inductive element is for burning the magnetic material inductance altogether.
25. package assembly as claimed in claim 21 is characterized in that, this inductive element is a coiling laminated type inductance.
26. package assembly as claimed in claim 17 is characterized in that, this electronic component be an inductance, a resistance, an electric capacity, a field-effect transistor, a control chip and an integrated circuit wherein one.
27. package assembly as claimed in claim 17 is characterized in that, one of them is coated on this electronic component this bonding conductor with a deposition manufacture process, a pressure programming and a gluing processing procedure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN 200810003217 CN101483381B (en) | 2008-01-07 | 2008-01-07 | Combined structure |
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| CN 200810003217 CN101483381B (en) | 2008-01-07 | 2008-01-07 | Combined structure |
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| CN201110354556.7A Division CN102412702B (en) | 2008-01-07 | 2008-01-07 | load point assembly |
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| CN101483381A CN101483381A (en) | 2009-07-15 |
| CN101483381B true CN101483381B (en) | 2012-11-07 |
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| CN104934188B (en) * | 2010-08-26 | 2018-04-10 | 乾坤科技股份有限公司 | Electron package structure and its method for packing |
| CN101908793A (en) * | 2010-08-31 | 2010-12-08 | 无锡市凯旋电机有限公司 | Micromotor capable of extending voltage applicable scope |
| CN102456684B (en) * | 2010-10-15 | 2016-05-04 | 乾坤科技股份有限公司 | Power transfer module |
| US20130285197A1 (en) * | 2012-04-27 | 2013-10-31 | Infineon Technologies Ag | Semiconductor Devices and Methods of Manufacturing and Using Thereof |
| CN105489597B (en) | 2015-12-28 | 2018-06-15 | 华为技术有限公司 | System-in-package module component, system-in-package module and electronic equipment |
| CN111415908B (en) | 2019-01-07 | 2022-02-22 | 台达电子企业管理（上海）有限公司 | Power module, chip embedded type packaging module and preparation method |
| US11901113B2 (en) | 2019-01-07 | 2024-02-13 | Delta Electronics (Shanghai) Co., Ltd. | Inversely coupled inductor and power supply module |
| CN111415925B (en) * | 2019-01-07 | 2023-01-24 | 台达电子企业管理（上海）有限公司 | Power module and preparation method thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003168864A (en) * | 2001-09-20 | 2003-06-13 | Kyocera Corp | Multilayer circuit board |
| JP2004063810A (en) * | 2002-07-29 | 2004-02-26 | Kyocera Corp | Switching circuit substrate |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003168864A (en) * | 2001-09-20 | 2003-06-13 | Kyocera Corp | Multilayer circuit board |
| JP2004063810A (en) * | 2002-07-29 | 2004-02-26 | Kyocera Corp | Switching circuit substrate |
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