CN101474081A - 一种连续多普勒超声成像系统正交本振信号产生装置 - Google Patents

一种连续多普勒超声成像系统正交本振信号产生装置 Download PDF

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CN101474081A
CN101474081A CNA2008102419264A CN200810241926A CN101474081A CN 101474081 A CN101474081 A CN 101474081A CN A2008102419264 A CNA2008102419264 A CN A2008102419264A CN 200810241926 A CN200810241926 A CN 200810241926A CN 101474081 A CN101474081 A CN 101474081A
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兰海
黄嘉熙
蒋颂平
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Shenzhen Landwind Industry Co Ltd
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Shenzhen Landwind Industry Co Ltd
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本发明公开了一种连续多普勒超声成像系统正交本振信号产生装置,包括现场可编程门阵列FPGA、晶振、第一数模转换器和第二数模转换器,所述现场可编程门阵列FPGA的输出端与第一数模转换器和第二数模转换器的输入端相连,所述晶振分别与所述现场可编程门阵列FPGA、第一数模转换器和第二数模转换器相连,所述晶振用于向所述现场可编程门阵列FPGA、第一数模转换器和第二数模转换器提供同步时钟信号,所述现场可编程门阵列FPGA用于根据输入的相位值向第一数模转换器输出与该相位值相应的正弦值,向第二数模转换器输出与该相位值相应的余弦值,第一数模转换器用于将所述正弦值转换为相应的模拟信号,第二数模转换器用于将所述余弦值转换为相应的模拟信号。

Description

一种连续多普勒超声成像系统正交本振信号产生装置
技术领域
本发明涉及超声成像设备技术领域,具体涉及一种连续多普勒(CWDoppler)超声成像系统正交本振信号产生装置。
背景技术
连续多普勒成像系统中CW模式通常是这样工作的:探头的一部分阵元用于发射,另外一部分阵元用于接收。这样就可以将CW用于流速较快的血流信号的测量而不会发生混叠的现象。CW模式常用的处理方式如图1所示,各通道的回波信号先通过前置低噪声放大器(LNA)进行预放大,再将各个接收通道进行波束合成,然后将合成后的信号进行正交解调(I/Q Demodulate),最后进行模数转换(ADC)。其中正交解调的目的是区分多普勒信号是正向频移还是负向频移。如果I通道的解调的输出相位滞后Q通道的输出相位,则说明该多普勒频移信号是正向频移信号(血流方向流向探头);如果I通道的解调的输出相位超前Q通道的输出相位,则说明该多普勒频移信号是反向频移信号(血流方向远离探头)。
在现有的连续多普勒超声成像系统中,使用专用的集成电路(ASIC)来产生相位相差90度的正交本振信号,专用集成电路设计复杂,价格昂贵。
发明内容
本发明要解决的技术问题是提供一种连续多普勒超声成像系统正交本振信号产生装置,克服现有技术的连续多普勒成像系统使用专用的集成电路产生正交本振信号,设计复杂、生产成本高的缺陷。
本发明为解决上述技术问题所采用的技术方案为:
一种连续多普勒超声成像系统正交本振信号产生装置,包括现场可编程门阵列FPGA、晶振、第一数模转换器和第二数模转换器,所述现场可编程门阵列FPGA的输出端与第一数模转换器和第二数模转换器的输入端相连,所述晶振分别与所述现场可编程门阵列FPGA、第一数模转换器和第二数模转换器相连,所述晶振用于向所述现场可编程门阵列FPGA、第一数模转换器和第二数模转换器提供同步时钟信号,所述现场可编程门阵列FPGA用于根据输入的相位值向第一数模转换器输出与该相位值相应的正弦值,向第二数模转换器输出与该相位值相应的余弦值,第一数模转换器用于将所述正弦值转换为相应的模拟信号,第二数模转换器用于将所述余弦值转换为相应的模拟信号。
所述的连续多普勒超声成像系统正交本振信号产生装置,其中还包括第一低通滤波器,第一数模转换器的输出端与第一低通滤波器相连。
所述的连续多普勒超声成像系统正交本振信号产生装置,其中还包括第二低通滤波器,第二数模转换器的输出端与第二低通滤波器相连。
所述的连续多普勒超声成像系统正交本振信号产生装置,其中第一低通滤波器设为二阶巴特沃兹滤波器。
所述的连续多普勒超声成像系统正交本振信号产生装置,其中第二低通滤波器设为二阶巴特沃兹滤波器。
所述的连续多普勒超声成像系统正交本振信号产生装置,其中所述晶振设为有源晶振。
所述的连续多普勒超声成像系统正交本振信号产生装置,其中在所述现场可编程门阵列FPGA内设置相位累加器,所述相位累加器用于将上一时钟的相位值和相位增量相加后生成当前的相位值。
所述的连续多普勒超声成像系统正交本振信号产生装置,其中在所述现场可编程门阵列FPGA内设置正弦值查找表,所述正弦值查找表根据当前的相位值输出对应的正弦值。
所述的连续多普勒超声成像系统正交本振信号产生装置,其中在所述现场可编程门阵列FPGA内设置余弦值查找表,所述余弦值查找表根据当前的相位值输出对应的余弦值。
所述的连续多普勒超声成像系统正交本振信号产生装置,其中所述二阶巴特沃兹滤波器的3dB截至频率设置为3MHz。
本发明的有益效果:本发明连续多普勒超声成像系统正交本振信号产生装置使用现场可编程门阵列FPGA实现直接数字合成(DDS,DirectDigital Synthesizer)技术来产生正交本振信号,大大降低了设计复杂度,并降低了生产成本。
附图说明
本发明包括如下附图:
图1为现有技术使用正交本振信号的装置示意图;
图2为本发明连续多普勒超声成像系统正交本振信号产生装置示意图;
图3为本发明FPGA中生成正交数字信号的逻辑组件示意图。
具体实施方式
下面根据附图和实施例对本发明作进一步详细说明:
如图2所示,本发明连续多普勒超声成像系统正交本振信号产生装置由现场可编程门阵列FPGA,有源晶振OSC,两个数模转换器DAC和两个低通滤波器LPF构成。
有源晶振OSC产生同步时钟信号供现场可编程门阵列FPGA和数模转换器DAC使用,由于正交本振信号LO信号对相位要求很严格,所以使用高稳定度的有源晶振来减少时钟的抖动。
现场可编程门阵列FPGA根据输入的相位值,输出该相位对应的正弦值和余弦值。这些正弦值和余弦值是位宽为M的数字信号。
数模转换器DAC将现场可编程门阵列FPGA输出的数字信号转换为模拟信号,其输出即为正弦值和余弦值对应的一定幅度的模拟信号。
低通滤波器LPF将锯齿形的数模转换器DAC输出信号平滑为需要的正余弦信号,其截至频率设置为比需要的正交本振信号LO频率略高的一个值。
正交输出的条件是现场可编程门阵列FPGA的输出为正交的数字信号,现场可编程门阵列FPGA中产生正交数字信号的逻辑组件如图3所示,其中Δθ为输入的相位增量,用位宽为N的数字信号表示,输出本振频率由下列公式决定:
FLO=(Fclk*Δθ)/2N
公式中,FLO为需要的本振频率,Fclk为现场可编程门阵列FPGA的时钟频率。
R1为寄存器,在时钟的上升(或下降)沿锁存输入的Δθ。Δθ进入相位累加器,相位累加器由加法器A1和寄存器R2构成。加法器将上一时钟的相位和相位增量Δθ相加生成当前的相位值,并在时钟的上升(或下降)沿锁存进R2。R2输出即为当前相位θ,其位宽也为N。
T1为正弦(或余弦)查找表,根据输入的相位值θ,从表中可以查找出该相位值θ对应的正弦值或余弦值。这些正弦值或余弦值预先存储于在现场可编程门阵列FPGA的随机读写存储器(RAM)中。由于正弦或余弦都是周期信号,并且将余弦信号滞后π/2相位后其形状和正弦信号一样,所以在该查找表只需要保存一个周期的正弦值或者余弦值。查找表T1的深度为2N,宽度为M。当输出相位值θ为0~2N范围内的任意一个值时,可以从查找表中找到一个对应的位宽为M的正弦值sinθ或余弦值cosθ。
一个具体实施例:
利用本发明连续多普勒超声成像系统正交本振信号产生装置产生2.5MHz的正交本振信号用于超声回波信号的解调。
时钟(clk)频率为40MHz,选用相位增量Δθ的位宽N=16,正弦(或余弦)值位宽M=10。根据前面的公式可以计算得到:
Δθ=(FLO*2N)/Fclk=(2.5M*216)/40M
  =(4096)10=(0001 0000 0000 0000)2
所以需要向现场可编程门阵列FPGA发送Δθ=(0001 0000 0000 0000)2即可产生2.5MHz的输出频率。
相位累加器在每个时钟周期,根据上一时钟的相位和相位增量Δθ相加生成当前的相位值θ。
查找表T1中保存深度为216,宽度为10的余弦幅度值。在每个时钟周期,T1根据输入的相位θ,查找出余弦输出cosθ;同时查找出滞后π/2相位的正弦输出sinθ=cos(θ-π/2)。
数模转换器DAC选用10bit、40MHz的数模转换器,将现场可编程门阵列FPGA输出的sinθ、cosθ数字信号转换为模拟信号。
低通滤波器(LPF)使用2阶巴特沃兹滤波器,其3dB截至频率设置为3MHz,这样可以平滑输出2.5MHz的本振信号。
本领域技术人员不脱离本发明的实质和精神,可以有多种变形方案实现本发明,以上所述仅为本发明较佳可行的实施例而已,并非因此局限本发明的权利范围,凡运用本发明说明书及附图内容所作的等效结构变化,均包含于本发明的权利范围之内。

Claims (10)

1、一种连续多普勒超声成像系统正交本振信号产生装置,其特征在于:包括现场可编程门阵列FPGA、晶振、第一数模转换器和第二数模转换器,所述现场可编程门阵列FPGA的输出端与第一数模转换器和第二数模转换器的输入端相连,所述晶振分别与所述现场可编程门阵列FPGA、第一数模转换器和第二数模转换器相连,所述晶振用于向所述现场可编程门阵列FPGA、第一数模转换器和第二数模转换器提供同步时钟信号,所述现场可编程门阵列FPGA用于根据输入的相位值向第一数模转换器输出与该相位值相应的正弦值,向第二数模转换器输出与该相位值相应的余弦值,第一数模转换器用于将所述正弦值转换为相应的模拟信号,第二数模转换器用于将所述余弦值转换为相应的模拟信号。
2、根据权利要求1所述的连续多普勒超声成像系统正交本振信号产生装置,其特征在于:还包括第一低通滤波器,第一数模转换器的输出端与第一低通滤波器相连。
3、根据权利要求2所述的连续多普勒超声成像系统正交本振信号产生装置,其特征在于:还包括第二低通滤波器,第二数模转换器的输出端与第二低通滤波器相连。
4、根据权利要求3所述的连续多普勒超声成像系统正交本振信号产生装置,其特征在于:第一低通滤波器设为二阶巴特沃兹滤波器。
5、根据权利要求4所述的连续多普勒超声成像系统正交本振信号产生装置,其特征在于:第二低通滤波器设为二阶巴特沃兹滤波器。
6、根据权利要求5所述的连续多普勒超声成像系统正交本振信号产生装置,其特征在于:所述晶振设为有源晶振。
7、根据权利要求6所述的连续多普勒超声成像系统正交本振信号产生装置,其特征在于:在所述现场可编程门阵列FPGA内设置相位累加器,所述相位累加器用于将上一时钟的相位值和相位增量相加后生成当前的相位值。
8、根据权利要求7所述的连续多普勒超声成像系统正交本振信号产生装置,其特征在于:在所述现场可编程门阵列FPGA内设置正弦值查找表,所述正弦值查找表根据当前的相位值输出对应的正弦值。
9、根据权利要求7所述的连续多普勒超声成像系统正交本振信号产生装置,其特征在于:在所述现场可编程门阵列FPGA内设置余弦值查找表,所述余弦值查找表根据当前的相位值输出对应的余弦值。
10、根据权利要求8或9所述的连续多普勒超声成像系统正交本振信号产生装置,其特征在于:所述二阶巴特沃兹滤波器的3dB截至频率设置为3MHz。
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