CN101472454B - Circuit board layout structure and method for preventing electromagnetic interference - Google Patents
Circuit board layout structure and method for preventing electromagnetic interference Download PDFInfo
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- CN101472454B CN101472454B CN2007103059257A CN200710305925A CN101472454B CN 101472454 B CN101472454 B CN 101472454B CN 2007103059257 A CN2007103059257 A CN 2007103059257A CN 200710305925 A CN200710305925 A CN 200710305925A CN 101472454 B CN101472454 B CN 101472454B
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Abstract
The present invention relates to a circuit board structure and a method for preventing electromagnetic interference, wherein, the circuit board structure comprises a multilayer printed circuit board, a plurality of conduction grids and a plurality of conduction perforations. The multilayer printed circuit board is provided with a plurality of signal layers and a grounding layer; a plurality of signal circuits are arranged on each signal layer; the conduction grids wrapping the signal circuits on each signal layer are distributed on each signal layer; and the conduction perforations are formed among the layers of the multilayer printed circuit board, and electrically connected to the grounding layer and conduction grids on each signal layer. Therefore, according to the design of the size of the conduction grids, the purpose of blocking the frequency of a specialized electromagnetic wave can be achieved. The invention can reduce the length distributed by a field of interference sources, so as to weaken noise radiation degree, further reduce the mutual interference degree of signals, reduce the number of the conduction perforations by about 30 to 50 percent, and avoid the intensity reduction of the circuit board. In addition, the invention adopts a mode of conduction grid layout, thereby reducing the electroplating cost by about 25 to 30 percent.
Description
Technical field
The present invention relates to a kind of board structure of circuit and method that prevents electromagnetic interference, particularly a kind of board structure of circuit and layout method that has high-frequency signal and prevent electromagnetic interference.
Background technology
Any high-frequency electronic product all can produce noise (Noise), electronic noise disturbs and can be divided into conducted interference and width of cloth blackberry lily and disturb two aspects and talk, generally speaking, conducted interference can be gone other electronics of interference effect or electric equipment products normal operation by power line, it then is to remove other equipment of interference effect by air that width of cloth blackberry lily is disturbed, for the use of electrical appliance, all formulate the standard that prevents electromagnetic interference in the electrical safety of the general country regulation.
Along with the progress of high-tech area, (electromagnetic inference, problem EMI) is also increasing for electromagnetic interference.When semiconductor element speed is faster, density heals when high, noise is also bigger.For printed circuit board (PCB) (PCB) design engineer, the problem of EMI is also increasingly important, and by the suitable printed circuit board layout technology and the method for designing of coupled systemization, can avoid the interference of EMI problem in advance.
And attempt at present to reduce or electromagnetic wave is dropped to minimum method all is by insulation blocking, and this comprises cable is coated one deck separation net with conduction ground connection, or the component ambient that can generate electromagnetic waves in the casing of electronic product is placed the metallic conduction thing.And these electromagnetic anti-system steps can increase the manufacturing cost of electronic installation, and make electronic product more complicated.
Summary of the invention
In view of this, the invention provides a kind of board structure of circuit and method that prevents electromagnetic interference, utilize a plurality of conductive grids to be laid on the signals layer of circuit board, to coat the signal line on the signals layer.The layout of conductive grid can be destroyed the interference source magnetic field that signal line produces, and then allows the length of large tracts of land Distribution of Magnetic Field reduces on the circuit board, thereby makes the noise radiation degree weaken, and reaches the effect of control of EMI.
The board structure of circuit of electromagnetic interference that prevents provided by the invention comprises multilayer board, a plurality of unit grids and the perforation of a plurality of conduction.Wherein, multilayer board has a plurality of signals layers and ground plane, all is laid with many barss circuit on each signals layer.A plurality of unit grids are laid on each signals layer, and coat the signal line on each signals layer, and described conductive grid is a unit grids, the length that the length of described unit grids is dwindled integral multiple for the wavelength of the wave frequency that will intercept.A plurality of conduction perforation are arranged at each interlayer of multilayer board, are electrically connected at the unit grids on this ground plane and each signals layer.Whereby, according to the design of unit grids size, can reach the purpose that intercepts the specific electromagnetic wave frequency.
In the above-mentioned board structure of circuit that prevents electromagnetic interference, the size of this unit grids can be dwindled integral multiple design again according to the value that formula C=f * λ obtains λ, wherein C represents the light velocity, and f represents the wave frequency that will intercept, and λ represents the wavelength of the wave frequency that will intercept.
In the above-mentioned board structure of circuit that prevents electromagnetic interference, a plurality of conductions perforation can 2 times to the length of unit grids, be disposed on this multilayer board around, to constitute sealing ground connection networking.
The circuit-board laying-out method of electromagnetic interference that prevents provided by the invention may be implemented in multilayer board, this multilayer board has a plurality of signals layers and ground plane, wherein this method step is, at first, the wave frequency that selection will intercept, and according to formula C=f * λ calculating, wavelength with the wave frequency that obtains to intercept, wherein C represents the light velocity, and f represents the wave frequency that will intercept, and λ represents the wavelength of the wave frequency that will intercept; The wave frequency wavelength that will intercept divided by Integer n doubly, to obtain size as a unit grids of conductive grid; Each signals layer at multilayer board forms a plurality of unit grids, and a plurality of unit grids coat the signal line on each signals layer.Then, form a plurality of conductions perforation at each interlayer of multilayer board, a plurality of conductions perforation are electrically connected at the unit grids on this ground plane and each signals layer, seal the ground connection networking to constitute.So, according to the design of a plurality of unit grids sizes, can reach the purpose that intercepts the specific electromagnetic wave frequency.
In the above-mentioned circuit-board laying-out method that prevents electromagnetic interference, a plurality of conductions perforation can 2 times to the length of unit grids, be disposed on this multilayer board around to constitute sealing ground connection networking.
In sum, board structure of circuit and the method that prevents electromagnetic interference of the present invention by the layout type of locating, reaches the purpose that intercepts the specific electromagnetic wave frequency.So, structure of the present invention and method can reduce the length of interference source Distribution of Magnetic Field, weakening the noise radiation degree, and then reduce signal annoyance level each other.Simultaneously, the present invention can make conduction perforation decreased extent rough 30～50%, makes the intensity of circuit board not lower because of conduction perforation number.In addition, the present invention uses the conductive grid layout type, thereby can lower electroplating cost about 25～30%.
Above general introduction and ensuing detailed description are exemplary in nature, are used for step explanation scope of the present invention.About other objects and advantages of the present invention, will set forth with follow-up explanation and accompanying drawing.
Description of drawings
Fig. 1 is a board structure of circuit layering schematic diagram of the present invention;
Fig. 2 is a circuit board of the present invention top layer schematic layout pattern;
Fig. 3 is a conductive grid schematic diagram of the present invention; And
Fig. 4 is a circuit-board laying-out method flow process block schematic diagram of the present invention.
Wherein, description of reference numerals is as follows:
1 multilayer board
10 first signals layers
102 conductive grids
103 signal lines
104 conduction perforation
12 ground planes
14 secondary signal layers
Embodiment
Please refer to Fig. 1, this figure is a board structure of circuit layering schematic diagram of the present invention.Wherein, board structure of circuit of the present invention comprises multilayer board 1, a plurality of conductive grid 102 and a plurality of conduction perforation 104.Multilayer board 1 has first signals layer 10, secondary signal layer 14 and ground plane 12.All be laid with many barss circuit 103 and a plurality of conductive grids 102 on first signals layer 10 and secondary signal layer 14, wherein a plurality of conductive grids 102 are in order to coat aforementioned many barss circuit 103.Simultaneously, a plurality of conduction perforation 104 are electrically connected at ground plane 12, and are electrically connected at a plurality of conductive grids 102 on first signals layer 10 and the secondary signal layer 14.
Cooperate Fig. 1, please refer to Fig. 2, this figure is a circuit board of the present invention top layer schematic layout pattern.Wherein, be laid with a plurality of signal lines 103 on first signals layer 10, a plurality of signal lines 103 can produce electromagnetic noise when high-frequency operation, these electromagnetic noises can be disturbed other electronic components on first signals layer 10 with conduction and the width of cloth mode of penetrating by power line and air.Therefore, be laid with a plurality of conductive grids 102 on first signals layer 10, a plurality of conductive grids 102 coat a plurality of signal lines 103, in order to intercept the aforementioned electromagnetic interference of noise.
Cooperate Fig. 1 again, with reference to figure 2, first signals layer 10 also is laid with a plurality of conduction perforation 104, the conductive grid 102 that a plurality of conduction perforation 104 electrically connect on first signals layer 10, the perforation 104 of wherein a plurality of conductions is with 2 times of length to unit conductive grid 102, be disposed on this multilayer board 1 around.Simultaneously, a plurality of conductions perforation 104 also electrically connects conductive grid (not shown) and the ground plane 12 on the secondary signal layer 14 of multilayer board 1.So, first signals layer 10 all is electrically connected to ground plane 12 by a plurality of conduction perforation 104 with the conductive grid 102 of secondary signal layer 14 in the multilayer board 1, thereby constitutes sealing ground connection networking.
Cooperate Fig. 1 again, with reference to figure 2, when a plurality of signal lines 103 produce electromagnetic noise under high-frequency operation, according to electromagnetic principle, the a plurality of conductive grids 102 that are electrically connected to ground plane 12 by conduction perforation 104 can be directed to ground plane 12 with electromagnetic noise and be discharged, and then the magnetic line of force distribution of destruction electromagnetic noise, the length of reduction Distribution of Magnetic Field is to weaken electromagnetic noise radiation degree.
Therefore, in first signals layer 10 of multilayer board 1 and secondary signal layer 14, be laid with large-area a plurality of conductive grid 102, and, large-area a plurality of conductive grid 102 envelopes the signal line 103 in first signals layer 10 and the secondary signal layer 14 fully, the electromagnetic noise that is produced with blocking signal circuit 103, and then reach the effect that prevents electromagnetic interference.
With reference to figure 3, this figure is a conductive grid schematic diagram of the present invention.Wherein, conductive grid 102 is a unit grids, and promptly the long L of grid and wide W have equal length.Simultaneously, the size of unit grids gets according to formula (1).
C＝f×λ...(1)
In formula (1), C represents the light velocity, and f represents the wave frequency that will intercept, and λ represents the wavelength of the wave frequency that will intercept.According to formula (1), because light velocity C is a fixed value, therefore, the wave frequency f that intercept is inversely proportional to the wavelength X of the wave frequency that will intercept.
So, in the size design of conductive grid 102, the wave frequency f that needs selection earlier to intercept, calculate according to formula (1) again, and then obtain the wavelength X of the wave frequency that will intercept, and the length of unit conductive grid 102 is the wave frequency wavelength X that will intercept and dwindles Integer n length doubly.As shown in Figure 3, in the size of conductive grid 102, the length of its long L and wide W is obtained by formula (2) and formula (3) calculating, and wherein n is an arbitrary integer.
L＝λ/n...(2)
W＝λ/n...(3)
Cooperate Fig. 1, please refer to Fig. 4, this figure is a circuit-board laying-out method flow process block schematic diagram of the present invention.Circuit-board laying-out method of the present invention is implemented on the multilayer board 1 with first signals layer 10, secondary signal layer 14 and ground plane 12, this method step is: step S100, the wave frequency f that at first needs selection earlier to intercept, calculate according to formula C=f * λ again, and then obtain the wavelength X of the wave frequency that will intercept, wherein C represents the light velocity.Be step S102 then, the wave frequency wavelength X that will intercept divided by Integer n doubly, with the long L of the unit's of obtaining conductive grid 102 and the length of wide W.Then be step S104, form a plurality of conductive grids 102 on first signals layer 10 of multilayer board 1 and secondary signal layer 14, wherein a plurality of conductive grids 102 coat the signal line on first signals layers 10 and the secondary signal layer 14.Be step S106 then, form a plurality of conduction perforation 104 at multilayer board 1, a plurality of conduction perforation 104 are arranged between first signals layer 10, secondary signal layer 14 and the ground plane, be electrically connected at the conductive grid 102 on this ground plane 12 and first signals layer 10 and the secondary signal layer 14, thereby constitute sealing ground connection networking.
In sum, board structure of circuit and the method that prevents electromagnetic interference of the present invention by the layout type of conductive grid, reaches the purpose that intercepts the specific electromagnetic wave frequency.So, structure of the present invention and method can reduce the length of interference source Distribution of Magnetic Field, weakening the noise radiation degree, and then reduce signal annoyance level each other.Simultaneously, the present invention can make conduction perforation 104 decreased extent rough 30～50%, makes the intensity of circuit board not lower because of conduction perforation 104 numbers.In addition, the present invention uses conductive grid 102 layout type, thereby can lower electroplating cost about 25～30%.
The above only is the specific embodiment of the best of the present invention, but feature of the present invention is not limited thereto, the variation that any those skilled in the art can visualize in the field of the invention easily or revise the claim that all can be encompassed in following this case.
Claims (5)
1. board structure of circuit that prevents electromagnetic interference is characterized in that comprising:
Multilayer board has a plurality of signals layers and ground plane, all is laid with many barss circuit on each signals layer;
A plurality of conductive grids are laid on each signals layer, and coat the signal line on each signals layer, and described conductive grid is a unit grids, the length that the length of described unit grids is dwindled integral multiple for the wavelength of the wave frequency that will intercept; And
A plurality of conduction perforation are electrically connected at the unit grids on this ground plane and each signals layer.
2. the board structure of circuit that prevents electromagnetic interference as claimed in claim 1, it is characterized in that, the size of this unit grids is to dwindle integral multiple again according to the value that formula C=f * λ obtains λ to design, wherein C represents the light velocity, f represents the wave frequency that will intercept, and λ represents the wavelength of the wave frequency that will intercept.
3. the board structure of circuit that prevents electromagnetic interference as claimed in claim 1 is characterized in that, the perforation of a plurality of conductions is with 2 times of length to unit grids, be disposed on this multilayer board around, to constitute sealing ground connection networking.
4. a circuit-board laying-out method that prevents electromagnetic interference is characterized in that this method is implemented on multilayer board, and this multilayer board has a plurality of signals layers and ground plane, and wherein this method may further comprise the steps:
Select the wave frequency that will intercept, and according to formula C=f * λ calculating, with the wavelength of the wave frequency that obtains intercepting, wherein C represents the light velocity, and f represents the wave frequency that will intercept, and λ represents the wavelength of the wave frequency that will intercept;
The wavelength of the wave frequency that will intercept divided by Integer n doubly, to obtain size as a unit grids of conductive grid;
Each signals layer at this multilayer board forms a plurality of described unit grids, and wherein said a plurality of unit grids coat the signal line on each signals layer; And
Each interlayer at this multilayer board forms a plurality of conduction perforation, and described a plurality of conduction perforation are electrically connected at the described unit grids on this ground plane and each signals layer.
5. the circuit-board laying-out method that prevents electromagnetic interference as claimed in claim 4 is characterized in that, a plurality of conduction perforation are with 2 times of length to unit grids, and what be disposed on this multilayer board seals the ground connection networking to constitute on every side.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2007103059257A CN101472454B (en) | 2007-12-28 | 2007-12-28 | Circuit board layout structure and method for preventing electromagnetic interference |
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| CN2007103059257A CN101472454B (en) | 2007-12-28 | 2007-12-28 | Circuit board layout structure and method for preventing electromagnetic interference |
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| CN101472454B true CN101472454B (en) | 2011-09-28 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI553817B (en) * | 2014-06-17 | 2016-10-11 | 瑞昱半導體股份有限公司 | Integrated circuit having electromagnetic shielding capability and manufacturing method thereof |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103260335A (en) * | 2012-02-16 | 2013-08-21 | 京信通信系统（中国）有限公司 | Printed circuit board |
| US9488513B2 (en) | 2012-12-05 | 2016-11-08 | Molex, Llc | Flexible fluid level sensor with improved measurement capability |
| US10240965B2 (en) | 2012-12-05 | 2019-03-26 | Molex, Llc | Flexible fluid level sensor with improved measurement capability |
| CN103338589A (en) * | 2013-05-30 | 2013-10-02 | 南昌欧菲光科技有限公司 | Flexible circuit connecting component |
| CN112490687B (en) * | 2020-10-30 | 2022-10-28 | 西安空间无线电技术研究所 | Method for realizing single-aperture multi-feed-source multi-beam feed source assembly |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1371239A (en) * | 2001-02-20 | 2002-09-25 | 神达电脑股份有限公司 | Through hole processing and structure for HF circuit board |
| CN2917191Y (en) * | 2006-03-20 | 2007-06-27 | 佛山市顺德区顺达电脑厂有限公司 | Improved printed circuit board structure that can disperse electromagnet interference |
| CN101207967A (en) * | 2006-12-22 | 2008-06-25 | 英业达股份有限公司 | Circuit board structure capable of shielding interference of electromagnetic wave |
-
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- 2007-12-28 CN CN2007103059257A patent/CN101472454B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1371239A (en) * | 2001-02-20 | 2002-09-25 | 神达电脑股份有限公司 | Through hole processing and structure for HF circuit board |
| CN2917191Y (en) * | 2006-03-20 | 2007-06-27 | 佛山市顺德区顺达电脑厂有限公司 | Improved printed circuit board structure that can disperse electromagnet interference |
| CN101207967A (en) * | 2006-12-22 | 2008-06-25 | 英业达股份有限公司 | Circuit board structure capable of shielding interference of electromagnetic wave |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI553817B (en) * | 2014-06-17 | 2016-10-11 | 瑞昱半導體股份有限公司 | Integrated circuit having electromagnetic shielding capability and manufacturing method thereof |
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| CN101472454A (en) | 2009-07-01 |
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