CN101471391A - Light-receiving element and display device - Google Patents

Light-receiving element and display device Download PDF

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Publication number
CN101471391A
CN101471391A CNA2008101883711A CN200810188371A CN101471391A CN 101471391 A CN101471391 A CN 101471391A CN A2008101883711 A CNA2008101883711 A CN A2008101883711A CN 200810188371 A CN200810188371 A CN 200810188371A CN 101471391 A CN101471391 A CN 101471391A
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conductive
semiconductor region
type semiconductor
receiving element
light receiving
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CN101471391B (en
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大谷夏树
田中勉
国井正文
池田雅延
伊藤良一
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Japan Display West Inc
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Sony Corp
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Abstract

A light-receiving element includes: a first-conductivity-type semiconductor region configured to be formed over an element formation surface; a second-conductivity-type semiconductor region configured to be formed over the element formation surface; an intermediate semiconductor region configured to be formed over the element formation surface between the first-conductivity-type semiconductor region and the second-conductivity-type semiconductor region, and have an impurity concentration lower than impurity concentrations of the first-conductivity-type semiconductor region and the second-conductivity-type semiconductor region. The light-receiving element further includes: a first electrode configured to be electrically connected to the first-conductivity-type semiconductor region; a second electrode configured to be electrically connected to the second-conductivity-type semiconductor region; and a control electrode configured to be formed in an opposed area that exists on the element formation surface.

Description

Light receiving element and display unit
The cross reference of related application
The present invention comprises Japanese patent application JP2008-228255 that submits to Japan Patent office with on September 5th, 2008 and the relevant theme of submitting to Japan Patent office on December 25th, 2007 of Japanese patent application JP 2007-332100, incorporates this paper into as a reference at this full content with these two Japanese patent applications.
Technical field
The present invention relates to the display unit that has the light receiving element of control electrode and comprise this light receiving element.
Background technology
In recent years, in such as display unit such as liquid crystal indicator and organic electroluminescent (EL) display unit, be extensive use of such as light receiving elements such as photodiodes to detect and to control the brightness and the contrast of shown image.Photodiode is configured in the display unit with display element, and this display element has the drive circuit by formations such as thin-film transistors (TFT).
A kind of as photodiode, the PIN photodiode with flat shape is widely known by the people.PIN photodiode comprises: the p N-type semiconductor N zone and the n N-type semiconductor N zone that are formed at the transparency carrier surface and are made of polysilicon, and i N-type semiconductor N (intermediate semiconductor) zone between p N-type semiconductor N zone and n N-type semiconductor N zone that is formed at the transparency carrier surface and is made of polysilicon.
For example, in the open communique No.2004-119719 of Japan Patent, proposed a kind of be used for PIN photodiode pass through utilize third electrode (gate electrode) to control the technology of threshold voltage.
For in above-mentioned display unit, being formed at photodiode on the same substrate with TFT, need the semiconductor thickness of this photodiode very little, thus the leakage current that can suppress when TFT is in off state, to occur.Therefore, also very little as the thickness (volume) in the intermediate semiconductor zone of light receiver, this has caused guaranteeing the problem of enough optical receiver sensitivities.
Be head it off,, carried out increasing the W length of gate electrode and the test of L length, thereby improved optical receiver sensitivity about being used to increase method as the volume in the intermediate semiconductor zone of light receiver.Yet when having increased W length, in the overlapping region between gate electrode and p N-type semiconductor N zone or n N-type semiconductor N zone, parasitic capacitance also correspondingly increases.Therefore the photoelectric current that is produced is absorbed by this parasitic capacitance, thereby has limited the effect of effective raising light sensitivity.In addition, under the situation that has increased L length, during value in L length is increased to for example about 8~10 mu m ranges, photoelectric current is saturated, even and L length further increase and when surpassing this value, photoelectric current also no longer increases.
As mentioned above, prior art limits to some extent for the increase of the photoelectric current that is generated in the light receiving element, and therefore is difficult to improve fully optical receiver sensitivity.
Summary of the invention
The purpose of this invention is to provide the display unit that can fully improve the light receiving element of optical receiver sensitivity and comprise this light receiving element.
According to embodiments of the invention, first kind of light receiving element is provided, it comprises: first conductive-type semiconductor region, it is configured to form the top that forms the surface in element; Second conductive-type semiconductor region, it is configured to form the top that forms the surface in described element; The intermediate semiconductor zone, it is configured to form in described element and forms the top on surface and between described first conductive-type semiconductor region and described second conductive-type semiconductor region, and the impurity concentration in described intermediate semiconductor zone is lower than the impurity concentration of described first conductive-type semiconductor region and the impurity concentration of described second conductive-type semiconductor region.Described first kind of light receiving element also comprises: first electrode, and it is constructed to be electrically connected with described first conductive-type semiconductor region; Second electrode, it is constructed to be electrically connected with described second conductive-type semiconductor region; And control electrode, it is configured to form in being arranged in that described element forms that the surface is gone up and across the regional relative opposed area of dielectric film and described intermediate semiconductor.In described first kind of light receiving element, the conduction type of the impurity in the described intermediate semiconductor zone is the p type, and the voltage that is applied on the described control electrode is positive potential.
According to another embodiment of the invention, provide the first kind of display unit that comprises first kind of light receiving element and a plurality of display elements that are configured.
In described first kind of light receiving element and described first kind of display unit, owing to applied voltage, thereby can control the photoelectric current that is produced when regional as the described intermediate semiconductor of light receiver when with rayed to described control electrode.In addition, owing to have following feature, the conduction type that is the impurity in the described intermediate semiconductor zone is the p type and is positive potential to the voltage that described control electrode applies, thereby described intermediate semiconductor zone has along the n-i-p structure of the thickness direction of described light receiving element.Therefore, the electron hole pair that produces in depletion layer (depletion layer) promptly is separated into electronics and hole.Thereby the possibility right by trapped electrons hole, complex centre is very low, and the increase of the L length in described intermediate semiconductor zone makes photoelectric current also correspondingly increase.
According to another embodiment of the present invention, provide second kind of light receiving element, it comprises: first conductive-type semiconductor region, and it is configured to form the top that forms the surface in element; Second conductive-type semiconductor region, it is configured to form the top that forms the surface in described element; The intermediate semiconductor zone, it is configured to form in described element and forms the top on surface and between described first conductive-type semiconductor region and described second conductive-type semiconductor region, and the impurity concentration in described intermediate semiconductor zone is lower than the impurity concentration of described first conductive-type semiconductor region and the impurity concentration of described second conductive-type semiconductor region.Described second kind of light receiving element also comprises: first electrode, and it is constructed to be electrically connected with described first conductive-type semiconductor region; Second electrode, it is constructed to be electrically connected with described second conductive-type semiconductor region; And control electrode, it is configured to form in being arranged in that described element forms that the surface is gone up and across the regional relative opposed area of dielectric film and described intermediate semiconductor.In described second kind of light receiving element, the conduction type of the impurity in the described intermediate semiconductor zone is the n type, and the voltage that is applied on the described control electrode is negative potential.
According to another embodiment of the invention, provide the second kind of display unit that comprises second kind of light receiving element and a plurality of display elements that are configured.
In described second kind of light receiving element and described second kind of display unit, owing to applied voltage, thereby can control the photoelectric current that is produced when regional as the described intermediate semiconductor of light receiver when with rayed to described control electrode.In addition, owing to have following feature, the conduction type that is the impurity in the described intermediate semiconductor zone is the n type and is negative potential to the voltage that described control electrode applies, thereby described intermediate semiconductor zone has along the p-i-n structure of the thickness direction of described light receiving element.Therefore, the electron hole pair that produces in depletion layer is separated into electronics and hole rapidly.Thereby the possibility right by trapped electrons hole, complex centre is very low, and the increase of the L length in described intermediate semiconductor zone makes photoelectric current also correspondingly increase.
In described first kind of light receiving element and described first kind of display unit, the conduction type of the impurity in the described intermediate semiconductor zone is the p type, and the voltage that is applied on the described control electrode is positive potential.Thereby the electron hole pair that produces in the depletion layer in described intermediate semiconductor zone is separated rapidly, and this can promote the generation of photoelectric current.Therefore, even the L length in intermediate semiconductor zone increases, photoelectric current can be unsaturated yet, thereby can fully improve optical receiver sensitivity.
In addition, in described second kind of light receiving element and described second kind of display unit, the conduction type of the impurity in the described intermediate semiconductor zone is the n type, and the voltage that is applied on the described control electrode is negative potential.Thereby the electron hole pair that produces in the depletion layer in described intermediate semiconductor zone is separated rapidly, and this can promote the generation of photoelectric current.Therefore, even the L length in intermediate semiconductor zone increases, photoelectric current can be unsaturated yet, thereby can fully improve optical receiver sensitivity.
Description of drawings
Fig. 1 shows the plane graph of structure of the light receiving element of the embodiment of the invention;
Fig. 2 shows the profile of the structure of light receiving element shown in Figure 1;
Fig. 3 shows the plane graph of structure of the light receiving element of comparative example;
Fig. 4 shows the profile of structure of the light receiving element of comparative example shown in Figure 3;
Fig. 5 shows in Fig. 1 and light receiving element shown in Figure 3, the performance diagram of the relation between the L length of photoelectric current and gate electrode;
Fig. 6 is the circuit diagram that the circuit of the light-receiving characteristic that is used to measure light receiving element shown in Figure 1 has been described;
Fig. 7 shows in light receiving element shown in Figure 1, the performance diagram of the relation between photoelectric current and the grid voltage;
Fig. 8 shows in light receiving element shown in Figure 1, the performance diagram of the relation between the impurity concentration of puncture voltage and light receiver;
Fig. 9 shows the plane graph of structure of light receiving element of first modified example of the embodiment of the invention;
Figure 10 shows the profile of structure of the light receiving element of first modified example shown in Figure 9;
Figure 11 shows the profile of structure of light receiving element of second modified example of the embodiment of the invention;
Figure 12 A and Figure 12 B are the profiles of structure of light receiving element that shows third and fourth modified example of the embodiment of the invention respectively;
Figure 13 is the cutaway view that the feature work of the light receiving element of the 3rd modified example shown in Figure 12 A has been described;
Figure 14 A and Figure 14 B are the profiles of structure of light receiving element that shows the 5th and the 6th modified example of the embodiment of the invention respectively;
Figure 15 shows the plane graph of structure of light receiving element of the 7th modified example of the embodiment of the invention;
Figure 16 shows the profile of structure of the light receiving element of the 7th modified example shown in Figure 15;
Figure 17 shows in the light receiving element of the 7th modified example shown in Figure 15, the performance diagram of the relation between photoelectric current and the grid voltage;
Figure 18 shows in the light receiving element of the 7th modified example shown in Figure 15, the performance diagram of the relation between the impurity concentration of photoelectric current and light receiver;
Figure 19 shows the plane graph of structure of light receiving element of the 8th modified example of the embodiment of the invention;
Figure 20 shows the profile of structure of the light receiving element of the 8th modified example shown in Figure 19;
Figure 21 shows in the light receiving element of the 8th modified example shown in Figure 19, the performance diagram of the relation between photoelectric current and the grid voltage;
Figure 22 shows in the light receiving element of the 8th modified example shown in Figure 19, the performance diagram of the relation between the impurity concentration of photoelectric current and light receiver;
Figure 23 shows the circuit diagram of structure of light receiving element of the 9th modified example of the embodiment of the invention;
Figure 24 shows the profile of an example of the liquid crystal indicator that comprises light receiving element shown in Figure 1;
Figure 25 shows the plane graph and the circuit diagram of an example of the image element circuit in the liquid crystal indicator shown in Figure 24;
Figure 26 shows the profile of an example of the organic EL display that comprises light receiving element shown in Figure 1; And
Figure 27 shows the plane graph of another example of the liquid crystal indicator that comprises light receiving element shown in Figure 1.
Embodiment
Describe embodiments of the invention with reference to the accompanying drawings in detail.
The topology example of light receiving element
Fig. 1 shows the planar structure of the light receiving element (light receiving element 1) of the embodiment of the invention.Fig. 2 shows along the cross-section structure of the light receiving element 1 of Fig. 1 center line II-II.
Light receiving element 1 is the optical sensor with so-called PIN photodiode.Light receiving element 1 has: glass substrate 10; Be arranged on 10 1 face side of glass substrate p+ layer 11 as first conductive-type semiconductor region; Be arranged on the glass substrate 10 same face side that are provided with p+ layer 11 n+ layer 12 as second conductive-type semiconductor region; And be arranged between p+ layer 11 and the n+ layer 12 light receiver 13 as the intermediate semiconductor zone.P+ layer 11 is electrically connected with anode electrode 21 by contact site 241, and n+ layer 12 is electrically connected with cathode electrode 22 by contact site 242.On the glass substrate 10 same face side that are provided with p+ layer 11, n+ layer 12 and light receiver 13, in the zone relative, be formed with the gate electrode 23 that L length and W length are respectively L1 and W1 with light receiver 13.Between parts group that constitutes by glass substrate 10 and gate electrode 23 and the parts group that constitutes by p+ layer 11, n+ layer 12 and light receiver 13, be formed with gate insulating film 14.Between parts group that constitutes by p+ layer 11, n+ layer 12 and light receiver 13 and the parts group that constitutes by anode electrode 21 and cathode electrode 22, be formed with interlayer dielectric 15.Anode electrode 21 is electrically connected with wiring layer (interconnect layer) 251, and cathode electrode 22 is electrically connected with wiring layer 252.
Glass substrate 10 is the transparency carriers with light transmission.Can replace glass substrate 10 with the substrate that forms such as transparent (printing opacity) materials such as plastics, quartz or aluminium oxide by use.
Gate insulating film 14 and interlayer dielectric 15 are by constituting such as silicon nitride (SiN) or silica insulating material such as (SiO).These films can form by the deposition simple layer, or selectively, can utilize multiple material to form mixed layer.
P+ layer 11 is formed on the gate insulating film 14 and with light receiver 13 and contacts, and is made of the p N-type semiconductor N that is doped with high concentration p type impurity.Described p type impurity for example is boron.Preferably, described p N-type semiconductor N for example is a crystalline semiconductor.This is because crystalline semiconductor can provide higher carrier mobility.The example of this crystalline semiconductor comprises polysilicon (polycrystalline silicon or polysilicon).For example, utilize chemical vapor deposition (CVD) method deposition of amorphous silicon (non-crystalline silicon or amorphous silicon) thereby and utilize this amorphous silicon to be shone and make its fusion and solidify subsequently such as laser beams such as excimer laser beam, can form the p+ layer 11 that constitutes by polysilicon with this.Therefore and since light receiving element 1 can with the drive circuit co-manufactured that constitutes by TFT etc. on same substrate, thereby preferably, the display unit that will illustrate comprises light receiving element 1 after a while.
N+ layer 12 is formed on the gate insulating film 14 and with light receiver 13 and contacts, and is made of the n N-type semiconductor N that is doped with high concentration n type impurity.Described n type impurity for example is phosphorus.Preferably, described n N-type semiconductor N for example is a crystalline semiconductor.This is because similar with the p N-type semiconductor N, can obtain higher carrier mobility.The example of this crystalline semiconductor comprises polysilicon.Because n+ layer 12 for example can be by forming with p+ layer 11 similar manufacture method, thereby be preferred by the n+ layer 12 that polysilicon constitutes.
Light receiver 13 is optical receiving regions of light receiving element 1, and is formed on to be on the gate insulating film 14 between p+ layer 11 and the n+ layer 12 and with these layers and contacts.Light receiver 13 is intermediate semiconductor zone (n-layers), and it is formed has than low impurity (the n type impurity) concentration of n+ layer 12 (for example about 1 * 10 17~5 * 10 18Atm/cm 3Scope in).Light receiver 13 can comprise non-single crystal semiconductor layer.The example of the material of non-single crystal semiconductor layer comprises amorphous silicon, microcrystal silicon and polysilicon.
Preferably, the thickness of non-single crystal semiconductor layer is big as much as possible, for example, expects that this thickness is in the scope of about 30~60nm.This is because can make the photoelectric current minimizing of generation in the light receiver 13 less than the thickness of this scope, and greater than the thickness of this scope leakage current is increased.The crystallite dimension of expectation polysilicon is in the scope of about 50nm~1 μ m.Be to use under the situation of the microcrystal silicon that is formed by the CVD method not being to use above-mentioned laser irradiating method, the expectation crystallite dimension is in the scope of about 10~100nm.
Anode electrode 21 is electrically connected with p+ layer 11 and is made of electric conducting material.
Cathode electrode 22 is electrically connected with n+ layer 12 and by constituting with anode electrode 21 similar electric conducting materials.
Gate electrode 23 is formed in the relative zone of gate insulating film 14 and light receiver 13.Gate electrode 23 is as control electrode, and it can control the photoelectric current that is produced by the voltage that is applied on it when with light irradiates light acceptance division 13.In the present embodiment, the conduction type of the impurity in the light receiver 13 (n type impurity) is the n type, and the voltage that is applied on the gate electrode 23 is negative potential.
The work of light receiving element and effect
Below except seeing figures.1.and.2 also with reference to Fig. 3~Fig. 8, describe the work and the effect of the present embodiment light receiving element 1 compare with comparative example in detail.
At first, the groundwork of Mingguang City's receiving element 1 below with reference to Fig. 1 and Fig. 2.In light receiving element 1, when with light irradiates light acceptance division 13 (when light incides on the light receiver 13), amount according to incident light has produced photoelectric current in light receiver 13, and this photoelectric current is mobile between p+ layer 11 and n+ layer 12, and this makes element 1 can play the effect of light receiving element.
The feature work and the effect of the light receiving element of comparing with comparative example 1 then, are described below with reference to Fig. 3~Fig. 8.Fig. 3 shows the planar structure of the light receiving element (light receiving element 100) of comparative example.Fig. 4 shows along the cross-section structure of the light receiving element 100 of Fig. 3 center line III-III.
In the light receiving element 100 of comparative example, different with the light receiving element 1 of present embodiment is that the voltage that is applied on the gate electrode 23 is negative potential.In addition, the conduction type of the impurity in the light receiver 103 (p type impurity) is the p type, and perhaps light receiver 103 is intrinsic layer (I layers).
Because this structure, if the conduction type of the impurity in the light receiver 103 (p type impurity) is the p type, then when with light irradiates light acceptance division 103, in the light receiver 103 as the intermediate semiconductor zone of light receiving element 100, can not produce depletion layer, thereby not produce photoelectric current yet.If light receiver 103 is intrinsic layer (I layers), then will be very big in quantity as the complex centre in the light receiver 103 in intermediate semiconductor zone.Therefore, when the electron hole pair that in light receiver 103, produces under the situation of excessive L length, these electron hole pairs are easy to be caught by the complex centre, therefore do not produce photoelectric current.Thereby, if the increase of the L length L 1 by gate electrode 23 increases the L length of light receiver, then work as L length and be increased to certain-length, for example be increased to the length shown in the dashed curve of representing with mark G100 among Fig. 5 when (L1 is about 10 μ m), photoelectric current is saturated.
By contrast, in the light receiving element 1 of present embodiment, the conduction type of the impurity in the light receiver 13 (n type impurity) is the n type, and the voltage that is applied on the gate electrode 23 is negative potential.Because this structure, when with light irradiates light acceptance division 13, have along the p-i-n structure of the thickness direction of light receiving element 1 as the light receiver 13 in intermediate semiconductor zone.Therefore, the electron hole pair that produces in depletion layer is separated into electronics and hole rapidly.Thereby the possibility that the complex centre captures electron hole pair is very low, and the increase of the L length of light receiver 13 can cause the corresponding increase (promoting the generation of photoelectric current) of photoelectric current.Therefore, for example shown in the solid line of representing with mark G1 among Fig. 5, the increase of L length can make photoelectric current increase (scope of L1 is 20 μ m~about 40 μ m) on wide scope internal linear ground, thereby can fully improve optical receiver sensitivity.
In addition, as shown in Figure 6, for example utilize variable voltage source V1 and between the anode electrode 21 of light receiving element 1 and cathode electrode 22, apply reverse biased, can obtain following feature.Particularly, for example as shown in Figure 7, can find, for the size (optical receiver sensitivity) of the photoelectric current that is produced, voltage Vgn between n+ layer 12 and the gate electrode 23 (grid voltage Vg) exist an optimum range (in Fig. 7, optimum range for approximately-6~-9V).
In addition, even when L length L 1 increases, as gate electrode 23 and p+ layer 11 or and n+ layer 12 between the parasitic capacitance generation zone of overlapping region can not increase yet, this has improved the flexibility of light receiving element 1 at vpg connection.
In the case, for example as shown in Figure 8, the impurity concentration of expectation light receiver 13 is lower than about 2 * 10 18Atm/cm 3This is because the impurity concentration that is higher than this value can make withstand voltage when applying grid voltage Vg (puncture voltage) sharply reduce.
As mentioned above, present embodiment is constructed to, and the conduction type of the impurity in the light receiver 13 is the n type, and the voltage that is applied on the gate electrode 23 is negative potential.Thereby the electron hole pair that produces in the depletion layer of light receiver 13 is separated rapidly, can promote the generation of photoelectric current like this.Therefore, even photoelectric current can be unsaturated yet when L length increases (, increase L length photoelectric current is increased on wide scope internal linear ground), so just can fully improve optical receiver sensitivity.
Modified example
The following describes the modified example of the embodiment of the invention.Represent assembly same as the previously described embodiments in the modified example with identical Reference numeral, and omit explanation them.
First modified example
Fig. 9 shows the planar structure of the light receiving element (light receiving element 1A) of first modified example.Figure 10 shows along the cross-section structure of the light receiving element 1A of Fig. 9 center line IV-IV.In light receiving element 1A, the conduction type of the impurity among the light receiver 13A (p type impurity) is the p type, and the voltage that is applied on the gate electrode 23 is positive potential.That is to say that light receiver 13A is the p-layer.
In addition, in the light receiving element 1A of this modified example with this structure, because operation same as the previously described embodiments, thereby can promote the generation of photoelectric current and can fully improve optical receiver sensitivity.
Second modified example
Figure 11 shows the cross-section structure of the light receiving element (light receiving element 1B) of second modified example.The foregoing description and first modified example relate to the bottom gate type light receiving element, and wherein gate electrode 23 is formed at the below of p+ layer 11, n+ layer 12 and light receiver 13.By contrast, light receiving element 1B is the top gate type light receiving element, and wherein gate electrode 23B is formed at the top of p+ layer 11, n+ layer 12 and light receiver 13.In light receiving element 1B, be formed with interlayer dielectric 161 and 162 and gate insulating film 14B.
In addition, in light receiving element 1B, if the conduction type of the impurity in the light receiver 13 (p type impurity) is the p type, the voltage that then is applied on the gate electrode 23B is positive potential.On the other hand, if the conduction type of the impurity in the light receiver 13 (n type impurity) is the n type, the voltage that then is applied on the gate electrode 23B is negative potential.
In addition, in the light receiving element 1B of this modified example with this structure since with the foregoing description and the first modified example identical operations, thereby can promote photoelectric current generation and can fully improve optical receiver sensitivity.
Third and fourth modified example
Figure 12 A and Figure 12 B show the cross-section structure of the light receiving element ( light receiving element 1C and 1D) of third and fourth modified example respectively.
In light receiving element 1C, cathode electrode 22C has across the relative opposed area d12 of at least a portion of light receiver 13 zone and gate electrode 23.In addition, light receiver 13 is formed and has impurity (the n type impurity) concentration (promptly be formed n-layer) lower than n+ layer 12.In addition, when rayed, the grid voltage Vg of negative potential is applied on the gate electrode 23.
In light receiving element 1D, anode electrode 21D has across the relative opposed area d11 of at least a portion of light receiver 13A zone and gate electrode 23.In addition, light receiver 13A is formed and has impurity (the p type impurity) concentration (promptly be formed p-layer) lower than p+ layer 11.In addition, when rayed, the grid voltage Vg of positive potential is applied on the gate electrode 23.
Because these structures, the light receiving element 1C and the 1D of third and fourth modified example have the following advantages.Particularly, for example in light receiving element 1C shown in Figure 13, owing to applied voltage to the opposed area d12 of cathode electrode 22C, thereby can prevent when when gate electrode 23 applies negative voltage, back of the body raceway groove (back-channel) side has no restrictedly to raise to negative electrode side.Therefore, in light receiver 13, suppressed to change into the generation of the regional 13P in p type zone as the n-layer.This makes the electric field that is produced between the regional 13P that changes p type zone in the light receiver 13 into and the n+ layer 12 reduce, thereby hardly punch-through can take place.Therefore, can also improve productive rate.In addition, in light receiving element 1D, because identical operations, thereby can obtain identical beneficial effect.
The the 5th and the 6th modified example
Figure 14 A and Figure 14 B show the cross-section structure of the light receiving element (light receiving element 1E and 1F) of the 5th and the 6th modified example respectively.These two light receiving element 1E and 1F are the top gate type light receiving elements, wherein be provided with third and fourth modified example in the illustrated similar opposed area of opposed area.
In light receiving element 1E, have across at least a portion zone of light receiver 13 opposed area d22 relative with the electrode 262 that cathode electrode 22E is electrically connected with gate electrode 23B by contact site 244.In light receiving element 1F, have across at least a portion zone of light receiver 13A opposed area d21 relative with the electrode 261 that anode electrode 21F is electrically connected with gate electrode 23B by contact site 243.
In addition, in the light receiving element 1E and 1F of the 5th and the 6th modified example with this structure since with the third and fourth modified example identical operations, therefore hardly punch-through can take place, and thereby can improve productive rate.
The 7th modified example
Figure 15 shows the planar structure of the light receiving element (light receiving element 1G) of the 7th modified example.Figure 16 shows along the cross-section structure of the light receiving element 1G of Figure 15 center line V-V.
In the light receiving element 1G of this modified example, light receiver 13 is formed has impurity (the n type impurity) concentration (promptly be formed n-layer) lower than n+ layer 12.In addition, when rayed, the grid voltage Vg of negative potential is applied on the gate electrode 23.
In addition, in light receiving element 1G, compare the opposite ends of the more close n+ layer 12 of boundary B n between light receiver 13 (n-layer) and the n+ layer 12 (the promptly more close outside) with end En near the gate electrode 23 of n+ layer 12.This boundary B n can be positioned at the top of end En.
This structure can be avoided the problem about withstand voltage that will illustrate after a while.Particularly, if the conduction type of the impurity in the light receiver 13 (n-layer) is that n type and the voltage Vg that is applied to gate electrode 23 are negative potentials, then when grid voltage Vg surpasses a certain voltage, can go wrong aspect the withstand voltage between n+ layer 12 and light receiver 13 (n-layer).
More specifically, in the case, induce the hole in the light receiver 13 above gate electrode 23 (n-layer), and thereby near the interface (boundary B n) between n+ layer 12 and the light receiver 13 (n-layer), form p-n junction.Between zone of the p-on the p-n junction that forms owing to the hole of being responded to and n+ zone, very strong internal electric field is arranged, this has caused the problem about withstand voltage.
Yet,, can reduce the internal electric field between the regional and n+ zone of p-, and thereby can improve withstand voltage if between the p-zone that the n-layer of the electric field influence that is not easy to be subjected to produce owing to gate electrode 23 can be arranged on the p-n junction part and the n+ zone.
Therefore, in the light receiving element 1G of this modified example, compare the opposite ends of the more close n+ layer 12 of boundary B n (the promptly more close outside) with end En near the gate electrode 23 of n+ layer 12.This structure has reduced the electric field influence that produces owing to gate electrode 23.Thereby, owing to reduced electric field between n+ zone and the n-zone, thereby can avoid problem about withstand voltage, this sensitivity that has just improved light receiving element also can make this light receiving element steady operation.
Figure 17 shows photoelectric current Inp among the light receiving element 1G and the relation between the grid voltage Vgn.As the condition of data shown in Figure 17, Vnp is 6.0V, and the impurity concentration of light receiver 13 is 1 * 10 18Atm/cm 3The data of Figure 17 be the position as boundary B n become+1.5 μ m~-0.25 μ m in data under the situation of each position.As shown in figure 15, the symbol "+" of the position of boundary B n expression boundary B n is than the opposite ends (the promptly more close outside) of the more close n+ layer 12 of end En.On the other hand, symbol "-" expression boundary B n is than the center (promptly more close inboard) of the more close light receiver 13 of end En (n-layer).
With reference to Figure 17, for when having applied-resulting photoelectric current Inp during the Vgn of 8V, if boundary B n then has greater than 1.0 * 10 than the center (promptly more close inboard) of the more close light receiver 13 of end En (n-layer) -9The photoelectric current Inp of A flows through, and this has proved aspect withstand voltage and has existed problem.By contrast, if boundary B n than the opposite ends (the promptly more close outside) of the more close n+ layer 12 of end En, the problem of withstand voltage then can not occur.
Figure 18 shows the relation between the impurity concentration of photoelectric current Inp among the light receiving element 1G and light receiver 13.As the condition of data shown in Figure 180, grid voltage Vgn is-8V that the position of boundary B n is 0.0 μ m (being the top that boundary B n is positioned at end En).
If it is the n type that Figure 18 has proved the conduction type of impurity, then impurity concentration should be equal to or less than 2 * 10 18Atm/cm 3
The 8th modified example
Figure 19 shows the planar structure of the light receiving element (light receiving element 1H) of the 8th modified example.Figure 20 shows along the cross-section structure of the light receiving element 1H of Figure 19 center line VI-VI.
In the light receiving element 1H of this modified example, light receiver 13A is formed has impurity (the p type impurity) concentration (promptly be formed p-layer) lower than p+ layer 11.In addition, when rayed, the grid voltage Vg of positive potential is applied on the gate electrode 23.
In addition, in this light receiving element 1H, compare that end (the promptly more close outside) of the more close p+ layer 11 on the opposition side of boundary B p of boundary B p between light receiver 13A (p-layer) and the p+ layer 11 with end Ep near the gate electrode 23 of p+ layer 11.This boundary B p can be positioned at the top of end Ep.
Similar with the light receiving element 1G of the 7th modified example, this structure can be avoided the problem about withstand voltage that illustrates in the 7th modified example.
Therefore, in the light receiving element 1H of this modified example, compare the opposite ends of the more close p+ layer 11 of boundary B p (the promptly more close outside) with end Ep near the gate electrode 23 of p+ layer 11.This structure has reduced the electric field influence that produces owing to gate electrode 23.Thereby, owing to reduced electric field between p+ zone and the p-zone, thereby can avoid problem about withstand voltage, this sensitivity that has just improved light receiving element also can make this light receiving element steady operation.
Figure 21 shows photoelectric current Inp among the light receiving element 1H and the relation between the grid voltage Vgn.As the condition of data shown in Figure 21, Vnp is 6.0V, and the impurity concentration of light receiver 13A is 1 * 10 18Atm/cm 3The data of Figure 21 be the position as boundary B p become+1.5 μ m~-0.25 μ m in data under the situation of each position.As shown in figure 19, the symbol "+" of the position of boundary B p expression boundary B p is than the opposite ends (the promptly more close outside) of the more close p+ layer 11 of end Ep.On the other hand, symbol "-" expression boundary B p is than the center (promptly more close inboard) of the more close light receiver 13A of end Ep (p-layer).
With reference to Figure 21, for resulting photoelectric current Inp when having applied the Vgn of 2V, if boundary B p then has greater than 1.0 * 10 than the center (promptly more close inboard) of the more close light receiver 13A of end Ep (p-layer) -9The photoelectric current Inp of A flows through, and this has proved aspect withstand voltage and has existed problem.By contrast, if boundary B p than the opposite ends (the promptly more close outside) of the more close p+ layer 11 of end Ep, the problem of withstand voltage then can not occur.
Figure 22 shows the relation between the impurity concentration of photoelectric current Inp among the light receiving element 1H and light receiver 13A.As the condition of data shown in Figure 22, grid voltage Vgn is 8V, and the position of boundary B p is 0.0 μ m (being the top that boundary B p is positioned at end Ep).
If it is the p type that Figure 22 has proved the conduction type of impurity, then impurity concentration should be equal to or less than 2 * 10 18Atm/cm 3
The 9th modified example
Figure 23 shows the circuit structure of the light receiving element of the 9th modified example.The light receiving element circuit of this modified example comprises two light receiving element 1a and 1b (each light receiving element forms by above-mentioned light receiving element 1 or other light receiving element).Particularly, be one another in series two light receiving element 1a connecting and 1b be arranged at power vd D with between the GND.
For light receiving element 1a, its cathode electrode 22 is connected with power vd D, and its anode electrode 21 is connected with terminal B and output, and its gate electrode 23 is connected with terminal A.For light receiving element 1b, its cathode electrode 22 is connected with terminal B and output, and its anode electrode 21 is connected with ground GND, and its gate electrode 23 is connected with terminal C.
Light receiving element 1b is placed in the below (in the formation zone of black matrix B M) of black matrix B M and disturbs with compensate for ambient.On the other hand, light receiving element 1a is placed in the zone except the formation zone of black matrix B M, thereby can measure illuminance.
The boron ion is injected in the light receiver 13 of light receiving element 1a and 1b, so light receiver 13 can be p type zone.According to the limit of withstand voltage, the concentration of boron should be equal to or less than 2 * 10 18Atm/cm 3, and preferably, this concentration is 1.5 * 10 16~3.5 * 10 17Atm/cm 3Scope in.
Preferably current potential VA, the VB of terminal A, B shown in Figure 23 and C and VC, power supply potential VDD and ground potential GND are set at the equation (1) below satisfying.This is can allow photoelectric current stablize output because satisfy equation (1).
GND<VC<VB<VA<VDD (1)
So far finished explanation to the embodiment of the invention and modified example thereof.Yet, the invention is not restricted to these embodiment etc., but can carry out various modifications.
For example, in the explanation of the foregoing description, preferably, the opposed area at least (opposed area d11, d12, d21, d22) of cathode electrode or the electrode that is electrically connected with cathode electrode and anode electrode or the electrode that is electrically connected with anode electrode is the transparency electrode that constitutes by such as indium tin oxide transparent materials such as (ITO).This structure has improved the light incident efficient on the light receiver, and thereby has further improved optical receiver sensitivity.
The effect of the embodiment of the invention is not limited to a kind of effect relevant with visible light, also can realize and the relevant effect of invisible light (for example X ray, electron beam, ultraviolet (UV) light, infrared light).Especially, if the embodiment of the invention is used to have light near the energy of semiconductor layer band gap, then can obtain effective light receiving element.
In addition, although mainly use silicon thin film in embodiments of the present invention, anyly can all can be used for semiconductor layer by the semi-conducting material of electric field controls as semiconductor layer.The example of other materials comprises SiGe, Ge, Se, organic semiconductor film and oxide semiconductor film.
The light receiving element of the embodiment of the invention can be applicable to comprise the display unit of display element and light receiving element, for example Figure 24~liquid crystal indicator 4 and organic EL display 5 shown in Figure 27.This makes it possible to receive the surround lighting that comes from the outside and from the display light of display unit 48 etc., thereby can control video data and light quantity backlight etc., and make that this display unit can be as the multifunction display with touch panel function, fingerprint input function, scanner function and other functions.Particularly, liquid crystal indicator 4 shown in Figure 24 comprises light receiving element 1 grade, N type TFT 3N and the P type TFT 3P of the various embodiments described above.N type TFT 3N has source electrode 3N21, drain electrode 3N22, gate electrode 3N231 and 3N232, channel layer 3N131 and 3N132, n+ layer 3N12 and lightly doped drain (LDD, lightly-doped drain) layer 3N14.P type TFT3P has source electrode 3P22, drain electrode 3P21, gate electrode 3P23, channel layer 3P13 and p+ layer 3P11.Liquid crystal indicator 4 also comprises planarization film 41, pixel electrode 421, public electrode 422, liquid crystal layer 43, separator 44, cover layer 45, black matrix layer 46, colour filter 47 and glass substrate 40.In addition, for example as shown in figure 25, in each pixel 49 of display unit 48, image element circuit be formed have data wire DL, gate lines G L1~GL3, power line VDD, ground wire GND, common wire COM, read line RL, liquid crystal cell LC, light receiving element 1, pixel selection TFT element SW1 and SW3, capacity cell C1 and source electrode follow element SF.In addition, organic EL display 5 shown in Figure 26 comprises light receiving element 1 grade, N type TFT3N, P type TFT3P, planarization film 51, anode electrode 521, cathode electrode 522, luminescent layer 53, resin bed 54, cover layer 55, black matrix layer 56, colour filter 57 and the glass substrate 50 of the various embodiments described above.The position of light receiving element 1 grade is not limited in pixel 49 inside, also light receiving element 1 grade can be arranged in the neighboring area of the display unit 48 among the liquid crystal indicator 4A for example shown in Figure 27.
In addition, the various structures of the various embodiments described above can mutually combine.
It will be appreciated by those skilled in the art that according to different designing requirement and other factors, can in the scope of the appended claim of the present invention or its equivalent, carry out various modifications, combination, inferior combination and change.

Claims (18)

1. light receiving element, it comprises:
First conductive-type semiconductor region, it is configured to form the top that forms the surface in element;
Second conductive-type semiconductor region, it is configured to form the top that forms the surface in described element;
The intermediate semiconductor zone, it is configured to form in described element and forms the top on surface and between described first conductive-type semiconductor region and described second conductive-type semiconductor region, and the impurity concentration in described intermediate semiconductor zone is lower than the impurity concentration of described first conductive-type semiconductor region and the impurity concentration of described second conductive-type semiconductor region;
First electrode, it is constructed to be electrically connected with described first conductive-type semiconductor region;
Second electrode, it is constructed to be electrically connected with described second conductive-type semiconductor region; And
Control electrode, it is configured to form in described element and forms in upward relative with the described intermediate semiconductor zone opposed area in surface, and accompanies dielectric film between described control electrode and the described intermediate semiconductor zone,
Wherein, the conduction type of the impurity in the described intermediate semiconductor zone is the p type, and the voltage that is applied on the described control electrode is positive potential.
2. light receiving element as claimed in claim 1, wherein,
Described first electrode is an anode electrode, and described second electrode is a cathode electrode, and
Described anode electrode or have across at least a portion described intermediate semiconductor zone opposed area relative with described control electrode with electrode that described anode electrode is electrically connected.
3. light receiving element as claimed in claim 1, wherein,
Described control electrode is formed at the below in described first conductive-type semiconductor region, described second conductive-type semiconductor region and described intermediate semiconductor zone.
4. light receiving element as claimed in claim 1, wherein,
Described control electrode is formed at the top in described first conductive-type semiconductor region, described second conductive-type semiconductor region and described intermediate semiconductor zone.
5. light receiving element as claimed in claim 1, wherein,
The impurity concentration in described intermediate semiconductor zone is equal to or less than 2 * 10 18Atm/cm 3
6. light receiving element as claimed in claim 1, wherein,
Described first conductive-type semiconductor region, described second conductive-type semiconductor region and described intermediate semiconductor zone comprise the non-single crystal semiconductor layer that is made of polysilicon.
7. light receiving element as claimed in claim 6, wherein,
The thickness of described non-single crystal semiconductor layer is more than the 30nm and below the 60nm.
8. light receiving element as claimed in claim 1, wherein,
Border between described intermediate semiconductor zone and described first conductive-type semiconductor region is positioned at the top than the end of the described control electrode of close described first conductive-type semiconductor region, and perhaps this border is than the end of more close described first conductive-type semiconductor region on the opposition side on this border in the end of this control electrode.
9. light receiving element, it comprises:
First conductive-type semiconductor region, it is configured to form the top that forms the surface in element;
Second conductive-type semiconductor region, it is configured to form the top that forms the surface in described element;
The intermediate semiconductor zone, it is configured to form in described element and forms the top on surface and between described first conductive-type semiconductor region and described second conductive-type semiconductor region, and the impurity concentration in described intermediate semiconductor zone is lower than the impurity concentration of described first conductive-type semiconductor region and the impurity concentration of described second conductive-type semiconductor region;
First electrode, it is constructed to be electrically connected with described first conductive-type semiconductor region;
Second electrode, it is constructed to be electrically connected with described second conductive-type semiconductor region; And
Control electrode, it is configured to form in described element and forms in upward relative with the described intermediate semiconductor zone opposed area in surface, and accompanies dielectric film between described control electrode and the described intermediate semiconductor zone,
Wherein, the conduction type of the impurity in the described intermediate semiconductor zone is the n type, and the voltage that is applied on the described control electrode is negative potential.
10. light receiving element as claimed in claim 9, wherein,
Described first electrode is an anode electrode, and described second electrode is a cathode electrode, and
Described cathode electrode or have across at least a portion described intermediate semiconductor zone opposed area relative with described control electrode with electrode that described cathode electrode is electrically connected.
11. light receiving element as claimed in claim 9, wherein,
Described control electrode is formed at the below in described first conductive-type semiconductor region, described second conductive-type semiconductor region and described intermediate semiconductor zone.
12. light receiving element as claimed in claim 9, wherein,
Described control electrode is formed at the top in described first conductive-type semiconductor region, described second conductive-type semiconductor region and described intermediate semiconductor zone.
13. light receiving element as claimed in claim 9, wherein,
The impurity concentration in described intermediate semiconductor zone is equal to or less than 2 * 10 18Atm/cm 3
14. light receiving element as claimed in claim 9, wherein,
Described first conductive-type semiconductor region, described second conductive-type semiconductor region and described intermediate semiconductor zone comprise the non-single crystal semiconductor layer that is made of polysilicon.
15. light receiving element as claimed in claim 14, wherein,
The thickness of described non-single crystal semiconductor layer is more than the 30nm and below the 60nm.
16. light receiving element as claimed in claim 9, wherein,
Border between described intermediate semiconductor zone and described second conductive-type semiconductor region is positioned at the top than the end of the described control electrode of close described second conductive-type semiconductor region, and perhaps this border is than the end of more close described second conductive-type semiconductor region on the opposition side on this border in the end of this control electrode.
17. a display unit, it comprises light receiving element and a plurality of display element that is configured, and described light receiving element comprises:
First conductive-type semiconductor region, it is configured to form the top that forms the surface in element;
Second conductive-type semiconductor region, it is configured to form the top that forms the surface in described element;
The intermediate semiconductor zone, it is configured to form in described element and forms the top on surface and between described first conductive-type semiconductor region and described second conductive-type semiconductor region, and the impurity concentration in described intermediate semiconductor zone is lower than the impurity concentration of described first conductive-type semiconductor region and the impurity concentration of described second conductive-type semiconductor region;
First electrode, it is constructed to be electrically connected with described first conductive-type semiconductor region;
Second electrode, it is constructed to be electrically connected with described second conductive-type semiconductor region; And
Control electrode, it is configured to form in described element and forms in upward relative with the described intermediate semiconductor zone opposed area in surface, and accompanies dielectric film between described control electrode and the described intermediate semiconductor zone,
Wherein, the conduction type of the impurity in the described intermediate semiconductor zone is the p type, and the voltage that is applied on the described control electrode is positive potential.
18. a display unit, it comprises light receiving element and a plurality of display element that is configured, and described light receiving element comprises:
First conductive-type semiconductor region, it is configured to form the top that forms the surface in element;
Second conductive-type semiconductor region, it is configured to form the top that forms the surface in described element;
The intermediate semiconductor zone, it is configured to form in described element and forms the top on surface and between described first conductive-type semiconductor region and described second conductive-type semiconductor region, and the impurity concentration in described intermediate semiconductor zone is lower than the impurity concentration of described first conductive-type semiconductor region and the impurity concentration of described second conductive-type semiconductor region;
First electrode, it is constructed to be electrically connected with described first conductive-type semiconductor region;
Second electrode, it is constructed to be electrically connected with described second conductive-type semiconductor region; And
Control electrode, it is configured to form in described element and forms in upward relative with the described intermediate semiconductor zone opposed area in surface, and accompanies dielectric film between described control electrode and the described intermediate semiconductor zone,
Wherein, the conduction type of the impurity in the described intermediate semiconductor zone is the n type, and the voltage that is applied on the described control electrode is negative potential.
CN2008101883711A 2007-12-25 2008-12-25 Light-receiving element and display device Expired - Fee Related CN101471391B (en)

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