CN101452819B - Method for preparing alignment mark used for ion injection - Google Patents

Method for preparing alignment mark used for ion injection Download PDF

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Publication number
CN101452819B
CN101452819B CN2007101787724A CN200710178772A CN101452819B CN 101452819 B CN101452819 B CN 101452819B CN 2007101787724 A CN2007101787724 A CN 2007101787724A CN 200710178772 A CN200710178772 A CN 200710178772A CN 101452819 B CN101452819 B CN 101452819B
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Prior art keywords
ion
alignment mark
injection
etching
ion injection
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CN101452819A (en
Inventor
吴茹菲
尹军舰
张海英
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Ruili Flat Core Microelectronics Guangzhou Co Ltd
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Institute of Microelectronics of CAS
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Abstract

The present invention discloses a method for preparing an alignment mark for ion injection. The method comprises: carrying out etching before the ion injection, and forming the alignment mark for the ion injection at an area to be injected. An etched graph is as same as an ion injected graph. A photoetching mask plate adopted by the etching and a photoetching mask plate adopted by the ion injection are the same. The method solves the problem that an ion injection process can not provide an alignment mark graph for the next process, does not need to additionally prepare the photoetching mask plate, is simple and practical, and has low realizing cost.

Description

A kind of preparation is used for the method for the alignment mark of ion injection
Technical field
The present invention relates to microelectronics technology, relate in particular to a kind of preparation and be used for the method for the alignment mark that ion injects, when this method can effectively solve the ion injection as first step process, the problem of photoetching alignment mark can't be provided for later process, simultaneously, need not increase new lithography mask version, operation is simple.
Background technology
Photoetching is the committed step in the microelectronic technique, and each layer pattern all must be through photoetching, and that alignment mark is a lithography registration is necessary, does not have the alignment mark photoetching just to have no standard.Thereby each layer pattern of integrated circuit all can have a corresponding alignment mark, to guarantee the alignment between the figure layer.
As shown in Figure 1, Fig. 1 is the schematic diagram of alignment mark figure, and wherein, Fig. 1 a is the cross-shaped alignment marks figure, and Fig. 1 b is a square alignment mark figure.The cross-shaped alignment marks figure guarantee figure about, about do not depart from, square alignment mark figure guarantees not put upside down up and down.
The graph layer of ion implantation technology also needs alignment mark.In the general technology process, the alignment mark that has evaporated metal to form before ion injects, so the alignment mark alignment metal pair quasi-mark before that ion injects is just passable, and the metal pair quasi-mark before the technology alignment injection after the ion injection is also passable.
But for special technical process, for example ion injects when being the first step of whole technical process, and ion injects stays alignment mark must for next step technology.Because ion injects the color of back semi-conducting material and do not have naked eyes and can observedly not change, so this moment (promptly when ion injects as the whole technical process first step), ion injects and can't stay alignment mark to next step technology.
Summary of the invention
(1) technical problem that will solve
In view of this, the method that main purpose of the present invention is to provide a kind of preparation to be used for the alignment mark that ion injects when solving ion implantation technology as first step technology, stay the problem of alignment mark can't for next step technology.
(2) technical scheme
For achieving the above object, the invention provides the method that a kind of preparation is used for the alignment mark of ion injection, this method comprises: carrying out carrying out etching before the ion injection, treating that the injection region is formed for the alignment mark that ion injects.
In the such scheme, the figure of described etching is identical with the figure that ion injects.
In the such scheme, the lithography mask version that described etching adopts is identical with the lithography mask version that ion injects employing.
In the such scheme, described etching comprises: carrying out before ion injects, earlier even photoresist and before baking, the lithography mask version photoetching of adopting ion to inject is then developed, and is treating that the injection region exposes the figure for the treatment of that ion injects.
In the such scheme, described at photoetching development, when exposing the figure for the treatment of the ion injection, other parts are being protected by photoresist.
In the such scheme, for Semiconducting Silicon Materials, described etching adopts SF 6Dry etching, power 30W, flow are 60sccm, etch period 3 minutes, etching depth are 0.6 μ m.
In the such scheme, this method is at the situation of ion injection as the whole technical process first step.
(3) beneficial effect
From technique scheme as can be seen, the present invention has following beneficial effect:
This preparation provided by the invention is used for the method for the alignment mark of ion injection, can effectively solve ion implantation process can not provide the problem of alignment mark figure for next step technology, and need not prepare lithography mask version in addition, and simple, realize that cost is low.
Description of drawings
The present invention is further described below in conjunction with drawings and Examples:
Fig. 1 is the schematic diagram of alignment mark figure; Wherein, Fig. 1 a is the cross-shaped alignment marks figure, and Fig. 1 b is a square alignment mark figure;
Fig. 2 is the method flow diagram that preparation provided by the invention is used for the alignment mark of ion injection.
Embodiment
For making the purpose, technical solutions and advantages of the present invention clearer, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail.
This preparation provided by the invention is used for the method for the alignment mark of ion injection, the lithography mask version photoetching of adopting ion to inject, treating that injection region elder generation removes the semi-conducting material of certain depth quarter with etching method, be formed for the alignment mark that ion injects, make naked eyes can observe tangible alignment mark figure.
As shown in Figure 2, Fig. 2 is the method flow diagram that preparation provided by the invention is used for the alignment mark of ion injection, and this method comprises:
Step 201: the lithography mask version photoetching of adopting ion to inject, treating that injection region elder generation removes the semi-conducting material of certain depth quarter with etching method;
Step 202: be formed for the alignment mark that ion injects, make naked eyes can observe tangible alignment mark figure.
The figure of described etching is identical with the figure that ion injects, and the lithography mask version that described etching adopts is identical with the lithography mask version that ion injects employing.
In whole process flow, it is the first step that ion injects, but in order to increase alignment mark, guarantees that ion injects subsequent step alignment mark is arranged, and increases by a step etching before ion injects, and forms ion and injects the alignment mark in this step.The figure of etching and ion inject identical, and used lithography mask version is also identical.Detailed process is as follows:
Before ion injects, earlier even photoresist, preceding baking with the lithography mask version photoetching that ion injects, is developed then, is treating that the injection region exposes the figure for the treatment of that ion injects, and other parts are being protected by photoresist.For the most frequently used Semiconducting Silicon Materials, use SF 6Dry etching silicon, power 30W, flow are 60sccm, and etch period 3 minutes, etching depth are 0.6 μ m, and the figure naked eyes of this degree of depth have seemed clearly, have enough done alignment mark.Then do ion and inject, remove photoresist then, the operation of back is constant.
Above-described specific embodiment; purpose of the present invention, technical scheme and beneficial effect are further described; institute is understood that; the above only is specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any modification of being made, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (6)

1. one kind prepares the method that is used for the alignment mark that ion injects, and it is characterized in that this method comprises:
Carrying out carrying out etching before the ion injection, treating that the injection region is formed for the alignment mark that ion injects;
Wherein, etching is to carry out before ion injects, earlier even photoresist and before baking, the lithography mask version photoetching of adopting ion to inject is then developed, and is treating that the injection region exposes the figure for the treatment of that ion injects; For Semiconducting Silicon Materials, etching adopts SF 6Dry etching, power 30W, flow are 60sccm, etch period 3 minutes, etching depth are 0.6 μ m.
2. preparation according to claim 1 is used for the method for the alignment mark of ion injection, it is characterized in that, the figure of described etching is identical with the figure that ion injects.
3. preparation according to claim 1 is used for the method for the alignment mark of ion injection, it is characterized in that, the lithography mask version that described etching adopts is identical with the lithography mask version that ion injects employing.
4. be used for the method for the alignment mark that ion injects according to claim 2 or 3 described preparations, it is characterized in that described etching comprises:
Carrying out before ion injects, earlier even photoresist and before baking, the lithography mask version photoetching of adopting ion to inject is then developed, and is treating that the injection region exposes the figure for the treatment of that ion injects.
5. preparation according to claim 1 is used for the method for the alignment mark of ion injection, it is characterized in that, at described photoetching development, when exposing the figure for the treatment of the ion injection, other parts are being protected by photoresist.
6. preparation according to claim 1 is used for the method for the alignment mark of ion injection, it is characterized in that, this method is at the situation of ion injection as the whole technical process first step.
CN2007101787724A 2007-12-05 2007-12-05 Method for preparing alignment mark used for ion injection Active CN101452819B (en)

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CN101452819B true CN101452819B (en) 2011-07-06

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102315141B (en) * 2010-07-07 2013-06-12 北大方正集团有限公司 Photoetching registration mark protective device and metal sputtering technological method
CN105819395B (en) * 2015-01-09 2017-09-05 中国科学院微电子研究所 Method, semi-conductor device manufacturing method
CN108010857B (en) * 2016-11-01 2020-12-29 北大方正集团有限公司 Method for checking alignment quality of ion implantation process

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1469429A (en) * 2002-06-04 2004-01-21 Nec液晶技术株式会社 Method for producing thin film semiconductor and method for forming resist pattern thereof
CN101350297A (en) * 2007-07-17 2009-01-21 中芯国际集成电路制造(上海)有限公司 Method for manufacturing semiconductor device well

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1469429A (en) * 2002-06-04 2004-01-21 Nec液晶技术株式会社 Method for producing thin film semiconductor and method for forming resist pattern thereof
CN101350297A (en) * 2007-07-17 2009-01-21 中芯国际集成电路制造(上海)有限公司 Method for manufacturing semiconductor device well

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Address after: 510000 601, building a, 136 Kaiyuan Avenue, Huangpu District, Guangzhou City, Guangdong Province

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Address before: 100029 Beijing city Chaoyang District Beitucheng West Road No. 3

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Address after: 510000 room 710, Jianshe building, No. 348, Kaifa Avenue, Huangpu District, Guangzhou, Guangdong

Patentee after: Ruili flat core Microelectronics (Guangzhou) Co.,Ltd.

Address before: 510000 601, building a, 136 Kaiyuan Avenue, Huangpu District, Guangzhou City, Guangdong Province

Patentee before: AoXin integrated circuit technology (Guangdong) Co.,Ltd.

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