CN101452427B - DMA data-transmission system and method, and central processing unit - Google Patents

DMA data-transmission system and method, and central processing unit Download PDF

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Publication number
CN101452427B
CN101452427B CN2008102266644A CN200810226664A CN101452427B CN 101452427 B CN101452427 B CN 101452427B CN 2008102266644 A CN2008102266644 A CN 2008102266644A CN 200810226664 A CN200810226664 A CN 200810226664A CN 101452427 B CN101452427 B CN 101452427B
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dma
data
data transmission
information
configuration information
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CN101452427A (en
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石艳
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Beijin Hongqi Shengli Technology Development Co Ltd
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Beijin Hongqi Shengli Technology Development Co Ltd
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Abstract

The invention provides a DMA data transmission system, a DMA data transmission method and a central processing unit. The DMA data transmission system is arranged inside the CPU. The transmission system comprises a data storage, a list register, a DMA manager, and a DMA, wherein the data storage is used for storing a plurality of DMA data configuration information; the list register is used for storing storage position information of the configuration information; the information in the data storage and the list register is configured by the CPU; the DMA manger is used for acquiring the storage position information from the list register, acquiring the configuration information from corresponding positions of the data storage, and configuring the information to the DMA; and the DMA is used for executing data transmission. In the invention, the CPU performs information configuration on the DMA through an internal connection line of the CPU, which saves bus resources; the DMA manger and the list register are arranged, so the CPU can send the configuration information transmitted by multi-segment data to the DMA at one time, and the DMA uninterruptedly executes multi-segment data transmission, thereby improving the work efficiency of the CPU and the DMA.

Description

A kind of DMA data transmission system and method and a kind of central processing unit
Technical field
The present invention relates to the DMA technical field of data transmission, particularly relate to a kind of DMA data transmission system and method and a kind of central processing unit.
Background technology
Direct memory access (DMA) (DMA, Direct Memory Access) is an important technology that improves the microsystem data transmission efficiency.DMA directly transmits data at storer and I/O equipment room, does not need the participation of CPU.
In the microsystem of supporting the dma mode data transmission, DMA and CPU are articulated on the system bus, and the passage of data transmission is provided by bus.When system equipment produced the DMA demand, this system equipment sent request to DMA; After DMA receives request, send out a signal to CPU, application takies system bus or diverts one or several cpu cycle; After CPU obtains this signal, give DMA with the control of system bus, be implemented in and storer and system equipment between directly transmitted data by DMA control system bus data transmission work this moment.Because DMA is arranged on the CPU outside, thus DMA and CPU need through bus finish access control power alternately, and CPU need pass through bus and carry out information configuration to DMA; And bus width is limited, and when a plurality of transformation task, transmission speed can be affected.
The DMA of widespread use at present generally is the carrying of carrying out one-dimensional data, and promptly the source address space of DMA or the target address space are one section continuous storage space.And in practical operation, need carry the discontinuous one-dimensional data of multistage through regular meeting, and promptly data storage is in a plurality of discontinuous storage space, and each storage space home address is continuous.
The process of the discontinuous one-dimensional data of existing DMA transmission multistage is: DMA sends interrupt request to CPU, and CPU transmits the information configuration of one section one-dimensional data to DMA, and DMA begins to transmit data, after data transmission finishes, repeats aforementioned operation.Promptly after the transmission of each section one-dimensional data, all to send to CPU and interrupt, and DMA be transmitted the information configuration of next section one-dimensional data by CPU by DMA.Operation increases burden and the repeatedly interruption meeting of CPU is to total system, reduces the work efficiency of CPU, has reduced the speed of data transmission simultaneously.
Hence one can see that, a technical matters that presses for those skilled in the art's solution at present is exactly: the speed that how to improve DMA transmission data, and when the discontinuous one-dimensional data of transmission multistage, how to improve the work efficiency of CPU and the transmission speed that improves DMA.
Summary of the invention
Technical matters to be solved by this invention provides a kind of DMA data transmission system and method and a kind of CPU, can improve the speed of DMA transmission data, and when the discontinuous one-dimensional data of transmission multistage, improve the work efficiency of CPU and the transmission speed of DMA greatly.
In order to address the above problem, the invention discloses a kind of DMA data transmission system, described DMA data transmission system is arranged at CPU inside, and by system bus and CPU PERCOM peripheral communication, system bus is provided with the data-interface that is exclusively used in dma controller, and described data transmission system comprises:
Data-carrier store is used to store a plurality of DMA data configuration information;
The tabulation register is used to store the stored position information of described DMA data configuration information;
Information in described data-carrier store and the tabulation register is once disposed by CPU to be finished;
Dma manager is used for obtaining from described tabulation register the stored position information of described configuration information, and obtains described configuration information from the relevant position of described data-carrier store, and dma controller is given in configuration;
Dma controller is used for carrying out data transmission according to described configuration information;
Wherein, dma manager is given dma controller with the information configuration of data transmission next time after each data transmission is finished.
Concrete, described configuration information comprises: source address information, target address information, data length information and control information.
Further, described control information comprises that one is judged the position, is used to judge whether dma controller continues to carry out data transmission.
Preferably, described data transmission system also comprises totalizer, after each data transmission is finished, when carrying out next time data transmission, dma manager is provided with described totalizer the stored position information in the described tabulation register is carried out additive operation, obtains the stored position information of DMA data configuration information next time.
In order to address the above problem, the invention also discloses a kind of DMA data transmission method, described method comprises:
CPU carries out following operation by internal data line: repeatedly DMA data configuration information stores is to data-carrier store; And store the stored position information of described DMA data configuration information into the tabulation register;
Dma manager obtains the stored position information of DMA configuration information successively from described tabulation register, and obtains described configuration information successively from the relevant position of described data-carrier store, and the dma controller that is arranged at CPU inside is given in configuration;
Described dma controller according to described configuration information transmission data, communicates by exclusive data interface and the CPU outside of being located on the system bus successively;
Wherein, the information in data-carrier store and the tabulation register is once disposed by CPU and finishes; After each data transmission was finished, dma manager disposed next time the information of data transmission and gives dma controller.
Further, described configuration information comprises that is judged a position; When described dma manager obtains described configuration information successively from described data-carrier store, read described judgement position, be used to judge whether dma controller continues to transmit data.
Concrete, after each data transmission was finished, when carrying out next time data transmission, dma manager was provided with described totalizer the stored position information in the described tabulation register is carried out additive operation, obtains the stored position information of DMA data configuration information next time.
The invention also discloses a kind of central processing unit, this central processing unit comprises master controller, memory controller and arithmetical unit, further comprise the DMA data transmission system, described DMA data transmission system is arranged at CPU inside, and by system bus and CPU PERCOM peripheral communication, system bus is provided with the data-interface that is exclusively used in dma controller, and described DMA data transmission system comprises:
Data-carrier store is used to store a plurality of DMA data configuration information;
The tabulation register is used to store the stored position information of described DMA data configuration information;
Described data-carrier store and the information of tabulation in the register are that the master controller by CPU once disposes and finishes;
Dma manager is used for obtaining from described tabulation register the stored position information of described configuration information, and obtains described configuration information from the relevant position of described data-carrier store, and dma controller is given in configuration; Dma controller is used for carrying out data transmission according to described configuration information
Wherein, dma manager is given dma controller with the information configuration of data transmission next time after each data transmission is finished.
Compared with prior art, the present invention has the following advantages:
In solution of the present invention, DMA is positioned at CPU inside, thus when the data transmission of carrying out between CPU inside and the CPU outside, just finished replacing of access control power by the line of CPU inside between DMA and the CPU, and CPU carries out information configuration by the line of CPU inside to DMA, thereby saved bus resource, reduced taking of bus bandwidth.
In addition, dma manager and tabulation register have been increased among the present invention, when the discontinuous one-dimensional data of needs transmission multistage, CPU can once send to DMA to the configuration information of a plurality of data transmission, DMA can continually execute the multiple segment data transmission, thereby significantly reduced the number of times that CPU interrupts, improved the work efficiency of CPU and DMA.
Description of drawings
Fig. 1 is the structural representation of DMA data transmission system embodiment of the present invention;
Fig. 2 is the flow chart of steps of DMA data transmission method embodiment 1 of the present invention;
Fig. 3 is the flow chart of steps of DMA data transmission method embodiment 2 of the present invention.
Embodiment
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, the present invention is further detailed explanation below in conjunction with the drawings and specific embodiments.
With reference to Fig. 1, show a kind of DMA data transmission system of the present invention embodiment, described DMA data transmission system is arranged at CPU inside, and by system bus and CPU PERCOM peripheral communication, described data transmission system specifically can comprise:
Data-carrier store 101 is used to store a plurality of DMA data configuration information.Wherein, described configuration information is source address information, target address information, data length information and the control information of data transmission.Preferably, comprise in the described control information that one is judged the position, is used to judge whether DMA continues to carry out data transmission.When judging that DMA stops to carry out data transmission, can send to CPU and interrupt notice CPU; Also can not send to CPU and interrupt, just stop to carry out data transmission, this moment, CPU can obtain the state of DMA by the mode of checking.
Tabulation register 102 is used to store the stored position information of described DMA data configuration information.Wherein, the information in described data-carrier store and the tabulation register is all disposed by CPU.
Dma manager 103, be used for obtaining the stored position information of described configuration information from described tabulation register, and obtain described configuration information from the relevant position of described data-carrier store, DMA104 is given in configuration, promptly, store in the register of DMA104 the source address information of described data transmission, target address information, data length information and control information.
DMA104 is used for carrying out data transmission according to described configuration information, promptly data designated is transferred to destination address from source address.
Further, the information in described data-carrier store and the tabulation register is once disposed by CPU to be finished, and can reduce the number of times that CPU interrupts thus greatly, improves CPU to work efficiency, also improves DMA to transfer efficiency.
Dma manager then is to dispose DMA successively, promptly after each data transmission is finished, gives DMA with the information configuration of data transmission next time.
Concrete, described data transmission system also comprises a totalizer, after each data transmission is finished, when carrying out next time data transmission, dma manager is provided with described totalizer the stored position information in the described tabulation register is carried out additive operation, obtains the stored position information of next DMA data configuration information.Because the length of each configuration information is a definite value, can add the above definite value on the stored position information of a last configuration information, is the stored position information of next configuration information.The process of described addition is finished by dma manager control totalizer.Be that CPU only needs the stored position information of first DMA data configuration information is disposed to the tabulation register, the stored position information of ensuing configuration information all carries out additional calculation by totalizer and obtains.
Data transmission system of the present invention is in CPU inside, and promptly DMA is in CPU inside, and when DMA and peripheral hardware carried out data transmission, DMA linked to each other by the bus data Interface ﹠ Bus of CPU.And a preferred scheme is that the data-interface be exclusively used in DMA is set on bus, and this has just been avoided the competition of DMA and original cpu bus interface, and special-purpose data-interface ratio is set is easier to realization, and cost is low.
With reference to Fig. 2, show a kind of method embodiment 1 based on DMA data transmission system of the present invention, described method specifically can may further comprise the steps:
Step 201, when the discontinuous one-dimensional data of multistage need transmit, CPU just will need repeatedly the configuration information of DMA transmission data to store in the data-carrier store.
Preferably, comprise source address information, target address information, data length information and control information in the described configuration information.Comprise in the control information that is wherein judged a position, i.e. last in control information, with a byte as judging.For example: judge that the position can be that next 0 or 1,0 expression also has the DMA transmission, dma manager just then obtains the stored position information of next DMA configuration information from described tabulation register; The all DMA end of transmission (EOT) of 1 expression after DMA executes this data transfer, just stop data transmission.Another kind of scheme is, a DMA the number of transmissions register can be set, and by the number of times of record DMA transmission, judges whether DMA continues to transmit data.
Step 202, CPU stores the stored position information of described DMA data configuration information in the tabulation register into.
Preferably, when carrying out above-mentioned steps 201 and step 202, CPU can only interrupt once, just all configuration informations that need is all stored in the data-carrier store, and all stored position informations that need are stored in the tabulation register.Thus, when the discontinuous one-dimensional data of transmission multistage, reduce the number of times that CPU interrupts, improved the work efficiency of transfer efficiency and CPU.
Step 203, CPU configuration DMA starts working by dma manager.
Need to prove that in step 203, CPU carries out corresponding operation by internal data line in step 201, this is because DMA data transmission system of the present invention is positioned at CPU inside.Thus, be positioned at comparing of CPU outside with the DMA transmission system, CPU of the present invention has just avoided the competition with external bus when carrying out above-mentioned steps 201 to the operation of step 203, and in most cases the transmission speed of CPU internal data line is the twice of external bus transmission speed, and then has increased the work efficiency of CPU.
Further, DMA data transmission system of the present invention is positioned at CPU inside, to another beneficial effect of system is: when carrying out the JTAG debugging, can debug the DMA transmission system.This is because JTAG only knows the information of CPU intraware, and does not know the information of CPU external module, so when the DMA system is positioned at the CPU outside, just can't debug it.Wherein, a kind of international standard test protocol of JTAG (Joint TestAction Group, joint test behavior tissue).
Step 204, dma manager are obtained the stored position information of DMA configuration information successively from described tabulation register.
Step 205, according to the described stored position information that obtains, dma manager obtains described configuration information successively from the relevant position of described data-carrier store, and DMA is given in configuration.Described DMA is positioned at CPU inside in the present invention, and its structure and principle of work are same as the prior art, do not repeat them here.
Step 206, described DMA is successively according to described configuration information transmission data.Promptly, the data transmission of source address designated length is arrived destination address according to described configuration information.Wherein, DMA communicates by the interface and the external bus of CPU and external bus.The present invention preferably increases DMA exclusive data interface, is used for DMA and is connected with bus, carries out and the communicating by letter of CPU outside.
For those skilled in the art better understand the present invention, below further specify the method for DMA data transmission of the present invention by method embodiment 2.
For example: existing two sections discontinuous one-dimensional datas need be from the CPU external transmission to CPU inside.Concrete transmission method is referring to Fig. 3.
Step 301, CPU is stored in the configuration information of twice DMA transmission data in the data-carrier store; Wherein the DMA transmission of configuration information is stored in the 0xFF000000 place for the first time, specific configuration information is sourceaddress 0x10000000 destination address 0x00000000, data length register 0x00000100, control register 0x00000000, promptly transmit one piece of data to home address 0x00000000 from CPU external address 0x10000000, data length is 0x100, i.e. 256 bytes; The transmission configuration information stores is at the 0xFF000010 place for the second time, specific configuration information is source address0xF0000000 destination address 0x00001000, data length register 0x00000110, controller register 0x00000001, promptly transmit one piece of data to home address 0x00001000 from CPU external address 0xF0000000, data length is 0x110, i.e. 272 bytes.
Step 302, CPU configured list register is 0xFF000000, promptly points to the position of DMA configuration information storage for the first time.
Step 303, CPU configuration DMA starts working by dma manager.
Step 304, dma manager are obtained the stored position information 0xFF000000 of DMA configuration information for the first time from described tabulation register.
Step 305, dma manager obtains the configuration information of transmission for the first time from 0xFF000000, and described configuration information is disposed address register, data length register and the control register of DMA.
Step 306, DMA begins to transmit data according to described configuration information, and promptly transmitting length from CPU external address 0x10000000 to home address 0x00000000 is the data of 256 bytes.
Step 307, dma manager judges whether to carry out data transmission next time according to last position of the control information in the control register.Because last position of the control information in the configuration information for the first time is 0, next expression also has the DMA data transmission, next carries out next step thus.
Step 308, dma manager carries out additive operation by described totalizer is set to the information in the tabulation register, obtains the stored position information of transmission for the second time.
Promptly by totalizer current stored position information and the addition of configuration information fixed-length value, 0xFF000000+0x00000010=0xFF000010 just obtains the stored position information 0xFF000010 of transmission for the second time.It is 0x00000010 that the configuration information fixed-length value is set herein, and just explanation for example can not be regarded limitation of the present invention as, and described fixed-length value can also be being worth accordingly with configuration information of other.
Step 309, dma manager obtains the configuration information of transmission for the second time from address 0xFF000010, and described configuration information is disposed address register, data length register and the control register of DMA.
Step 310, DMA begins to transmit data according to described configuration information, and promptly transmitting length from CPU external address 0xF0000000 to home address 0x00001000 is the data of 272 bytes.
Step 311, dma manager is 1 according to last position of the control information in the described transmission second time, judges that end data is transmitted after the second time, the DMA transmission was finished, and sends to CPU and interrupts.
Certainly said method is a concrete example, and when the discontinuous one-dimensional data of multistage need transmit, detailed process was similar to the above.Certainly, the present invention can realize the transmission from the CPU outside to CPU inside for the transmission of data, also can realize the inner transmission to the CPU outside of CPU, and detailed process repeats no more.
The present invention also shows a kind of CPU embodiment, and described CPU also comprises the DMA data transmission system except comprising master controller, memory controller and arithmetical unit.For described master controller, memory controller and arithmetical unit, belong to prior art, do not repeat them here.Following mask body place of matchmakers states the DMA data transmission system, and this system comprises:
Data-carrier store is used to store a plurality of DMA data configuration information;
The tabulation register is used to store the stored position information of described DMA data configuration information;
Wherein, the information in described data-carrier store and the tabulation register is disposed by master controller;
Dma manager is used for obtaining from described tabulation register the stored position information of described configuration information, and obtains described configuration information from the relevant position of described data-carrier store, and DMA is given in configuration;
Described DMA is used for carrying out data transmission according to described configuration information.
Each embodiment in this instructions all adopts the mode of going forward one by one to describe, and what each embodiment stressed all is and the difference of other embodiment that identical similar part is mutually referring to getting final product between each embodiment.
More than to a kind of DMA data transmission system provided by the present invention and method and a kind of central processing unit, be described in detail, used specific case herein principle of the present invention and embodiment are set forth, the explanation of above embodiment just is used for helping to understand method of the present invention and core concept thereof; Simultaneously, for one of ordinary skill in the art, according to thought of the present invention, the part that all can change in specific embodiments and applications, in sum, this description should not be construed as limitation of the present invention.

Claims (8)

1. a DMA data transmission system is characterized in that,
Described DMA data transmission system is arranged at CPU inside, and by system bus and CPU PERCOM peripheral communication, system bus is provided with the data-interface that is exclusively used in dma controller, and described data transmission system comprises:
Data-carrier store is used to store a plurality of DMA data configuration information;
The tabulation register is used to store the stored position information of described DMA data configuration information;
Information in described data-carrier store and the tabulation register is once disposed by CPU to be finished;
Dma manager is used for obtaining from described tabulation register the stored position information of described configuration information, and obtains described configuration information from the relevant position of described data-carrier store, and dma controller is given in configuration;
Dma controller is used for carrying out data transmission according to described configuration information;
Wherein, dma manager is given dma controller with the information configuration of data transmission next time after each data transmission is finished.
2. data transmission system according to claim 1 is characterized in that, described configuration information comprises:
Source address information, target address information, data length information and control information.
3. data transmission system according to claim 2 is characterized in that, described control information comprises that one is judged the position, is used to judge whether dma controller continues to carry out data transmission.
4. data transmission system according to claim 3, it is characterized in that, also comprise totalizer, after each data transmission is finished, when carrying out next time data transmission, dma manager is provided with described totalizer the stored position information in the described tabulation register is carried out additive operation, obtains the stored position information of DMA data configuration information next time.
5. a DMA data transmission method is characterized in that, described method comprises:
CPU carries out following operation by internal data line: repeatedly DMA data configuration information stores is to data-carrier store; And store the stored position information of described DMA data configuration information into the tabulation register;
Dma manager obtains the stored position information of DMA configuration information successively from described tabulation register, and obtains described configuration information successively from the relevant position of described data-carrier store, and the dma controller that is arranged at CPU inside is given in configuration;
Described dma controller according to described configuration information transmission data, communicates by exclusive data interface and the CPU outside of being located on the system bus successively;
Wherein, the information in data-carrier store and the tabulation register is once disposed by CPU and finishes; After each data transmission was finished, dma manager disposed next time the information of data transmission and gives dma controller.
6. data transmission method according to claim 5 is characterized in that,
Described configuration information comprises that is judged a position;
When described dma manager obtains described configuration information successively from described data-carrier store, read described judgement position, be used to judge whether dma controller continues to transmit data.
7. data transmission method according to claim 5 is characterized in that,
After each data transmission was finished, when carrying out next time data transmission, dma manager was provided with described totalizer the stored position information in the described tabulation register is carried out additive operation, obtains the stored position information of DMA data configuration information next time.
8. central processing unit, comprise master controller, memory controller and arithmetical unit, it is characterized in that, also comprise the DMA data transmission system, described DMA data transmission system is arranged at CPU inside, and by system bus and CPU PERCOM peripheral communication, system bus is provided with the data-interface that is exclusively used in dma controller, and described DMA data transmission system comprises:
Data-carrier store is used to store a plurality of DMA data configuration information;
The tabulation register is used to store the stored position information of described DMA data configuration information;
Described data-carrier store and the information of tabulation in the register are that the master controller by CPU once disposes and finishes;
Dma manager is used for obtaining from described tabulation register the stored position information of described configuration information, and obtains described configuration information from the relevant position of described data-carrier store, and dma controller is given in configuration;
Dma controller is used for carrying out data transmission according to described configuration information;
Wherein, dma manager is given dma controller with the information configuration of data transmission next time after each data transmission is finished.
CN2008102266644A 2008-11-19 2008-11-19 DMA data-transmission system and method, and central processing unit Expired - Fee Related CN101452427B (en)

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CN104123252A (en) * 2013-04-26 2014-10-29 韩国科亚电子股份有限公司 Multi-channel direct memory access controller and control method thereof
CN104461970B (en) * 2013-09-18 2019-06-11 中兴通讯股份有限公司 Dma controller, mobile terminal and data method for carrying
CN107832240B (en) * 2017-10-27 2020-06-09 北京腾凌科技有限公司 DMA data interaction method and device based on information recording structure
CN109074335A (en) * 2017-12-29 2018-12-21 深圳市大疆创新科技有限公司 Data processing method, equipment, dma controller and computer readable storage medium
WO2020232705A1 (en) * 2019-05-23 2020-11-26 深圳市大疆创新科技有限公司 Data movement method, calculating and processing device, apparatus, and storage medium
CN112540730B (en) * 2020-12-14 2022-02-08 无锡众星微系统技术有限公司 Dynamically reconfigurable DMA array
CN112579278B (en) * 2020-12-24 2023-01-20 海光信息技术股份有限公司 Central processing unit, method, device and storage medium for simultaneous multithreading

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