CN101442076A - Device structure of SONOS memory tube and method for producing the same - Google Patents
Device structure of SONOS memory tube and method for producing the same Download PDFInfo
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- CN101442076A CN101442076A CNA2007100942703A CN200710094270A CN101442076A CN 101442076 A CN101442076 A CN 101442076A CN A2007100942703 A CNA2007100942703 A CN A2007100942703A CN 200710094270 A CN200710094270 A CN 200710094270A CN 101442076 A CN101442076 A CN 101442076A
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Abstract
The invention discloses a device structure of an SONOS storage tube. The middle part of a substrate is provided with a gate oxide layer, and a selection tube is arranged above the gate oxide layer; both sides of the gate oxide layer and the selection tube are provided with L-shaped ONO layers with outward gap respectively; the storage tubes are arranged on the gaps of the ONO layers; and on the substrate of the two storage tubes and the outer side of the ONO layers, one side is provided with a source electrode, while the other side is provided with a drain electrode. The invention also discloses a method for manufacturing the device structure of the SONOS storage tube, wherein the side wall is etched to form the SONOS storage tube, and a dibit SONOS storage unit simultaneously; and the manufacturing method is simple in procedure and easy to implement; moreover, the area of the storage unit occupied by the SONOS storage tube is greatly reduced, and the performance of the device is improved.
Description
Technical field
The present invention relates to a kind of semiconductor device, especially a kind of device architecture of SONOS storage tube.The invention still further relates to a kind of manufacture method of device architecture of SONOS storage tube.
Background technology
Charge trapping for dwindling flash memory (charge trapping) device is an extraordinary structure of electric property, and this structure is the trend of art technology development.And this device has very simple manufacture craft, be convenient to very much manufacturing of mass, this device is exactly usually said SONOS device (polysilicon-oxide-nitride-oxide-silicon, polysilicon-silicon dioxide-silicon nitride-silicon dioxide-silicon).And the area of the memory cell of common SONOS structure is bigger comparatively speaking, has limited to using and promoting of SONOS device.
Summary of the invention
Technical problem to be solved by this invention provides a kind of device architecture of SONOS storage tube, and the manufacture method of this SONOS storage tube device architecture, obtain the device architecture of SONOS storage tube by comparatively simple method making, and make the area of the memory cell that the SONOS storage tube is shared reduce greatly.
For solving the problems of the technologies described above, the technical scheme of the device architecture of SONOS storage tube of the present invention is, the substrate middle part is provided with gate oxide, described gate oxide top is provided with selects pipe, the both sides of described gate oxide and selection pipe are respectively arranged with outside " L " shape ONO (silicon dioxide-silicon nitride-silicon dioxide) layer of breach, the gap position of described ONO layer is provided with storage tube, on the substrate in the outside of described two storage tubes and ONO layer, one side is provided with source electrode, and opposite side is provided with drain electrode.
The technical scheme of the manufacture method of SONOS storage tube device architecture of the present invention is in turn include the following steps:
(1) adopts conventional cmos device manufacture craft, form described selection pipe by photoetching and etching;
(2) deposit ONO layer, growing polycrystalline silicon on described ONO layer afterwards;
(3) remove ONO layer and polysilicon more than the described selection pipe by the side wall etching, and form storage tube, reserve the position of source electrode and drain electrode;
(4) source electrode and drain electrode injection are carried out in the position of reserving in step (3);
(5) adopt the conventional cmos device making technics to finish other step of element manufacturing.
The present invention utilizes the side wall etching to form the SONOS storage tube, and form the SONOS memory cell of dibit simultaneously, its manufacture method step is simple, is easy to realize, and make the area of the memory cell that the SONOS storage tube is shared reduce greatly, improved the performance of device.
Description of drawings
The present invention is further detailed explanation below in conjunction with drawings and Examples:
Fig. 1 is the structural representation of the device architecture of SONOS storage tube of the present invention;
Fig. 2 carries out the schematic diagram of write operation to bit 1 for the device architecture of SONOS storage tube of the present invention;
Fig. 3 carries out the schematic diagram of write operation to bit 2 for the device architecture of SONOS storage tube of the present invention;
Fig. 4 carries out the schematic diagram of erase operation to bit 1 and bit 2 for the device architecture of SONOS storage tube of the present invention;
Fig. 5 is the schematic diagram that the device architecture of SONOS storage tube of the present invention carries out read operation to bit 1;
Fig. 6 is the schematic diagram that the device architecture of SONOS storage tube of the present invention carries out read operation to bit 2;
Fig. 7～Fig. 9 is the schematic diagram of each step of manufacture method of SONOS storage tube device architecture of the present invention;
Figure 10 is the schematic diagram of an embodiment of the device architecture of SONOS storage tube of the present invention.
Embodiment
The invention provides a kind of device architecture of SONOS storage tube, as shown in Figure 1, the substrate middle part is provided with gate oxide, described gate oxide top is provided with selects pipe, described gate oxide and select the both sides of pipe to be respectively arranged with outside " L " shape ONO layer of breach, the gap position of described ONO layer is provided with storage tube, on the substrate in the outside of described two storage tubes and ONO layer, one side is provided with source electrode, and opposite side is provided with drain electrode.
Described ONO layer comprises two-layer silicon dioxide layer and is clipped in silicon nitride layer between the described two-layer silicon dioxide layer that the thickness of described lower floor silicon dioxide layer is 15～25
, the thickness of the silicon nitride layer of described centre is 60～120
, the thickness of described upper strata silicon dioxide layer is 40～80
Include two bit cells in the device architecture of SONOS storage tube of the present invention, be respectively bit 1 and bit 2, its course of work is as described below:
Referring to shown in Figure 2, when bit 1 is carried out write operation, source electrode is added 1.8V voltage, storage tube to bit 1 adds 5V voltage, adds 1.8V voltage to selecting pipe, and the storage tube of bit 2 is added 5V voltage, drain electrode is added 0V voltage, and electronics flows into the storage tube of bit 1, finishes the write operation of bit 1.
Referring to shown in Figure 3, when bit 2 is carried out write operation, source electrode is added 0V voltage, storage tube to bit 1 adds 5V voltage, adds 1.8V voltage to selecting pipe, and the storage tube of bit 2 is added 5V voltage, drain electrode is added 1.8V voltage, and electronics flows into the storage tube of bit 2, finishes the write operation of bit 2.
Referring to shown in Figure 4, when bit 1 and bit 2 are carried out erase operation, source electrode is added 4V voltage, storage tube to bit 1 adds-5V voltage, to selecting to manage not making alive, the storage tube of bit 2 is added-5V voltage, drain electrode is added 4 voltages, electronics flows out from the storage tube of bit 1 and bit 2, finishes the erase operation of bit 1 and bit 2.
Referring to shown in Figure 5, when bit 1 is carried out read operation, source electrode is added 1.8V voltage, the storage tube of bit 1 is added 0V voltage, add 5V voltage to selecting pipe, the storage tube of bit 2 is added 5V voltage, drain electrode is added 0V voltage, finish the read operation of bit 1.
Referring to shown in Figure 6, when bit 2 is carried out read operation, source electrode is added 0V voltage, the storage tube of bit 1 is added 5V voltage, add 5V voltage to selecting pipe, the storage tube of bit 2 is added 0V voltage, drain electrode is added 1.8V voltage, finish the read operation of bit 2.
The present invention also provides a kind of manufacture method of above-mentioned SONOS storage tube device architecture, in turn includes the following steps:
(1) adopts conventional cmos device manufacture craft, form described selection pipe by photoetching and etching, as shown in Figure 7;
(2) deposit ONO layer, growing polycrystalline silicon on described ONO layer afterwards, as shown in Figure 8;
(3) remove ONO layer and polysilicon more than the described selection pipe by the side wall etching, and form storage tube, reserve the position of source electrode and drain electrode;
(4) source electrode and drain electrode injection are carried out in the position of reserving in step (3), form device architecture as shown in Figure 9;
(5) adopt the conventional cmos device making technics to finish other step of element manufacturing.
SONOS storage tube device architecture of the present invention, can adopt the technology of 0.18um, as shown in figure 10, the width of the selection pipe of preparing is about 0.18um, and the size of storage tube is about 0.15um, and the area of the memory cell of whole dibit SONOS structure is 0.28um
2/ bit, and the SONOS structure memory cell area of existing employing 0.13um explained hereafter is about 0.69um
2/ bit, the present invention have reduced the shared area of device greatly, thereby have improved the performance of device.
In sum, the present invention utilizes the side wall etching to form the SONOS storage tube, and forms the SONOS memory cell of dibit simultaneously, its manufacture method step is simple, be easy to realize, and make the area of the memory cell that the SONOS storage tube is shared reduce greatly, improved the performance of device.
Claims (3)
1. the device architecture of a SONOS storage tube, it is characterized in that, the substrate middle part is provided with gate oxide, described gate oxide top is provided with selects pipe, described gate oxide and select the both sides of pipe to be respectively arranged with outside " L " shape ONO layer of breach, the gap position of described ONO layer is provided with storage tube, on the substrate in the outside of described two storage tubes and ONO layer, one side is provided with source electrode, and opposite side is provided with drain electrode.
2. the device architecture of SONOS storage tube according to claim 1 is characterized in that, described ONO layer comprises two-layer silicon dioxide layer and be clipped in silicon nitride layer between the described two-layer silicon dioxide layer that the thickness of described lower floor silicon dioxide layer is 15～25
, the thickness of the silicon nitride layer of described centre is 60～120
, the thickness of described upper strata silicon dioxide layer is 40～80
3. the manufacture method of a SONOS storage tube device architecture as claimed in claim 1 or 2 is characterized in that, in turn includes the following steps:
(1) adopts conventional cmos device manufacture craft, form described selection pipe by photoetching and etching;
(2) deposit ONO layer, growing polycrystalline silicon on described ONO layer afterwards;
(3) remove ONO layer and polysilicon more than the described selection pipe by the side wall etching, and form storage tube, reserve the position of source electrode and drain electrode;
(4) source electrode and drain electrode injection are carried out in the position of reserving in step (3);
(5) adopt the conventional cmos device making technics to finish other step of element manufacturing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2007100942703A CN101442076A (en) | 2007-11-23 | 2007-11-23 | Device structure of SONOS memory tube and method for producing the same |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2007100942703A CN101442076A (en) | 2007-11-23 | 2007-11-23 | Device structure of SONOS memory tube and method for producing the same |
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| CN101442076A true CN101442076A (en) | 2009-05-27 |
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| CNA2007100942703A Pending CN101442076A (en) | 2007-11-23 | 2007-11-23 | Device structure of SONOS memory tube and method for producing the same |
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Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102931196A (en) * | 2011-08-08 | 2013-02-13 | 上海华虹Nec电子有限公司 | SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) device |
| CN103367255A (en) * | 2012-03-26 | 2013-10-23 | 上海宏力半导体制造有限公司 | Manufacture method of multiple-time programmable silicon-oxide-nitride-oxide-silicon |
| CN103855161A (en) * | 2012-12-05 | 2014-06-11 | 上海华虹宏力半导体制造有限公司 | SONOS flash memory and manufacturing method thereof |
| CN103855163A (en) * | 2012-12-05 | 2014-06-11 | 上海华虹宏力半导体制造有限公司 | Two-bit SONOS flash memory and manufacturing method thereof |
| CN104465663A (en) * | 2014-12-31 | 2015-03-25 | 上海华虹宏力半导体制造有限公司 | Structure and manufacturing method of SONOS flash memory |
| CN104538363A (en) * | 2014-12-29 | 2015-04-22 | 上海华虹宏力半导体制造有限公司 | SONOS flash memory memorizer structure and manufacturing method |
| CN109119422A (en) * | 2018-08-28 | 2019-01-01 | 上海华虹宏力半导体制造有限公司 | 1.5-T SONOS device making technics method |
| CN110277399A (en) * | 2019-05-15 | 2019-09-24 | 上海华力集成电路制造有限公司 | SONOS memory and its manufacturing method |
| CN111179988A (en) * | 2019-12-05 | 2020-05-19 | 上海华虹宏力半导体制造有限公司 | 2bit memory unit structure and operation method |
-
2007
- 2007-11-23 CN CNA2007100942703A patent/CN101442076A/en active Pending
Cited By (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102931196A (en) * | 2011-08-08 | 2013-02-13 | 上海华虹Nec电子有限公司 | SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) device |
| CN102931196B (en) * | 2011-08-08 | 2015-04-08 | 上海华虹宏力半导体制造有限公司 | SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) device |
| CN103367255A (en) * | 2012-03-26 | 2013-10-23 | 上海宏力半导体制造有限公司 | Manufacture method of multiple-time programmable silicon-oxide-nitride-oxide-silicon |
| CN103855161A (en) * | 2012-12-05 | 2014-06-11 | 上海华虹宏力半导体制造有限公司 | SONOS flash memory and manufacturing method thereof |
| CN103855163A (en) * | 2012-12-05 | 2014-06-11 | 上海华虹宏力半导体制造有限公司 | Two-bit SONOS flash memory and manufacturing method thereof |
| CN103855161B (en) * | 2012-12-05 | 2016-06-08 | 上海华虹宏力半导体制造有限公司 | A kind of SONOS flash memories and manufacture method thereof |
| CN103855163B (en) * | 2012-12-05 | 2016-12-21 | 上海华虹宏力半导体制造有限公司 | Two bit SONOS flash memories and manufacture methods thereof |
| CN104538363B (en) * | 2014-12-29 | 2017-12-05 | 上海华虹宏力半导体制造有限公司 | The structure and manufacture method of SONOS flash memories |
| CN104538363A (en) * | 2014-12-29 | 2015-04-22 | 上海华虹宏力半导体制造有限公司 | SONOS flash memory memorizer structure and manufacturing method |
| CN104465663A (en) * | 2014-12-31 | 2015-03-25 | 上海华虹宏力半导体制造有限公司 | Structure and manufacturing method of SONOS flash memory |
| CN109119422A (en) * | 2018-08-28 | 2019-01-01 | 上海华虹宏力半导体制造有限公司 | 1.5-T SONOS device making technics method |
| CN109119422B (en) * | 2018-08-28 | 2020-08-07 | 上海华虹宏力半导体制造有限公司 | Manufacturing process method of 1.5-T SONOS device |
| CN110277399A (en) * | 2019-05-15 | 2019-09-24 | 上海华力集成电路制造有限公司 | SONOS memory and its manufacturing method |
| US11088158B2 (en) | 2019-05-15 | 2021-08-10 | Shanghai Huali Integrated Circuit Corporation | SONOS memory and method for manufacturing the same |
| CN110277399B (en) * | 2019-05-15 | 2021-12-07 | 上海华力集成电路制造有限公司 | SONOS memory and manufacturing method thereof |
| CN111179988A (en) * | 2019-12-05 | 2020-05-19 | 上海华虹宏力半导体制造有限公司 | 2bit memory unit structure and operation method |
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Open date: 20090527 |