CN101421850A - Multiple dielectric FINFET structure and method - Google Patents

Multiple dielectric FINFET structure and method Download PDF

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Publication number
CN101421850A
CN101421850A CNA2005800084788A CN200580008478A CN101421850A CN 101421850 A CN101421850 A CN 101421850A CN A2005800084788 A CNA2005800084788 A CN A2005800084788A CN 200580008478 A CN200580008478 A CN 200580008478A CN 101421850 A CN101421850 A CN 101421850A
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fin
gate dielectric
transistor
thickness
finfet
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CN101421850B (en
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W·F·小克拉克
E·J·诺瓦克
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Core Usa Second LLC
GlobalFoundries Inc
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International Business Machines Corp
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Abstract

The invention discloses the method and structure that is used for fin-type field effect transistor (FinFET) structure, described FinFET structure has the gate dielectric (502,504) of covering from the different-thickness of the fin (112,113,114) of substrate (110) extension.These fins have central channel region, and in the source electrode (60) and drain electrode (62) district of the opposition side of channel region.Thicker gate dielectric (504) can comprise a plurality of dielectric layers (200,500), and thin gate dielectric (502) can comprise less dielectric layer (200).The coating (116) that comprises the material different with gate dielectric can be set on fin.

Description

Multiple dielectric finfet structure and method
Technical field
The present invention relates generally to fin-type field effect transistor (FinFET), more particularly, relate to the improved FinFET structure that comprises a plurality of gate dielectric thicknesses.
Background technology
Along with the demand that reduces transistor size continues, transistor new and littler type is manufactured to come out.A nearest focus is exactly the introducing that is called as the fin-type field effect transistor of FinFET in the transistor technology.People's such as Hu United States Patent (USP) 6,413,802 (being called " Hu patent " later on) is here by comprising the center fin that has raceway groove along its center and in the source electrode of fin structure end and the FinFET structure of drain electrode with reference to introducing its content, disclosing.Grid conductor covers channel part.
When the FinFET structure reduced size based on transistor device, it was still important for continuing to improve FinFET.The method and structure of hereinafter describing that the invention provides improvement FinFET performance.
Summary of the invention
The invention provides the method that forms fin-type field effect transistor (FinFET), this method at first forms the first grid medium in patterns fins on the substrate and on fin.Then, the present invention uses mask protection first fin and removes the first grid medium from unprotected second fin.After removing mask from first fin, the present invention is on second fin and covering on the first grid medium of first fin and form the additional gate medium.This and second fin can form the gate dielectric of different-thickness on first fin when comparing.This technology also can form a plurality of dielectric layers and only forming the additional gate medium on second fin on first fin.
The processing step that is used to finish the FinFET structure comprises that the end of doping fin distinguishes source electrode and drain region and form grid conductor on channel region with the central channel that forms by fin.Gate dielectric is isolated channel region and grid conductor.
The present invention can utilize fin in the dissimilar transistors on substrate.In this case, one type transistor will comprise the gate dielectric with first thickness, and the transistor of second type will comprise the gate dielectric with second thickness different with first thickness.Equally, the present invention can utilize fin in many fins transistor.
This technology has been made has fin-type field effect transistor (FinFET) structure of covering from the gate dielectric of the different-thickness of the fin of substrate extension.These fins have central channel region and in the source electrode and the drain region of channel region opposition side.Equally, thicker gate dielectric can comprise a plurality of dielectric layers, and thin gate dielectric comprises less dielectric layer.The coating that comprises the material different with gate dielectric can be set on fin.
On the independent zones of circuit region (core, I/O, capacitor etc.), use different voltage ranges to need different medium thickness, with optimized device performance and reliability.The present invention proposes a kind of a plurality of thickness dielectric FinFET structure and method, to apply it in the WeiLai Technology.The present invention uses a plurality of gate dielectrics that device performance/reliability is optimized in the FinFET design, and uses the method for making them.By using a plurality of media to establish, meter the present invention avoids device electric fields being remained on than the relevant density of the complicated stacked scheme in the thin-medium dielectric imposed limits and the loss of performance with being designed for.The present invention has also expanded the ability of FinFET convergent-divergent.
These and other aspects of the present invention and purpose are by considering and will recognize well and understand with following description and accompanying drawing.Yet, be appreciated that when pointing out the preferred embodiments of the present invention and wherein numerous unique details, following description with for example rather than the form of restriction provide.Perhaps can make many variations and modification within the scope of the present invention under the premise of without departing from the spirit of the present invention, the present invention includes all such modifications.
Description of drawings
The present invention may be better understood by following detailed introduction with reference to the accompanying drawings, wherein:
Fig. 1 is the schematic diagram of the FinFET structure finished of part;
Fig. 2 is the schematic diagram of the FinFET structure finished of part;
Fig. 3 is the schematic diagram of the FinFET structure finished of part;
Fig. 4 is the schematic diagram of the FinFET structure finished of part;
Fig. 5 is the schematic diagram of the FinFET structure finished of part;
Fig. 6 is the schematic diagram of the FinFET structure finished of part;
Fig. 7 is the schematic diagram of the FinFET structure finished of part; And
Fig. 8 is the flow chart that the preferred method of the present invention is shown.
Embodiment
With reference to shown in the drawings and be described below in the non-limiting example introduced in detail, explain the present invention and various feature and advantage more completely.Notice that the feature shown in the accompanying drawing do not draw in proportion.In order not make the present invention obscure, omitted description to known elements and technology.Example used herein is only put into practice method of the present invention in order to help to understand, and further enables those skilled in the art to put into practice the present invention.Therefore, these examples should not be considered to limit the scope of the invention.
As shown in Figure 5, one embodiment of the present of invention provide fin-type field effect transistor (FinFET) structure, and described structure has the gate dielectric 502,504 of covering from the different-thickness of the fin 112-114 of substrate 110 extensions.Thicker gate dielectric 504 comprises a plurality of dielectric layers (200 and 500), and thin gate dielectric 502 comprises less dielectric layer (having only 500).In addition, when relatively the time, having consumed fin 114 more fin width because additional agents oxide 200 is handled with other fins 112,113, the fin 114 with additional agents layer 200 will less (narrower).The coating 116 that comprises the material different with gate dielectric can be placed on the fin 112-114.As shown in Figure 6, fin 66 has the central channel region that is covered by grid conductor 64, in the source electrode 60 and drain electrode 62 districts of the opposition side of channel region.
Fig. 1-5 shows a kind of illustrative methods that is used to form structure of the present invention.More particularly, Fig. 1 shows the fin 112-114 and the coating 116 of composition on substrate 110.Fig. 2 shows the first grid medium 200 of growing on fin 112-114.Then, the present invention uses mask 300 protections first fin 114, as shown in Figure 3.In Fig. 4, the present invention removes the first grid medium from unprotected second fin 112,113.Remove (as shown in Figure 5) behind the mask from first fin, the present invention is at second fin 112,113 and cover on the first grid medium 200 of first fin 114 and form additional gate medium 500.Equally, when with when single dielectric oxide 500 of carrying out on the fin 112,113 is handled relatively, because two dielectric oxide 200,500 is handled the more fin width that consumed fin 114, the fin 114 with additional agents layer 200 will less (narrower).
When with at the thickness of the medium 502 on second fin 112,113 relatively the time, this can form the gate dielectric 504 (and different in width fin) of different-thickness on first fin 114.This technology also can form a plurality of dielectric layers 200,500 on first fin 114, and only forms additional gate medium 500 on second fin.
Shown in Fig. 6 and 7, use as the additional process steps of in the Hu patent, describing and finish the FinFET structure.For example, the end of fin 66 is doped source electrode 60 and drain electrode 62 districts that distinguished by central channel to form.On the channel region of fin 66, form grid conductor 64.Gate dielectric 200,500 is isolated channel region and grid conductor 64.
Although the type of the FinFET of limited quantity shown in the drawings, those skilled in the art can be readily appreciated that the present invention can use fin in a lot of dissimilar transistors on substrate.For example, the present invention can form complementary transistor on same substrate, perhaps can form the transistor with different voltage requests on the zones of different of substrate.Therefore, in these cases, some type of transistor can comprise the gate dielectric with first thickness, and the other types transistor can comprise the gate dielectric with second thickness.Equally, the present invention can use fin in many fins transistor.Also have, those skilled in the art can be expressly understood very that the present invention has more than two kinds of different-thickness that are limited to gate dielectric.On the contrary, can form any amount of gate dielectric thicknesses by sheltering of in Fig. 3-5, showing of simple repetition with depositing operation.
Fig. 8 shows method of the present invention in a flowchart.More particularly, in item 800, the present invention is patterns fins on substrate, and in item 802, the present invention forms the first grid medium on fin.Then, the present invention uses mask protection first fin (804) and removes first grid medium 806 from unprotected second fin.After removing mask from first fin, the present invention is at second fin and cover on the first grid medium of first fin and form additional gate medium 808.When comparing with second fin, this forms the gate dielectric of different-thickness on first fin.For example, the thickness of a gate dielectric can be the twice of another gate dielectric thicknesses.This technology also can form a plurality of dielectric layers on first fin, and only forms the additional gate medium on second fin.On one group of FIN, form the n layer, on another group, form the n-1 layer, on the 3rd group, form n-2 layer etc., so this technology can repeat and is very flexible.The processing step that is used for finishing the FinFET structure comprises source electrode and the drain region 810 that doping fin end distinguishes with the central channel that forms by fin, and forms grid conductor 812 on channel region.
In addition, although above-mentioned a kind of method has been discussed, the distortion of this method is also included among the present invention.For example, Fig. 4 shows from selected fin and removes first grid medium 200, technology of the present invention can replace selectivity to postpone oxide growth (for example injecting fin sidewall by N2) in one group of FIN (112 and 113), carries out then to form first thickness on 112/113 and form single oxidation of second thickness (thicker fin) on 114.Another aspect of the present invention is that the present invention etches away the layer 200 on FIN112-113 behind grown layer 200 and protection FIN114.This has the effect of the main body of attenuate 112 and 113 when growth phase grow oxide (200) consume silicon.Fin in layer 500 growth back 112 and 113 is thinner than 114, and it is scaled on correct direction, for example wishes to have thicker oxide and thicker FIN main body for high voltage.
In addition, can use the suitable medium that is used as any kind of gate dielectric, comprise oxide, nitride, glass, silicones, or any high K media type etc.Person of skill in the art will appreciate that additional similarity method can use in spirit and scope of the invention.
On the independent zones of circuit region (core, I/O, capacitor etc.), use different voltage ranges to need different medium thickness, with optimized device performance and reliability.The invention discloses a kind of many thickness dielectric FinFET structure and method, to apply it in the WeiLai Technology.The present invention uses a plurality of gate dielectrics that device performance/reliability is optimized in the FinFET design, and uses the method for making them.By using a plurality of medium designs, the present invention has avoided device electric fields being remained on than the relevant density of the complicated stacked scheme in the thin-medium dielectric imposed limits and the loss of performance with being designed for.The present invention has also expanded the ability of FinFET convergent-divergent.
Although described the present invention, person of skill in the art will appreciate that the present invention can be by revising practice in the spirit and scope of appended claims according to preferred embodiment.

Claims (34)

1. a fin-type field effect transistor (FinFET) structure comprises:
Substrate;
Fin extends from described substrate; And
Gate dielectric covers described fin,
Wherein said gate dielectric has different thickness.
2. according to the FinFET structure of claim 1, wherein said fin is used for the dissimilar transistor on described substrate, and wherein one type transistor comprises the gate dielectric with first thickness, and the transistor of second type comprises the gate dielectric with second thickness different with described first thickness.
3. according to the FinFET structure of claim 1, wherein said fin is used for many fins transistor.
4. according to the FinFET structure of claim 1, wherein thicker gate dielectric comprises a plurality of dielectric layers, and thin gate dielectric comprises less dielectric layer.
5. according to the FinFET structure of claim 1, also be included in the coating on the described fin.
6. according to the FinFET structure of claim 5, wherein said coating comprises the material different with described gate dielectric.
7. a fin-type field effect transistor (FinFET) structure comprises:
Substrate;
Fin extends from described substrate, and wherein said fin comprises central channel region and in the source electrode and the drain region of described channel region opposition side; And
Gate dielectric covers the channel region of described fin,
Wherein said gate dielectric has different thickness with described fin.
8. according to the FinFET structure of claim 7, wherein said fin is used for the dissimilar transistor on described substrate, and wherein one type transistor comprises the gate dielectric with first thickness, and the transistor of second type comprises the gate dielectric with second thickness different with described first thickness.
9. according to the FinFET structure of claim 7, wherein said fin is used for many fins transistor.
10. according to the FinFET structure of claim 7, wherein thicker gate dielectric comprises a plurality of dielectric layers, and thin gate dielectric comprises less dielectric layer.
11. the FinFET structure according to claim 7 also is included in the coating on the described fin.
12. according to the FinFET structure of claim 11, wherein said coating comprises the material different with described gate dielectric.
13. a fin-type field effect transistor (FinFET) structure comprises:
Substrate;
Fin extends from described substrate; And
Gate dielectric covers described fin,
Wherein said fin is used for the dissimilar transistor on described substrate, and wherein the transistor of the first kind comprises the gate dielectric with first thickness, and the transistor of second type comprises the gate dielectric with second thickness different with described first thickness.
14. according to the FinFET structure of claim 13, wherein said fin is used for many fins transistor.
15. according to the FinFET structure of claim 13, wherein thicker gate dielectric comprises a plurality of dielectric layers, and thin gate dielectric comprises less dielectric layer.
16. the FinFET structure according to claim 13 also is included in the coating on the described fin.
17. according to the FinFET structure of claim 5, wherein said coating comprises the material different with described gate dielectric.
18. a method that forms fin-type field effect transistor (FinFET) structure, described method comprises:
Patterns fins on substrate;
On described fin, form the first grid medium;
Utilize mask protection first fin;
Remove described first grid medium from unprotected second fin;
Remove described mask from described first fin; And
Forming the additional gate medium on the described first grid medium of described first fin on described second fin and covering, on described first fin, to form the gate dielectric of different-thickness relatively the time with described second fin.
19. method according to claim 18, also be included in the dissimilar transistor on the described substrate and utilize described fin, wherein one type transistor comprises the gate dielectric with first thickness, and the transistor of second type comprises the gate dielectric with second thickness different with described first thickness.
20., also be included in and utilize described fin in many fins transistor according to the method for claim 18.
21. according to the method for claim 18, the described technology that wherein forms the additional gate medium forms a plurality of dielectric layers on described first fin, and only forms described additional gate medium on described second fin.
22. according to the method for claim 18, wherein the described technology of the described fin of composition forms coating on described fin.
23. according to the method for claim 22, wherein said coating comprises the material different with described gate dielectric.
24. a method that forms fin-type field effect transistor (FinFET) structure, described method comprises:
Patterns fins on substrate;
On described fin, form the first grid medium;
Utilize mask protection first fin;
Remove described first grid medium from unprotected second fin;
Remove described mask from described first fin;
Forming the additional gate medium on the described first grid medium of described first fin on described second fin and covering, on described first fin, forming the gate dielectric of different-thickness relatively the time, and forming different fin thickness with described second fin;
Source electrode and the drain region that the end of described fin distinguishes with the central channel that forms by described fin of mixing; And
Form grid conductor on described channel region, wherein said gate dielectric is isolated described channel region and described grid conductor.
25. method according to claim 24, also be included in the dissimilar transistor on the described substrate and utilize described fin, wherein one type transistor comprises the gate dielectric with first thickness, and the transistor of second type comprises the gate dielectric with second thickness different with described first thickness.
26., also be included in and utilize described fin in many fins transistor according to the method for claim 24.
27. according to the method for claim 24, the described technology that wherein forms the additional gate medium forms a plurality of dielectric layers on described first fin, and only forms described additional gate medium on described second fin.
28. according to the method for claim 24, wherein the described technology of the described fin of composition forms coating on described fin.
29. according to the method for claim 28, wherein said coating comprises the material different with described gate dielectric.
30. a method that forms fin-type field effect transistor (FinFET) structure, described method comprises:
Patterns fins on substrate;
On described fin, form the first grid medium;
Utilize mask protection first fin;
Remove described first grid medium from unprotected second fin;
Remove described mask from described first fin;
Forming the additional gate medium on the described first grid medium of described first fin on described second fin and covering, on described first fin, to form the gate dielectric of different-thickness relatively the time with described second fin;
Utilize described fin in the dissimilar transistor on described substrate, wherein one type transistor comprises the gate dielectric with first thickness, and the transistor of second type comprises the gate dielectric with second thickness different with described first thickness.
31., also be included in and utilize described fin in many fins transistor according to the method for claim 30.
32. according to the method for claim 30, the described technology that wherein forms the additional gate medium forms a plurality of dielectric layers on described first fin, and only forms described additional gate medium on described second fin.
33. according to the method for claim 30, wherein the technology of the described fin of composition forms coating on described fin.
34. according to the method for claim 33, wherein said coating comprises the material different with described gate dielectric.
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