CN101383355B - Pixel construction, display panel, photovoltaic device and production process thereof - Google Patents

Pixel construction, display panel, photovoltaic device and production process thereof Download PDF

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CN101383355B
CN101383355B CN2008101697008A CN200810169700A CN101383355B CN 101383355 B CN101383355 B CN 101383355B CN 2008101697008 A CN2008101697008 A CN 2008101697008A CN 200810169700 A CN200810169700 A CN 200810169700A CN 101383355 B CN101383355 B CN 101383355B
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patterned
patterned layer
layer
common electrode
conductive layer
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CN101383355A (en
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曾庆安
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AU Optronics Corp
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AU Optronics Corp
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Abstract

The invention provides a pixel structure, a display panel, a photo-electric device and a manufacturing method thereof. The pixel structure comprises a base plate, a first patterned conducting layer, a second patterned conducting layer and a pixel electrode, wherein the first patterned conducting layer is arranged on the base plate, and the first patterned conducting layer comprises a scanning line, a grid connected with the scanning line and common electrode lines; the second patterned conducting layer is arranged above the first patterned conducting layer, and the second patterned conducting layer comprises a data line staggered with the scanning line, a source/drain electrode connected with the data line and a first pattern layer positioned above partial common electrode lines; and the pixel electrode is arranged above the second patterned conducting layer and provided with a first part and a second part, wherein the first part is used for covering one part of first pattern layer and the partial common electrode line, the second part is used for covering the other part of the first pattern layer of the and is connected to the source/drain electrode, and the first pattern layer and the second part form a first capacitor.

Description

Dot structure, display floater, electrooptical device and manufacture method thereof
Technical field
The invention relates to a kind of dot structure and manufacture method thereof, and particularly relevant for a kind of display floater and electrooptical device and manufacture method thereof that increases the dot structure of storage capacitors and have this dot structure.
Background technology
At improving rapidly of multimedia society, be indebted to the tremendous progress of semiconductor element or display unit mostly.With regard to display, have that high image quality, space utilization efficient are good, (Thin Film Transistor Liquid CrystalDisplay TFT-LCD) becomes the main flow in market to the Thin Film Transistor-LCD of low consumpting power, advantageous characteristic such as radiationless gradually.
Thin Film Transistor-LCD (TFT-LCD) mainly is made of thin film transistor (TFT) array, colored filter and liquid crystal layer, and wherein thin film transistor (TFT) array is formed by the thin-film transistor of a plurality of arrayed and with the pixel electrode (pixel electrode) of the corresponding configuration of each thin-film transistor.And thin-film transistor is used as the switch element of liquid crystal display.In addition, in order to control other pixel cell, usually can be via scan wiring (scan line) and data wiring (date line) choosing specific pixel, and by suitable operating voltage is provided, to show the video data of corresponding this pixel.In addition, the structure of the storage capacitors in the known pixels structure 100 (storage capacitor) as shown in Figure 1, it comprises first patterned conductive layer 110 that is connected to common potential, second patterned conductive layer 120 that sees through contact hole 122 and electrically connect with pixel electrode 130, by this two conductive layer 110,120 to form storage capacitors.
At the framework of above-mentioned traditional storage capacitors, if increase the capacitance of storage capacitors, the practice is for increasing the area of first patterned conductive layer 110 and second patterned conductive layer 120 the most intuitively.But the area that increases conductive layer 110,120 can reduce the aperture opening ratio of this dot structure.
Summary of the invention
The invention provides a kind of dot structure, it utilizes structure Design, the storage capacitors amount of storage capacitors unit are can be promoted, and so can dwindle the shared area of reservior capacitor, and then increase the aperture opening ratio of dot structure.
The present invention provides a kind of one pixel structure process method in addition, and it can produce above-mentioned dot structure.
The present invention more provides a kind of display floater, and it has above-mentioned dot structure.
The present invention provides a kind of manufacture method of display floater again, and it can produce above-mentioned display floater.
The present invention more provides a kind of electrooptical device, and it has above-mentioned display floater, makes that it can be with the improved efficiency of storage capacitors unit are, and then makes aperture opening ratio strengthen.
The present invention provides a kind of manufacture method of above-mentioned electrooptical device again.
The present invention proposes a kind of dot structure, and this dot structure comprises substrate, first patterned conductive layer, second patterned conductive layer and pixel electrode.First patterned conductive layer is arranged on the substrate, and it comprises at least one scan line, at least one grid that is connected with scan line and at least one common electrode line, and wherein scan line is electrically insulated with electrode wires together.Second patterned conductive layer is arranged at the top of first patterned conductive layer, and it comprises at least one data wire staggered with scan line, at least one source that is connected with data wire/drain and is positioned at least one first patterned layer above the partial common electrode wires, wherein first patterned layer and data wire are electrically insulated, and grid, source electrode and drain electrode constitute at least one thin-film transistor.Pixel electrode is arranged at the top of second patterned conductive layer, and at least one second portion that it has at least one first and is electrically insulated with first, first patterned layer of first cover part and common electrode line partly, and first is connected with first patterned layer via at least one first contact hole and connects with electrode wires together via at least one second contact hole, and second portion covers first patterned layer of another part, wherein second portion is connected to source/drain electrode, and first patterned layer and second portion constitute at least one first electric capacity.
In one embodiment of this invention, first patterned conductive layer more comprises at least one second patterned layer.Second patterned layer is arranged on the substrate, and second patterned layer is positioned at the below of first patterned layer of part, and electrically be connected with the second portion of pixel electrode via at least one the 3rd contact hole, wherein second patterned layer is electrically insulated with electrode wires and scan line together, and first patterned layer and second patterned layer constitute at least one second electric capacity.
The present invention more proposes a kind of display floater, and it comprises above-mentioned dot structure.
The present invention reintroduces a kind of electrooptical device, and it comprises above-mentioned display floater.
The present invention proposes a kind of one pixel structure process method in addition, and it comprises the following steps.At first, provide substrate.Then, form first patterned conductive layer on substrate, it comprises at least one scan line, at least one grid that is connected with scan line and at least one common electrode line, and wherein scan line is electrically insulated with electrode wires together.Then, form second patterned conductive layer in the top of patterned conductive layer, it comprises at least one data wire staggered with scan line, at least one source that is connected with data wire/drain and is positioned at least one first patterned layer above the partial common electrode wires, wherein first patterned layer and data wire are electrically insulated, and grid, source electrode and drain electrode constitute at least one thin-film transistor.At last, top in second patterned conductive layer forms pixel electrode, at least one second portion that it has at least one first and is electrically insulated with first, first patterned layer of first cover part and common electrode line partly, and first is connected with first patterned layer via at least one first contact hole and connects with electrode wires together via at least one second contact hole, and second portion covers first patterned layer of another part, wherein second portion is connected to source/drain electrode, and first patterned layer and second portion constitute at least one first electric capacity.
In one embodiment of this invention, more comprise when on substrate, forming first patterned conductive layer and form at least one second patterned layer on substrate, and second patterned layer is positioned at the below of first patterned layer of part, and electrically be connected with the second portion of pixel electrode via at least one the 3rd contact hole, wherein second patterned layer is electrically insulated with electrode wires and scan line together, and first patterned layer and second patterned layer constitute at least one second electric capacity.
The present invention more proposes a kind of manufacture method of display floater, and it comprises above-mentioned one pixel structure process method.
The present invention reintroduces a kind of manufacture method of electrooptical device, and it comprises the manufacture method of above-mentioned display floater.
In sum, reservior capacitor in the dot structure of the present invention is that the common electrode line is electrically connected with at least one first patterned layer of second patterned conductive layer via at least one first of at least one second contact hole, pixel electrode and at least one first contact hole, so that the second portion of first patterned layer of second patterned conductive layer and pixel electrode produces at least one first electric capacity.In another embodiment, more utilize at least one second patterned layer of first patterned conductive layer and at least one first patterned layer of second patterned conductive layer to form at least one second electric capacity.By this, under the prerequisite of the storage capacitors value that can reach equivalence, can reduce the shared area of reservior capacitor, and then increase the aperture opening ratio of dot structure.
Description of drawings
Fig. 1 is the structure chart of the storage capacitors in the known pixels structure.
Fig. 2 A is the vertical view according to the dot structure of one embodiment of the invention.
Fig. 2 B is the perspective view of reservior capacitor region (corresponding I zone) in the dot structure of Fig. 2 A.
Fig. 3 A is the dot structure vertical view according to another embodiment of the present invention.
Fig. 3 B is the perspective view of reservior capacitor region (corresponding I ' zone) in the dot structure of Fig. 3 A.
Fig. 4 is the schematic diagram of a kind of display floater of one embodiment of the invention.
Fig. 5 is the schematic diagram of a kind of electrooptical device of one embodiment of the invention.
Drawing reference numeral:
100: dot structure
110: the first patterned conductive layers
120: the second patterned conductive layers
122: contact hole
130: pixel electrode
210: scan line
220: grid
230: the common electrode line
235: the first patterned conductive layers
240: data wire
245: the second patterned conductive layers
250: source/drain electrode
260: the first patterned layer
270: first
275: pixel electrode
280: second portion
290: the first contact holes
300: the second contact holes
310: the second patterned layer
320: the three contact holes
400: display floater
410: substrate
420: display medium
430: image element array substrates
500: electrooptical device
510: electronic component
C1: first electric capacity
C2: second electric capacity
Embodiment
For above-mentioned feature and advantage of the present invention can be become apparent, preferred embodiment cited below particularly, and cooperate appended graphicly, be described in detail below.
Embodiment one
Fig. 2 A is the vertical view according to the dot structure of one embodiment of the invention.And Fig. 2 B is the perspective view of reservior capacitor region (corresponding I zone) in the dot structure of Fig. 2 A.Please also refer to Fig. 2 A and Fig. 2 B, dot structure comprises first patterned conductive layer 235, second patterned conductive layer 245 and the pixel electrode 275 that is positioned on the substrate 200.
In the present embodiment, the material of substrate 200 is to comprise inorganic transparent material (as: glass, quartz or other suitable material or above-mentioned combination), organic transparent material (as: polyalkenes, poly-Hai class, polyalcohols, polyesters, rubber, thermoplastic polymer, thermosetting polymer, poly aromatic hydro carbons, poly-methyl propionyl acid methyl esters class, polycarbonate-based or other suitable material or above-mentioned derivative or above-mentioned combination), inorganic transparent materials (as: silicon chip, pottery or other suitable material or above-mentioned combination) or above-mentioned combination.
First patterned conductive layer 235 comprises scan line 210, grid 220 and common electrode line 230, and wherein scan line 210 is connected with grid 220.In the present embodiment, scan line 210 is electrically insulated with electrode wires 230 together and both be arranged in parallel and are example, but is not limited thereto.In other embodiment, common electrode line 230 more can comprise the part vertical with scan line 210, and makes the vertical view of common electrode line 230 present U-shaped, S shape, O shape, Z-shaped, W shape, V-arrangement, 8 fonts, B shape, C shape, D shape, F shape, H shape, L shaped, P shape or other suitable shape in fact.Above-mentioned design can increase outside the capacitance, still can reduce light leakage phenomena.Preferably, the vertical view of common electrode line 230 presents U-shaped, S shape, O shape, 8 fonts, B shape, C shape, D shape, F shape, H shape, L shaped or P shape in fact.In the present embodiment, first patterned conductive layer 235 can be the single or multiple lift structure, and its material can be metal, above-mentioned alloy, above-mentioned metal oxide, above-mentioned metal nitride or above-mentioned combinations such as gold, silver, copper, tin, lead, hafnium, tungsten, molybdenum, neodymium, titanium, tantalum, aluminium, zinc.In addition, present embodiment is that example illustrates with a scan line 210, a common electrode line 230 and a grid 220, but the invention is not restricted to this.In other embodiment, according to the designer demand can wherein at least one be designed at least one with scan line 210, common electrode line 230 and grid 220.
Second patterned conductive layer 245 is arranged on first patterned conductive layer 235, it comprises data wire 240, source/drain electrode 250 and first patterned layer 260, wherein data wire 240 is crisscross arranged with scan line 210, data wire 240 is connected with source/drain electrode 250, and first patterned layer 260 is electrically insulated with data wire 240.Second patterned conductive layer 245 can be the single or multiple lift structure, and its material can be metal, above-mentioned alloy, above-mentioned metal oxide, above-mentioned metal nitride or above-mentioned combinations such as gold, silver, copper, tin, lead, hafnium, tungsten, molybdenum, neodymium, titanium, tantalum, aluminium, zinc.In addition, present embodiment is to be example with a data wire 240, a source/drain electrode 250 and one first patterned layer 260, but the invention is not restricted to this.In other embodiment, can according to the designer demand can wherein at least one be designed at least one with data wire 240, source/drain electrode 250 and first patterned layer 260.For example: being adjacent to common electrode about 230 two ends shown in Fig. 2 A has two first patterned layer 260 to be used as example, but is not limited thereto, and also can only be adjacent to common electrode 230 1 ends or other position and have one or more first patterned layer 260.Or on a plurality of positions of Fig. 2 A, have one or more first patterned layer 260 on each position.
In addition, between first patterned conductive layer 235 and second patterned conductive layer 245, also comprise a layer insulating (not illustrating), it can be the single or multiple lift structure, and its material for example is an inorganic (as: silica, silicon nitride, silicon oxynitride, carborundum, hafnium oxide, aluminium oxide, or other material, or above-mentioned combination), organic material (as: photoresistance, benzocyclobutene (enzocyclobutane, BCB), the cyclenes class, polyimide, polyamide-based, polyesters, polyalcohols, the poly(ethylene oxide) class, the polyphenyl class, resinae, polyethers, the polyketone class, or other suitable material, or above-mentioned combination), or above-mentioned combination.
In addition, between grid 220 and source/drain electrode 250, also include one deck active layers 222, its material can be N type doping silicide or the P type doping silicide of above-mentioned lattice or germanium silicide or other material or the above-mentioned combination of above-mentioned lattice of amorphous silicon, monocrystalline silicon, microcrystal silicon, polysilicon or above-mentioned lattice, and the structure of active layers 222 can be single layer structure or sandwich construction.For example, the single layer structure that active layers 222 can be made up of amorphous silicon (a-Si) and/or N type heavily doped amorphous silicon, the also double-decker that can be made up of amorphous silicon (a-Si) and N type heavily doped amorphous silicon, the structural arrangement that it is above-mentioned can be horizontally and/or vertical arrangement.And above-mentioned grid 220, source/drain electrode 250 and active layers 222 promptly constitute a thin-film transistor.Present embodiment is to be example with the bottom gate type structure, but is not limited thereto, and also can use the top gate type structure.
Please continue with reference to figure 2A and Fig. 2 B, pixel electrode 275 is arranged on second patterned conductive layer 245 again, and it has first 270 and second portion 280, and wherein first 270 is electrically insulated from second portion 280.First patterned layer 260 of first 270 cover parts and the common electrode line 230 of part, and first 270 is connected with first patterned layer 260 via first contact hole 290, and first 270 is via usefulness electrode wires 230 connections together of second contact hole 300.Second portion 280 covers first patterned layer 260 of another part, and wherein second portion 280 is connected to source/drain electrode 250.In other words, the first 270 of pixel electrode 275 mainly is as the usefulness that connects the common electrode line 230 and first patterned layer 260, so that the common potential of common electrode line 230 is passed to first patterned layer 260, and the second portion 280 of pixel electrode 275 is only the effect as the main pixel electrode of dot structure.In addition, in the present embodiment, pixel electrode 275 can be the single or multiple lift structure, and its material comprises electrically conducting transparent material (as: indium tin oxide, indium-zinc oxide, indium tin zinc oxide, hafnium oxide, zinc oxide, aluminium oxide, aluminium tin-oxide, aluminium zinc oxide, cadmium tin-oxide, cadmium zinc oxide or above-mentioned combination), nontransparent material (as: gold, silver, copper, tin, aluminium, lead, molybdenum, titanium, tantalum, chromium, tungsten, vanadium, zinc or above-mentioned alloy or above-mentioned nitride or other suitable material or above-mentioned combination).
In addition; between the pixel electrode 275 and second patterned conductive layer 245, also comprise layer protective layer (not illustrating); it can be the single or multiple lift structure; and its material for example is an inorganic (as: silica; silicon nitride; silicon oxynitride; carborundum; hafnium oxide; aluminium oxide; or other material; or above-mentioned combination); organic material (as: photoresistance; benzocyclobutene (enzocyclobutane, BCB); the cyclenes class; polyimide; polyamide-based; polyesters; polyalcohols; the poly(ethylene oxide) class; the polyphenyl class; resinae; polyethers; the polyketone class; or other suitable material; or above-mentioned combination); or above-mentioned combination.
Particularly, please be simultaneously with reference to Fig. 2 A and Fig. 2 B, first patterned layer 260 of second patterned conductive layer 245 constitutes first capacitor C 1 with second portion 280 overlapping areas of pixel electrode 275.
Therefore, in the present embodiment, see through first 270, second contact hole 300 and first contact hole 290 of pixel electrode 275, the common potential with the common electrode line 230 of first patterned conductive layer 110 can be connected to first patterned layer 260 of second patterned conductive layer 245.By this, first patterned layer 260 with common potential just can produce capacitance coupling effect with the pixel current potential of the second portion 280 of pixel electrode 130, to form first capacitor C 1.
In addition, what deserves to be mentioned is that in the embodiment that Fig. 2 A is illustrated, the first 270 of first and second contact hole 290,300 and pixel electrode is all designed at the two ends of the common electrode line 230 in dot structure (and first patterned layer 260).Yet the invention is not restricted to this, the present invention also can only have the first of above-mentioned contact structure and pixel electrode in the wherein end design of common electrode line 230.In addition, the number of first and second contact hole 290,300 is not to be limited to embodiments of the invention, and the number of first and second contact hole 290,300 can be one or more.
Next will explain above-mentioned one pixel structure process method.
Please, provide a substrate 200 earlier with reference to Fig. 2 A and Fig. 2 B.On substrate 200, form first patterned conductive layer 245.Wherein, first patterned conductive layer 245 comprises scan line 210, the grid 220 that is connected with scan line 210 and common electrode line 230.In the present embodiment, scan line 210, grid 220 and common electrode line 230 form simultaneously, and scan line 210 is electrically insulated with electrode wires 230 together and both be arranged in parallel and are example, but are not limited thereto.In other embodiment, common electrode line 230 more can comprise the part vertical with scan line 210, and makes the vertical view of common electrode line 230 present U-shaped, S shape, O shape, Z-shaped, W shape, V-arrangement, 8 fonts, B shape, C shape, D shape, F shape, H shape, L shaped, P shape or other suitable shape in fact.Above-mentioned design can increase outside the capacitance, still can reduce light leakage phenomena.Preferably, the vertical view of common electrode line 230 presents U-shaped, S shape, O shape, 8 fonts, B shape, C shape, D shape, F shape, H shape, L shaped or P shape in fact.In addition, present embodiment is an example with a scan line 210, a common electrode line 230 and a grid 220, but is not limited thereto.In other embodiment according to the design demand can wherein at least one be designed at least one with scan line 210, common electrode line 230 and grid 220.
Afterwards, form second patterned conductive layer 245 in the top of first patterned conductive layer 235, it comprises data wire 240, source/drain electrode 250 that is connected with data wire 240 that interlocks with scan line 210 and first patterned layer 260 that is positioned at partial common electrode wires 230 tops.What deserves to be mentioned is that first patterned layer 260 is electrically insulated with data wire 240, and grid 220, source/drain electrode 250 formations one thin-film transistor.In addition, present embodiment is an example with a data wire 240, a source/drain electrode 250 and one first patterned layer 260, but is not limited thereto.In other embodiment according to the design demand can wherein at least one be designed at least one with data wire 240, source/drain electrode 250 and first patterned layer 260, for example: being adjacent to common electrode line about 230 two ends shown in Fig. 2 A respectively has two first patterned layer 260 to be used as example, but be not limited thereto, also can only be adjacent to common electrode line 230 1 ends or other position and have one or more first patterned layer 260.Or on a plurality of positions of Fig. 2 A, have one or more first patterned layer 260 on each position.
At last, top in second patterned conductive layer 245 forms pixel electrode 275, the second portion 280 that it has first 270 and is electrically insulated with first 270, first patterned layer 260 of first 270 cover parts and the common electrode line 230 of part, and first 270 is connected with first patterned layer 260 via first contact hole 290 and use electrode wires 230 to connect together via second contact hole 300, and second portion 280 covers first patterned layer 260 of another part, and wherein second portion 280 is connected to source/drain electrode 250.By this, the common potential of common electrode line 230 can be passed to first patterned layer 260, and can make first patterned layer 260 just can produce capacitance coupling effect with the pixel current potential of the second portion 280 of pixel electrode 130 with common potential, to form first capacitor C 1.In addition, what deserves to be mentioned is that in the embodiment that Fig. 2 A is illustrated, the first 270 of first and second contact hole 290,300 and pixel electrode is all designed at the two ends of the common electrode line 230 in dot structure (and first patterned layer 260).Yet the invention is not restricted to this, the present invention also can be only in the first that a wherein end or other Position Design of common electrode line 230 has above-mentioned contact structure and pixel electrode.In addition, the number of first and second contact hole 290,300 is not to be limited to embodiments of the invention, and the number of first and second contact hole 290,300 can be one or more.
Embodiment two
Fig. 3 A is the dot structure vertical view according to another embodiment of the present invention.And Fig. 3 B is the perspective view of reservior capacitor region (corresponding I ' zone) in the dot structure of Fig. 3 A.The mark of Fig. 3 A and Fig. 3 B is identical with Fig. 2 A and Fig. 2 B of above-mentioned first embodiment haply with description, therefore repeats part and will no longer describe in detail.But please also refer to Fig. 3 A and Fig. 3 B, dot structure comprises first patterned conductive layer 235, second patterned conductive layer 245 and the pixel electrode 275 that is positioned on the substrate 200.
First patterned conductive layer 235 comprises scan line 210, grid 220, common electrode line 230 and second patterned layer 310, and wherein scan line 210 is connected with grid 220.What be described in more detail is, scan line 210 is electrically insulated with electrode wires 230 together and both be arranged in parallel and are example, but is not limited thereto.In other embodiment, common electrode line 230 more can comprise the part vertical with scan line 210, and makes the vertical view of common electrode line 230 present U-shaped, S shape, O shape, Z-shaped, W shape, V-arrangement, 8 fonts, B shape, C shape, D shape, F shape, H shape, L shaped, P shape or other shape that is fit in fact.Above-mentioned design can increase outside the capacitance, still can reduce light leakage phenomena.Preferably, the vertical view of common electrode line 230 presents U-shaped, S shape, O shape, 8 fonts, B shape, C shape, D shape, F shape, H shape, L shaped or P shape in fact.In addition, present embodiment is an example with a scan line 210, a common electrode line 230 and a grid 220, but is not limited thereto.In other embodiment according to the design demand can wherein at least one be designed at least one with scan line 210, common electrode line 230 and grid 220.Second patterned layer 310 is electrically insulated with electrode wires 230 and scan line 210 together.Present embodiment is an example with two second patterned layer 310, but is not limited thereto.In other embodiment, second patterned layer 310 can be one or more.In addition, second patterned layer 310 of present embodiment is only in the design of the wherein end of common electrode line 230 and corresponding to the monolateral example that is configured to of thin-film transistor, but is not limited thereto.In other embodiment, the monolateral configuration or second patterned layer 310 that second patterned layer 310 can not correspond to thin-film transistor can polygonly dispose, and do not limit the number or the direction of second patterned layer 310.
Second patterned conductive layer 245 is arranged on first patterned conductive layer 235, it comprises data wire 240, source/drain electrode 250 and first patterned layer 260, wherein data wire 240 is crisscross arranged with scan line 210, data wire 240 is connected with source/drain electrode 250, and first patterned layer 260 is electrically insulated with data wire 240.What be described in more detail is that second patterned layer 310 is positioned at first patterned layer, 260 belows of part.
Pixel electrode 275 is arranged on second patterned conductive layer 245, and it has first 270 and second portion 280, and wherein first 270 is electrically insulated with second portion 280.First patterned layer 260 of first 270 cover parts and the common electrode line 230 of part, and first 270 is connected with first patterned layer 260 via first contact hole 290 and first 270 connects with electrode wires 230 together via second contact hole 300.Second portion 280 covers first patterned layer 260 of another part, and wherein second portion 280 is connected to source/drain electrode 250, and second portion 280 is connected with second patterned layer 310 via the 3rd contact hole 320.In other words, the first 270 of pixel electrode 275 mainly is as the usefulness that connects the common electrode line 230 and first patterned layer 260, so that the common potential of common electrode line 230 is passed to first patterned layer 260, and the second portion 280 of pixel electrode 275 is not only as the usefulness that is connected with second patterned layer 310, and make the pixel current potential of pixel electrode 275 be passed to second patterned layer 310, and second portion 280 is also as the effect of the main pixel electrode of dot structure.In addition, among the embodiment that Fig. 3 A is illustrated, the first 270 of first and second contact hole 290,300 and pixel electrode is all designed at the two ends of the common electrode line 230 in dot structure (and first patterned layer 260).Yet the invention is not restricted to this, the present invention also can only have the first of above-mentioned contact structure and pixel electrode in the wherein end design of common electrode line 230.Moreover second patterned layer 310 and the 3rd contact hole 320 that are illustrated in Fig. 3 A only design at a wherein end of common electrode line 230, but are not limited thereto.In other embodiment, two ends or other position of the common electrode line 230 in dot structure (and first patterned layer 260) are provided with second patterned layer 310 and the 3rd contact hole 320.In addition, the number of first, second and the 3rd contact hole 290,300,320 is not to be limited to embodiments of the invention, and the number of first and second contact hole 290,300 can be one or more.
Similarly, between first patterned conductive layer 235 and second patterned conductive layer 245, also include a layer insulating, and between second patterned conductive layer 245 and pixel electrode 275, also include layer protective layer.And about material, design, number and the position of first patterned conductive layer 235, second patterned conductive layer 245, pixel electrode 275, insulating barrier and protective layer all same or similar with above-mentioned first embodiment, in this no longer repeat specification.In addition, the structure of the thin-film transistor in the dot structure among this embodiment is also same or similar with above-mentioned first embodiment, also no longer repeats to give unnecessary details at this.
Particularly, present embodiment and the above-mentioned first embodiment difference are, please be simultaneously with reference to Fig. 3 A and Fig. 3 B, present embodiment also can constitute second capacitor C 2 except constituting first capacitor C 1 in first patterned layer 260 of second patterned conductive layer 245 and second portion 280 overlapping areas of pixel electrode 275 in first patterned layer 260 of second patterned conductive layer 245 and second patterned layer, 310 overlapping areas of first patterned conductive layer 235.
More detailed description is, in the present embodiment, see through first 270, second contact hole 300 and first contact hole 290 of pixel electrode 275, the common potential with the common electrode line 230 of first patterned conductive layer 110 can be passed to first patterned layer 260 of second patterned conductive layer 245.By this, first patterned layer 260 with common potential just can produce capacitance coupling effect with the second portion 280 of pixel electrode 130, to form first capacitor C 1.In addition, see through the pixel current potential and the 3rd contact hole 320 of the second portion 280 of pixel electrode 275, the pixel current potential of second portion 280 can be connected to second patterned layer 310 of first patterned conductive layer 235.By this, first patterned layer 260 with common potential just can produce capacitance coupling effect with second patterned layer 310 with pixel current potential, to form second capacitor C 2.
In addition, what deserves to be mentioned is that in the embodiment that Fig. 3 A is illustrated, the first 270 of first and second contact hole 290,300 and pixel electrode is all designed at the two ends of the common electrode line 230 in dot structure (and first patterned layer 260).Yet the invention is not restricted to this, the present invention also can be only in the first that a wherein end or other Position Design of common electrode line 230 has above-mentioned contact structure and pixel electrode.In addition, in the embodiment that Fig. 3 A is illustrated, its only the end design of the common electrode line 230 in dot structure (and first patterned layer 260) second patterned layer 320 is arranged.So the invention is not restricted to this, two ends or other design of the common electrode line 230 that the present invention also can be in dot structure have second patterned layer.
Next will explain above-mentioned one pixel structure process method.
Please, provide a substrate 200 earlier with reference to Fig. 3 A and Fig. 3 B.On substrate 200, form first patterned conductive layer 245.Wherein, first patterned conductive layer 245 comprises scan line 210, the grid 220 that is connected with scan line 210, common electrode line 230 and second patterned layer 310.In the present embodiment, scan line 210, grid 220, common electrode line 230 and second patterned layer 310 form simultaneously, and scan line 210 is electrically insulated with electrode wires 230 together and is example, but are not limited thereto.In other embodiment, common electrode line 230 can have the part vertical with scan line 210, and makes the vertical view of common electrode line 230 present U-shaped, S shape, O shape, Z-shaped, W shape, V-arrangement, 8 fonts, B shape, C shape, D shape, F shape, H shape, L shaped, P shape or other suitable shape in fact.Above-mentioned design can increase outside the capacitance, still can reduce light leakage phenomena.Preferably, the vertical view of common electrode line 230 presents U-shaped, S shape, O shape, 8 fonts, B shape, C shape, D shape, F shape, H shape, L shaped or P shape in fact.In addition, present embodiment is an example with a scan line 210, a common electrode line 230 and a grid 220, but is not limited thereto.In other embodiment according to the design demand can wherein at least one be designed at least one with scan line 210, common electrode line 230 and grid 220.Second patterned layer 310 is electrically insulated with electrode wires 230 and scan line 210 together.Present embodiment is an example with two second patterned layer 310, but is not limited thereto.In other embodiment, second patterned layer 310 can be one or more.In addition, second patterned layer 310 of present embodiment is only in the design of the wherein end of common electrode line 230 and corresponding to the monolateral example that is configured to of thin-film transistor, but is not limited thereto.In other embodiment, the monolateral configuration or second patterned layer 310 that second patterned layer 310 can not correspond to thin-film transistor can polygonly dispose, and do not limit the number or the direction of second patterned layer 310.
Afterwards, form second patterned conductive layer 245 in the top of first patterned conductive layer 235, it comprises data wire 240, the source/drain electrode 250 that is connected with data wire 240 that interlocks with scan line 210, first patterned layer 260 that is positioned at partial common electrode wires 230 tops.What deserves to be mentioned is that first patterned layer 260 is electrically insulated with data wire 240, and grid 220, source/drain electrode 250 formations one thin-film transistor.In addition, second patterned layer 310 is positioned at first patterned layer, 260 belows of part.
At last, form pixel electrode 275 in the top of second patterned conductive layer 245, the second portion 280 that it has first 270 and is electrically insulated with first 270.First patterned layer 260 of first 270 cover parts and the common electrode line 230 of part, first 270 is connected with first patterned layer 260 via first contact hole 290, and first 270 connects with electrode wires 230 together via second contact hole 300.And second portion 280 covers first patterned layer 260 of another part, and wherein second portion 280 is connected to source/drain electrode 250, and second portion 280 is connected with second patterned layer 310 via the 3rd contact hole 320.In addition, among the embodiment that Fig. 3 A is illustrated, the first 270 of first and second contact hole 290,300 and pixel electrode is all designed at the two ends of the common electrode line 230 in dot structure (and first patterned layer 260).Yet the invention is not restricted to this, the present invention also can only have the first of above-mentioned contact structure and pixel electrode in the wherein end design of common electrode line 230.Moreover second patterned layer 310 and the 3rd contact hole 320 that are illustrated in Fig. 3 A only design at a wherein end of common electrode line 230, but are not limited thereto.In other embodiment, two ends or other position of the common electrode line 230 in dot structure (and first patterned layer 260) are provided with second patterned layer 310 and the 3rd contact hole 320.In addition, the number of first, second and the 3rd contact hole 290,300,320 is not to be limited to embodiments of the invention, and the number of first and second contact hole 290,300 can be one or more.
Fig. 4 is the schematic diagram of a kind of display floater of one embodiment of the invention.Please refer to Fig. 4, the finished product of the display floater 400 of present embodiment comprises that at least one image element array substrates 430, another substrate 410 and one with respect to this image element array substrates 430 are arranged at the display medium 420 between image element array substrates 430 and another substrate 410, wherein image element array substrates 430 have above-mentioned shown in Fig. 2 A dot structure or the dot structure shown in Fig. 3 A.The manufacture method of display floater 400 comprises dot structure shown in Fig. 2 A or the one pixel structure process method shown in Fig. 3 A.Moreover, be coated with a cover layer (not illustrating) on the inner surface of another substrate 410, this cover layer comprise chromatic filter layer, transparency conducting layer, both alignment layers wherein at least one, if be example with normal display floater, its cover layer comprises chromatic filter layer, transparency conducting layer and both alignment layers.If is example with special display floater, only chromatic colour filter layer, both alignment layers, transparency conducting layer, chromatic filter layer and transparency conducting layer or chromatic filter layer and both alignment layers of cover layer then.
In addition, display floater 400 can be semi-penetrating and semi-reflecting type display panel, reflective display panel, colored filter display floater of (color filter on array) on active layers, active layers display floater of (array on color filter) on colored filter, vertical orientation type (VA) display floater, horizontal switch type (IPS) display floater, multi-domain perpendicular alignment-type (MVA) display floater, twisted nematic (TN) display floater, super-twist nematic (STN) display floater, pattern vertical orientation type (PVA) display floater, super pattern vertical orientation type (S-PVA) display floater, the advanced person is type (ASV) display floater with great visual angle, fringe field switch type (FFS) display floater, continuous fireworks shape arrange type (CPA) display floater, axial symmetry is arranged micella type (ASM) display floater, optical compensation curved arrange type (OCB) display floater, super horizontal switch type (S-IPS) display floater, advanced super horizontal switch type (AS-IPS) display floater, extreme edge electric field switch type (UFFS) display floater, stabilizing polymer alignment-type display floater, double vision angle type (dual-view) display floater, three visual angle type (triple-view) display floaters, 3 d display (three-dimensional) or other profile plate.
Fig. 5 is the schematic diagram of a kind of electrooptical device of one embodiment of the invention.Please refer to Fig. 5, the display floater 400 described by the foregoing description can be combined into an electrooptical device 500 with electronic component 510 electrical connections, and the manufacture method of electrooptical device 500, the manufacture method that comprises aforesaid display floater 400, again according to the fabrication schedule of various electrooptical devices 500 and assemble the gained display, to obtain electrooptical device 500.In the present embodiment, display floater 400 is to adopt the dot structure shown in Fig. 2 A or the dot structure shown in Fig. 3 A dot structure as image element array substrates 430 (please refer to Fig. 4).
In addition, electronic component 510 comprises as control element, executive component, treatment element, input element, memory cell, driving element, light-emitting component, protection component, sensing element, detecing element or other function element or aforesaid combination.And the type of electrooptical device 500 comprises the panel in portable product (as mobile phone, video camera, camera, notebook computer, game machine, wrist-watch, music player, electronic mail transceiver, map navigator, numerical digit photograph or similar products like), video and audio product (as audio-visual projector or similar products like), screen, TV, billboard, the projector etc.
In sum, reservior capacitor in the dot structure of the present invention is that the common electrode line is electrically connected with at least one first patterned layer of second patterned conductive layer via at least one first of at least one second contact hole, pixel electrode and at least one first contact hole, so that at least one second portion of at least one first patterned layer of second patterned conductive layer and pixel electrode produces capacitive coupling, form at least one first electric capacity.In another embodiment, more utilize at least one first patterned layer overlapping region of at least one second patterned layer of first patterned conductive layer and second patterned conductive layer to form at least one second electric capacity.Thus, under the prerequisite of the storage capacitors value that can reach equivalence, can reduce the shared area of reservior capacitor,, and make the design of integral panels that well-to-do space be arranged with the aperture opening ratio of increase dot structure.
Though the present invention discloses as above with preferred embodiment; right its is not in order to qualification the present invention, any affiliated technical field technical staff, without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is when with being as the criterion that claim was defined.

Claims (8)

1. a dot structure is characterized in that, described dot structure comprises:
One substrate;
One first patterned conductive layer is arranged on the described substrate, and it comprises at least one scan line, at least one grid that is connected with described scan line and at least one common electrode line, and wherein said scan line and described common electrode line are electrically insulated;
One second patterned conductive layer, be arranged at the top of described first patterned conductive layer, and it comprises at least one data wire staggered with described scan line, at least one source that is connected with described data wire/drain and is positioned at least one first patterned layer above the described common electrode line of part, wherein said first patterned layer and described data wire are electrically insulated, and described grid, described source electrode and described drain electrode constitute at least one thin-film transistor;
One pixel electrode, be arranged at the top of described second patterned conductive layer, and at least one second portion that it has at least one first and is electrically insulated with described first, described first patterned layer of described first cover part and described common electrode line partly, and described first is connected with described first patterned layer via at least one first contact hole and described first is connected with described common electrode line via at least one second contact hole, and described second portion covers described first patterned layer of another part, wherein said second portion is connected to described source/drain electrode, and described first patterned layer and described second portion constitute at least one first electric capacity.
2. dot structure as claimed in claim 1, it is characterized in that, described first patterned conductive layer more comprises at least one second patterned layer, it is arranged on the described substrate, and described second patterned layer is positioned at the below of described first patterned layer of part, and be electrically connected at the described second portion of described pixel electrode via at least one the 3rd contact hole, wherein said second patterned layer and described common electrode line and described scan line are electrically insulated, and described first patterned layer and described second patterned layer constitute at least one second electric capacity.
3. a display floater is characterized in that, described display floater comprises dot structure as claimed in claim 1.
4. an electrooptical device is characterized in that, described electrooptical device comprises display floater as claimed in claim 3.
5. an one pixel structure process method is characterized in that, described one pixel structure process method comprises:
One substrate is provided;
Form at least one first patterned conductive layer on described substrate, it comprises at least one scan line, at least one grid that is connected with described scan line and at least one common electrode line, and wherein said scan line and described common electrode line are electrically insulated;
Form one second patterned conductive layer in the top of described first patterned conductive layer, it comprises at least one data wire staggered with described scan line, at least one source that is connected with described data wire/drain and is positioned at least one first patterned layer above the described common electrode line of part, wherein said first patterned layer and described data wire are electrically insulated, and described grid, described source electrode and described drain electrode constitute at least one thin-film transistor;
Form at least one pixel electrode in the top of described second patterned conductive layer, at least one second portion that it has at least one first and is electrically insulated with described first, described first patterned layer of described first cover part and described common electrode line partly, and described first is connected with described first patterned layer via at least one first contact hole and is connected with described common electrode line via at least one second contact hole, and described second portion covers described first patterned layer of another part, wherein said second portion is connected to described source/drain electrode, and described first patterned layer and described second portion constitute at least one first electric capacity.
6. one pixel structure process method as claimed in claim 5, it is characterized in that, when on described substrate, forming described first patterned conductive layer, more comprise and form at least one second patterned layer on described substrate, and described second patterned layer is positioned at the below of described first patterned layer of part, and electrically be connected with the described second portion of described pixel electrode via at least one the 3rd contact hole, wherein said second patterned layer and described common electrode line and described scan line are electrically insulated, and described first patterned layer and described second patterned layer constitute at least one second electric capacity.
7. the manufacture method of a display floater is characterized in that, the manufacture method of described display floater comprises one pixel structure process method as claimed in claim 5.
8. the manufacture method of an electrooptical device is characterized in that, the manufacture method of described electrooptical device comprises the manufacture method of display floater as claimed in claim 7.
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