CN101382966A - Method for synthesizing design module - Google Patents
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- CN101382966A CN101382966A CNA2007101491477A CN200710149147A CN101382966A CN 101382966 A CN101382966 A CN 101382966A CN A2007101491477 A CNA2007101491477 A CN A2007101491477A CN 200710149147 A CN200710149147 A CN 200710149147A CN 101382966 A CN101382966 A CN 101382966A
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Abstract
The invention relates to a synthetic method of a design module. The method is applied to the design work of a printed circuit board and utilizes a plurality of source design modules to design a target design module which is applicable to a novel printed circuit board. The source design module is provided with a source circuit diagram and source wiring diagram both of which comprise a plurality of corresponding sub-modules. The synthetic method comprises the steps: a plurality of source design modules to be synthesized are selected, and every sub-module comprised in every source design module is separately endowed with a corresponding identifier; the required sub-module added with corresponding identifiers are extracted from the source design module to carry out synthesis and after adjusting process, a novel target design module of printed circuit board products is formed, thereby simplifying operation process, shortening design period and improving work efficiency.
Description
Technical field
The present invention relates to a kind of design module synthetic technology, relate in particular to the method for synthesizing design module in a kind of design project that is applied to printed circuit board (PCB).
Background technology
Flourish along with electronic industry makes electronic product be widely used in the average family, and almost everyone has an electronic product at least, for example, and electronic equipments such as general popular with mobile phone, digital camera, computing machine and MP3 at present.Yet, printed circuit board (PCB) (Printed Circuit Board at described electronic equipment, PCB) on the manufacture method, put, draw layout (Layout) figure to printed circuit board (PCB) from design, circuit tracing, mechanism's drawing, part, to the last become electronic product, tending to spend the tediously long time therebetween finishes, so each company all constantly releases new technology, to shorten the R﹠D process of printed circuit board (PCB).
Wherein, in the design part of printed circuit board (PCB), in the prior art, in order to satisfy the demand in different clients or market, generally can on same platform, design different products and and then be formed with different design modules, so, each series products all has a design module corresponding with it.Yet, under a lot of situations, designed printed circuit board (PCB) has stronger correlativity on same platform, various boards has general design part, the two otherness on design concept figure or wiring diagram perhaps only be the cabling of part circuit or electronic package attribute, title, specification, put aspects such as position and quantity and may have difference or other slight change.Therefore, when manufacturer needs exploitation one new product for the development in response to electronic product, naturally and understandably can at first expect in existing a plurality of design modules searching and the most close design module of printed circuit board (PCB) that is applied to this new product, and on the basis of this most close design module that searches synthetic other design module or directly carry out can finishing this New Product's Design after the trace adjustment (increasing/subtract electronic component, adjustment cabling aspect etc.).When at present the design module more than two and two being merged, generally be as main design with one of them design module, then needed part copy in other design module is come, offer wiring installation teacher behind the generation circuit list (netlist) for carrying out wiring operation (layout).
Yet, owing to may identically producing mutually, the electronic package title (reference) in two and a plurality of design module (for example conflicts, R1 in the design module 1 conflicts mutually with R1 in the design module 2), the general practice is to keep in the main design module that partly to design, and the copy part that produces conflict in other design module then need rely on manual type to redesign.So, not only cause spent time of too much human resources and cost too high, and corresponding increase is applied to the design cycle of the printed circuit board (PCB) of new product, seeks for being eager that production cost reduces, the production cycle shortens to increase the manufacturer of product competitiveness, obviously is a kind of hindering factor.
Therefore, how to overcome the disappearance of above-mentioned background technology, and then provide a kind of multiple source design module that can effectively synthesize to form the synthetic technology of a new design module, thereby avoid these a plurality of design modules in building-up process, to conflict mutually and cause the drawback that to synthesize because of the title of the electronic package that wherein comprised, shorten the design cycle of printed circuit board (PCB), to improve the efficient of work, real is the present problem that needs to be resolved hurrily.
Summary of the invention
In view of the shortcoming of above-mentioned prior art, fundamental purpose of the present invention is to provide a kind of method for synthesizing design module, shortens the design cycle of printed circuit board (PCB).
The method for synthesizing design module that another object of the present invention is to provide a kind of simplified operation flow process and save the activity duration.
A further object of the present invention is to provide a kind of method for synthesizing design module of increasing work efficiency.
For achieving the above object and other purpose, the present invention promptly provides a kind of method for synthesizing design module, be applied in the designing program of printed circuit board (PCB), use the multiple source design module to design the target design module of the printed circuit board (PCB) that is applicable to new product, described source design module has source circuit figure and source wiring figure, and this source circuit figure includes a plurality of corresponding submodules that have with source wiring figure, this synthetic method comprises: according to the product performance of the printed circuit board (PCB) of institute desire design, selected multiple source design module to be synthesized; Delete the line name that is comprised among the organ that comprised among the source wiring figure of selected described source design module and the source circuit figure; Give the distinguished symbol of described submodule one correspondence that selected described source design module comprised respectively; In the design module of described source, extract the required described submodule that has been added with corresponding distinguished symbol, described submodule is synthesized to form the objective circuit figure and the target wiring diagram of target design module, and, formed a target design module of complying with the new P.e.c. panel products of this product performance through after adjust handling.Wherein, the submodule title after the integration comprises the correspondence respectively distinguished symbol and the corresponding respectively submodule title of this distinguished symbol of this source design module in this target design module.
Above-mentioned this adjustment treatment step specifically comprises: add required line name in the objective circuit figure of synthetic target design module, and design program by this this objective circuit figure is directed in this target wiring diagram, and in this target wiring diagram, produce the circuit list of a pair of line name that should objective circuit figure according to this; In the target wiring diagram of synthetic target design module, add required organ; According to this circuit list, set the wiring aspect title of the wiring diagram of corresponding target design module, and according to the situation of change of cabling aspect before and after synthetic corresponding adjustment routing layer face partly; And rename the described submodule title that this target design module is comprised, so that the described submodule title that has been added with corresponding distinguished symbol is updated to a new submodule title; And the objective circuit figure of this target design module and target wiring diagram given corresponding adjustment the when, it is corresponding unified and formed the target design module of a new P.e.c. panel products that the two is able to.
In aforesaid method for synthesizing design module, before renaming described sub-module name that this target design module comprised and being referred to as, this submodule title comprises the distinguished symbol and the corresponding respectively submodule title of this distinguished symbol of corresponding respectively this source design module.Wherein, the method that renames the described submodule title that this target design module comprised comprises the respectively distinguished symbol in this submodule title of removal.
In one embodiment, this distinguished symbol is letter, numeral, special word or other can be for the symbols of distinguishing the submodule title.This electronic component is selected from resistance, electric capacity, inductance, chip or other electronic component that needs etc.
Method for synthesizing design module of the present invention, mainly be in the design project process of a printed circuit board (PCB), give the distinguished symbol of a plurality of submodules one correspondence that described source design module to be synthesized comprised respectively, can avoid the submodule title in the design module of described source to produce conflict, synthesized to form the target design module for follow-up a plurality of submodules described source design module, and through after adjusting processing, formed the target design module of a new P.e.c. panel products, so a plurality of submodule titles that can avoid being contained in the design module of source are because of producing the drawback that conflict causes synthesizing the target design module described in prior art.Than synthesis mode of the prior art, the flow process that simplifies the operation and save the activity duration, thereby the design cycle of printed circuit board (PCB) shortened, and increase work efficiency.
Description of drawings
Fig. 1 shows the process flow diagram of method for synthesizing design module of the present invention;
The synoptic diagram of the source design module of Fig. 2 A display application method for synthesizing design module of the present invention wherein shows two source design modules that chosen in advance is to be synthesized; And
The calcspar of Fig. 2 B display application method for synthesizing design module of the present invention.
The primary clustering symbol description
A, B, C design module
S100 ~ S107 step
#R1, #R2, #L1, #C1, #C2, #T1 submodule title
* R1, * R2, * L1, * L2, * C1, * T1 submodule title
#R2, * R2, #L1, * L1, #C1, #T1 submodule title
R1, R2, L1, L2, C1, T1 submodule title
Embodiment
Below by particular specific embodiment explanation embodiments of the present invention, those skilled in the art can understand other advantage of the present invention and effect easily by the content that this instructions disclosed.The present invention also can be implemented or be used by other different specific embodiment, and the every details in this instructions also can be based on different viewpoints and application, carries out various modifications and change under the spirit of the present invention not deviating from.
See also Fig. 1, it is the schematic flow sheet of method for synthesizing design module of the present invention, be applied in the designing program of printed circuit board (PCB), use the multiple source design module to design the target design module of the printed circuit board (PCB) that is applicable to new product, described source design module has source circuit figure and source wiring figure, and this source circuit figure includes a plurality of corresponding submodules with source wiring figure, and (this submodule can be for example resistance, electric capacity, inductance, chip, or other electronic component that needs etc.), thereby the road deviser is in research and development in power supply, during designing printed circuit board, be able to make the design effort of printed circuit board (PCB) carry out smoothly by disclosed method.In the present embodiment, this printed circuit board (PCB) is selected from multilayer circuit board or layer increased circuit board, and has a plurality of wiring layers.
As shown in Figure 1, method for synthesizing design module of the present invention comprises following detailed implementation step: at step S100, when printed circuit board (PCB) manufacturer requires to design a new P.e.c. panel products for the demand in response to the development of electronic product or market, at first according to the product performance of the printed circuit board (PCB) of institute desire design, selected multiple source design module to be synthesized.In the present embodiment, each source design module includes source circuit figure and source wiring figure, and each source design module is all corresponding to the P.e.c. panel products of a certain type.Then, proceed to step S101.
At step S101, delete the line name (net name) that is comprised among the mechanism assembly that comprised among the source wiring figure of selected described source design module and the source circuit figure, take place to avoid follow-up execution design module building-up process the overlapping thing of line name to occur.Then, proceed to step S102.
At step S102, give the distinguished symbol of described submodule one correspondence that selected respectively this source design module comprises respectively.The submodule title that comprised of this source design module particularly, this distinguished symbol respectively is attached to respectively in the title of a plurality of submodules that comprised in the source circuit figure of described source design module and the source wiring, so that respectively can be distinguished.In the present embodiment, this distinguished symbol can be letter, numeral or special word etc.Then, proceed to step S103.
At step S103, in the design module of described source, extract required synthetic a plurality of submodules that have been added with corresponding distinguished symbol respectively, and described submodule is synthesized, to form the objective circuit figure and the target wiring diagram of target design module.Particularly, at first in the source circuit figure of this source design module, extract required submodule, and described submodule is synthesized to form objective circuit figure; Then, in the source wiring figure of this source design module, extract the corresponding submodule of submodule that is comprised with this objective circuit figure again, and described submodule synthesized to form the target wiring diagram, at this moment, can constitute this target design module by this target wiring diagram and this target wiring diagram.Wherein, the submodule title after the integration comprises the correspondence respectively distinguished symbol and the corresponding respectively submodule title of this distinguished symbol of this source design module in this target design module.Then, proceed to step S104.
At step S104, in the objective circuit figure of synthetic target design module, add required line name, and design program by this this objective circuit figure is directed in this target wiring diagram, and in this target wiring diagram, produce the circuit list of a pair of line name that should objective circuit figure according to this.In addition, the P.e.c. panel products of making according to this target wiring diagram is carried out operations such as stationary positioned, therefore also need in this target wiring diagram, to add required organ for ease of follow-up.Then, proceed to step S105.
At step S105, according to this circuit list, the wiring aspect title of target setting wiring diagram, and according to the situation of change of cabling aspect before and after synthetic corresponding adjustment routing layer face partly.Then, proceed to step S106.
At step S106, rename a plurality of submodule titles that this target design module is comprised, so that the described submodule title that has been added with corresponding distinguished symbol is updated to a new submodule title.In more detail, respectively the objective circuit figure of this target design module and the described submodule title in the target wiring diagram are renamed.Then, proceed to step S107.
At step S107, the objective circuit figure of this target design module and target wiring diagram are given corresponding adjustment the when, it is corresponding unified and formed a target design module of complying with the new P.e.c. panel products of this product performance that the two is able to.Thus, can be fast and zero-address (location) conflict synthetic with the carrying out of described existing source design module, thereby form the target design module of a new P.e.c. panel products, can avoid mutual conflict because of electronic component title in the described target design module to cause to finish synthetic job or synthetic effect is not good and the drawback that need carry out complicated operation with manual type.
See also Fig. 2 A and Fig. 2 B, it shows method for synthesizing design module one Application Example synoptic diagram of the present invention.Should be specified, be simplicity of illustration and explanation, related herein design module only shows that some routines use member always, but is not limited to this, and it also can comprise other member.
Shown in Fig. 2 A, two source design module A, B that chosen in advance is to be synthesized are equivalent to step S100, wherein, have a plurality of for example resistance, electric capacity, inductance, chip or other submodule such as electronic component that need among this two source design module A, the B.For example, comprise a plurality of submodules that title is followed successively by R1, R2, L1, C1, C2, T1 among the design module A of this source, comprise then among the design module B of this source that title is followed successively by a plurality of submodules of R1, R2, L1, L2, C1, T1, wherein, deleted the line name (being equivalent to step S101) that is comprised among the organ that comprised among the source wiring figure of selected described source design module A, B and the source circuit figure.
Afterwards, shown in Fig. 2 B, give this two source design module A respectively, the distinguished symbol # of submodule one correspondence that B comprised, * (be equivalent to step S102), and according to this distinguished symbol #, *, it is added into this source design module A respectively, during sub-module name claims among the B, promptly, in the design module A of source, make submodule title wherein become " #R1 by original " R1; R2; L1; C1; C2; T1 ", #R2, #L1, #C1, #C2, #T1 ", and the submodule title among the design module B of source is by original " R1, R2, L1, L2, C1, T1 " become " * R1, * R2, * L1, * L2, * C1, * T1 ".
Then, respectively this submodule that to choose in this two source design module A, B is synthesized (being equivalent to step S103), because of sub-module name among this two source design module A, the B claims additional have distinguished symbol #, *, it is multiple to avoid sub-module name to weigh, so in building-up process, each submodule title can not clash.Certainly, distinguished symbol is not limited to #, *, also can adopt! , $, letter, numeral or special word etc.In the present embodiment, submodule among submodule among the design module A of source " #R2, #L1, #C1, #T1 " and the source design module B " * R2, * L1 " is synthesized to form a new target design module C, have submodule #R2, * R2, #L1, * L1, #C1, #T1; At this moment, can be chosen in and add required line name among the objective circuit figure of synthetic target design module C, and in this target wiring diagram, produce the circuit list of a pair of line name that should objective circuit figure and add required organ, set up the wiring aspect title of the wiring diagram that sets the goal again according to this circuit table, and according to the situation of change of cabling aspect before and after synthetic corresponding adjustment routing layer face (being equivalent to step S104, S105) partly.
At last, target design module C is renamed (being equivalent to step S106), so that the described submodule title " #R2, * R2, #L1, * L1, #C1, #T1 " that has been added with corresponding distinguished symbol is updated to a new submodule title " R1, R2, L1, L2, C1, T1 "; That is, remove distinguished symbol #, * in this submodule title respectively.So, corresponding objective circuit figure and the target wiring diagram of adjusting this target design module promptly finished a new target design module C (being equivalent to step S107).Certainly, in other embodiments, also can be after renaming target design module C, in the objective circuit figure of target design module C, add required line name, and in this target wiring diagram, produce the circuit list of a pair of line name that should objective circuit figure and in this target wiring diagram, add required organ.
In sum, method for synthesizing design module of the present invention, be in the design project process of a printed circuit board (PCB), give the distinguished symbol of a plurality of submodules one corresponding described source design module that a plurality of source design modules to be synthesized are comprised in advance respectively, it is multiple to avoid sub-module name to weigh, can be smoothly a plurality of submodules of described source design module be synthesized to form the target design module for follow-up, and through after adjusting processing, formed the target design module of a new P.e.c. panel products, so a plurality of submodule titles that can avoid being contained in the design source module described in prior art are conflicted because of producing in the design module building-up process, and cause synthesizing new target design module and cause follow-up drawback of carrying out complicated patch work with the manual mode of operation.Than synthesis mode of the prior art, the present invention can shorten the design cycle of printed circuit board (PCB), thereby simplifies the operation flow process and save the activity duration, increases work efficiency and promotes the product competitiveness of printed circuit board (PCB).
The foregoing description only is exemplary illustration principle of the present invention and effect thereof, but not is used to limit the present invention, that is, the present invention in fact still can do other change.Therefore, any those skilled in the art all can make amendment to the foregoing description under spirit of the present invention and category.So the scope of the present invention, claim is listed as described later.
Claims (6)
1. method for synthesizing design module, be applied in the designing program of printed circuit board (PCB), use the multiple source design module to design the target design module of the printed circuit board (PCB) that is applicable to new product, described source design module has source circuit figure and source wiring figure, and this source circuit figure includes a plurality of corresponding submodules with source wiring figure, and this synthetic method comprises:
According to the product performance of the printed circuit board (PCB) of institute desire design, selected multiple source design module to be synthesized;
Delete the line name that is comprised among the organ that comprised among the source wiring figure of selected described source design module and the source circuit figure;
Give the distinguished symbol of described submodule one correspondence that selected described source design module comprised respectively; And
In the design module of described source, extract the required described submodule that has been added with corresponding distinguished symbol, described submodule is synthesized to form the objective circuit figure and the target wiring diagram of target design module, and, formed a target design module of complying with the new P.e.c. panel products of this product performance through after adjust handling.
2. method for synthesizing design module according to claim 1, wherein, this adjustment treatment step specifically comprises:
In the objective circuit figure of synthetic target design module, add required line name, and design program by this this objective circuit figure is directed in this target wiring diagram, and in this target wiring diagram, produce the circuit list of a pair of line name that should objective circuit figure according to this;
In the target wiring diagram of synthetic target design module, add required organ;
According to this circuit list, set the wiring aspect title of the target wiring diagram of corresponding target design module, and according to the situation of change of cabling aspect before and after synthetic corresponding adjustment routing layer face partly;
Rename the described submodule title that this target design module is comprised, so that the described submodule title that has been added with corresponding distinguished symbol is updated to a new submodule title; And
The objective circuit figure of this target design module and target wiring diagram are given corresponding adjustment the when, and it is corresponding unified and formed the target design module of a new P.e.c. panel products that the two is able to.
3. method for synthesizing design module according to claim 2, wherein, before renaming described sub-module name that this target design module comprised and being referred to as, this submodule title comprises the distinguished symbol and the corresponding respectively submodule title of this distinguished symbol of corresponding respectively this source design module.
4. method for synthesizing design module according to claim 2, wherein, the method that renames the described submodule title that this target design module comprised comprises the respectively distinguished symbol in this submodule title of removal.
5. method for synthesizing design module according to claim 1, wherein, this distinguished symbol is each in letter, numeral and the special word.
6. method for synthesizing design module according to claim 1, wherein, this submodule be selected from group that resistance, electric capacity, inductance and chip form at least one of them.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2007101491477A CN101382966B (en) | 2007-09-04 | 2007-09-04 | Method for synthesizing design module |
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| Application Number | Priority Date | Filing Date | Title |
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| CN2007101491477A CN101382966B (en) | 2007-09-04 | 2007-09-04 | Method for synthesizing design module |
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| CN101382966A true CN101382966A (en) | 2009-03-11 |
| CN101382966B CN101382966B (en) | 2010-06-02 |
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| CN2007101491477A Expired - Fee Related CN101382966B (en) | 2007-09-04 | 2007-09-04 | Method for synthesizing design module |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101526972A (en) * | 2009-04-21 | 2009-09-09 | 上海闻泰电子科技有限公司 | Setting device of circuit board and method thereof |
| CN101794339A (en) * | 2010-03-23 | 2010-08-04 | 中兴通讯股份有限公司 | Method and system for realizing portable multiplexing of printed circuit board |
| CN102332038A (en) * | 2010-07-12 | 2012-01-25 | 英业达股份有限公司 | Correlation checking method for circuit board assembly |
| CN102456088A (en) * | 2010-10-27 | 2012-05-16 | 英业达股份有限公司 | Circuit diagram rewiring method |
| CN106934083A (en) * | 2015-12-30 | 2017-07-07 | 小米科技有限责任公司 | Circuit design method and device |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6209119B1 (en) * | 1997-04-10 | 2001-03-27 | Matsushita Electric Industrial Co., Ltd. | Apparatus and method for synthesizing module |
| US6185726B1 (en) * | 1998-06-03 | 2001-02-06 | Sony Corporation | System and method for efficiently designing integrated circuit devices |
-
2007
- 2007-09-04 CN CN2007101491477A patent/CN101382966B/en not_active Expired - Fee Related
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101526972A (en) * | 2009-04-21 | 2009-09-09 | 上海闻泰电子科技有限公司 | Setting device of circuit board and method thereof |
| CN101794339A (en) * | 2010-03-23 | 2010-08-04 | 中兴通讯股份有限公司 | Method and system for realizing portable multiplexing of printed circuit board |
| CN102332038A (en) * | 2010-07-12 | 2012-01-25 | 英业达股份有限公司 | Correlation checking method for circuit board assembly |
| CN102456088A (en) * | 2010-10-27 | 2012-05-16 | 英业达股份有限公司 | Circuit diagram rewiring method |
| CN102456088B (en) * | 2010-10-27 | 2013-09-04 | 英业达股份有限公司 | Circuit diagram rewiring method |
| CN106934083A (en) * | 2015-12-30 | 2017-07-07 | 小米科技有限责任公司 | Circuit design method and device |
| CN106934083B (en) * | 2015-12-30 | 2020-07-21 | 小米科技有限责任公司 | Circuit design method and apparatus |
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| Publication number | Publication date |
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| CN101382966B (en) | 2010-06-02 |
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